Re: [PATCH] alsaaudio: Set try-poll to false by default

On Monday, March 31, 2025 3:05:24 PM CEST BALATON Zoltan wrote: > On Sun, 23 Mar 2025, Christian Schoenebeck wrote: > > On Sunday, March 16, 2025 1:20:46 AM CET BALATON Zoltan wrote: > >> Quoting Volker Rümelin: "try-poll=on tells the ALSA backend to try to > >> use an event loop instead of the aud

Re: [PATCH-for-10.0? v2 13/14] hw/arm/virt-acpi: Do not advertise disabled GIC ITS

On Thu, 3 Apr 2025 17:18:28 +0200 Philippe Mathieu-Daudé wrote: > GIC ITS can be disabled at runtime using '-M its=off', > which sets VirtMachineState::its = false. Check this > field to avoid advertising the ITS in the MADT table. > > Reported-by: Udo Steinberg > Resolves: https://gitlab.com/

CRITICAL Unexpected bottom half exception

2025-04-04 12:07:59,172 archtest CRITICAL Unexpected bottom half exception. This is a bug in the QMP library. Please report it to and CC: John Snow .:   | Traceback (most recent call last):   |   File "/home/anton/.local/lib/python3.13/site-packages/qemu/qmp/protocol.py", line 462, in _sessio

Re: [PATCH for-10.1] hw/riscv: do not mark any machine as default

On 4/4/25 13:30, Daniel Henrique Barboza wrote: On 4/4/25 2:50 AM, Alistair Francis wrote: On Fri, Mar 28, 2025 at 2:16 AM Philippe Mathieu-Daudé wrote: On 27/3/25 14:02, Daniel Henrique Barboza wrote: Commit 5b4beba124 ("RISC-V Spike Machines") added the Spike machine and made it default

Re: [PATCH 11/15] fuse: Manually process requests (without libfuse)

On 27.03.25 16:35, Stefan Hajnoczi wrote: On Tue, Mar 25, 2025 at 05:06:51PM +0100, Hanna Czenczek wrote: Manually read requests from the /dev/fuse FD and process them, without using libfuse. This allows us to safely add parallel request processing in coroutines later, without having to worry a

Re: [PATCH 14/15] fuse: Implement multi-threading

On 27.03.25 16:55, Stefan Hajnoczi wrote: On Tue, Mar 25, 2025 at 05:06:54PM +0100, Hanna Czenczek wrote: FUSE allows creating multiple request queues by "cloning" /dev/fuse FDs (via open("/dev/fuse") + ioctl(FUSE_DEV_IOC_CLONE)). We can use this to implement multi-threading. Note that the int

Re: [PATCH v8 09/28] vfio: split out VFIOKernelPCIDevice

On 4/3/25 20:08, John Levon wrote: On Thu, Apr 03, 2025 at 07:13:30PM +0200, Cédric Le Goater wrote: On 2/19/25 15:48, John Levon wrote: From: Jagannathan Raman Split out code specific to the kernel-side vfio implementation from the VFIOPCIDevice class into a VFIOKernelPCIDevice. The forthco

Re: [PATCH for-10.1] hw/riscv: do not mark any machine as default

On Fri, Apr 04, 2025 at 02:37:32PM +0200, Philippe Mathieu-Daudé wrote: > On 4/4/25 13:30, Daniel Henrique Barboza wrote: > > > > > > On 4/4/25 2:50 AM, Alistair Francis wrote: > > > On Fri, Mar 28, 2025 at 2:16 AM Philippe Mathieu-Daudé > > > wrote: > > > > > > > > On 27/3/25 14:02, Daniel Hen

Re: [PATCH v1 0/1] hw/misc/aspeed_sbc: Implement OTP memory and controller

+qemu-block@ On 4/4/25 14:06, Cédric Le Goater wrote: Hello, On 4/2/25 11:14, Kane-Chen-AS wrote: This patch introduces part of the Secure Boot Controller device, which consists of several sub-components, including an OTP memory, OTP controller, cryptographic engine, and boot controller. In t

Re: [PATCH v1 09/22] hw/misc/aspeed_hace: Ensure HASH_IRQ is always set to prevent firmware hang

On 3/21/25 10:26, Jamin Lin wrote: Currently, if the program encounters an unsupported algorithm, it does not set the HASH_IRQ bit in the status register and send an interrupt to indicate command completion. As a result, the FW gets stuck waiting for a completion signal from the HACE module. Add

Re: [PATCH v1 16/22] test/qtest/hace: Add SHA-384 tests for AST2600

On 3/21/25 10:26, Jamin Lin wrote: Introduced "test_sha384_ast2600" to validate SHA-384 hashing. Added "test_sha384_sg_ast2600" for scatter-gather SHA-384 verification. Implemented "test_sha384_accum_ast2600" to test SHA-384 accumulation. Registered new test cases in "main" to ensure execution.

[PATCH v2 0/2] qapi/throttle: Fix qmp_block_set_io_throttle blocked for too long

From: Zhu Yangyang First of all, thanks to Stefan Hajnoczi for his suggestions, I made the following changes in this patch: 1. Support 0 in BDRV_POLL_WHILE_TIMEOUT(), 0 means infinite. 2. Use uint64_t timeout_ns instead of int64 timeout to name variables. 3. Use timer_pending() to check fo

[PATCH v8 42/55] cpu: Don't set vcpu_dirty when guest_state_protected

QEMU calls kvm_arch_put_registers() when vcpu_dirty is true in kvm_vcpu_exec(). However, for confidential guest, like TDX, putting registers is disallowed due to guest state is protected. Only set vcpu_dirty to true with guest state is not protected when creating the vcpu. Signed-off-by: Xiaoyao

[PULL 09/12] ppc/amigaone: Constify default_env

From: BALATON Zoltan The variable holding default env is not supposed to be written. Signed-off-by: BALATON Zoltan Reviewed-by: Nicholas Piggin Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20250314200145.08e0f4e6...@zero.eik.bme.hu> Signed-off-by: Nicholas Piggin --- hw/ppc/amigaone.c |

Re: [RFC PATCH-for-10.1 00/39] single-binary: Make hw/arm/ common

On 4/4/25 11:04, Philippe Mathieu-Daudé wrote: On 4/4/25 19:12, Pierrick Bouvier wrote: On 4/3/25 16:57, Philippe Mathieu-Daudé wrote: Hi, At this point this series is mostly a draft for Pierrick. After introducing the generic TargetInfo API [*], we implement the ARM variants, then use the AP

Re: [PATCH-for-10.0? v2 13/14] hw/arm/virt-acpi: Do not advertise disabled GIC ITS

On 4/4/25 12:41, Igor Mammedov wrote: On Thu, 3 Apr 2025 17:18:28 +0200 Philippe Mathieu-Daudé wrote: GIC ITS can be disabled at runtime using '-M its=off', which sets VirtMachineState::its = false. Check this field to avoid advertising the ITS in the MADT table. Reported-by: Udo Steinberg

Re: [PATCH 14/15] fuse: Implement multi-threading

On 01.04.25 14:05, Kevin Wolf wrote: Am 27.03.2025 um 14:45 hat Hanna Czenczek geschrieben: On 27.03.25 13:18, Markus Armbruster wrote: Hanna Czenczek writes: On 26.03.25 12:41, Markus Armbruster wrote: Hanna Czenczek writes: On 26.03.25 06:38, Markus Armbruster wrote: Hanna Czenczek w

smbios entry point auto on pc-i440fx

Hello team, I'm facing the issue of windows instances not beeing able of retrieving the uuid because of smbios 3.0 (qemu 8.2 on debian openstack/libvirt). The instances are of pc-i440fx-8.2 machine type. If I understand well since 8.1 qemu use a 64bit format for the smbios v3 which is not handle

[PATCH-for-10.1 17/24] target/rx: Restrict SoftMMU mmu_index() to TCG

Signed-off-by: Philippe Mathieu-Daudé --- target/rx/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 723262f4b54..e14d9cbef93 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -208,6 +208,7 @@ static const TCGCPUOps rx_tcg_ops =

[RFC PATCH-for-10.1 01/39] target/arm: Implement per-binary TargetInfo structures

Signed-off-by: Philippe Mathieu-Daudé --- meson.build | 1 + target/arm/target_info-aarch64-softmmu.c | 24 target/arm/target_info-arm-softmmu.c | 24 target/arm/meson.build | 5 + 4 files c

Re: [PATCH] hw/ipmi: Allow multiple BMC instances

Hi Corey, On 4/4/25 02:57, Corey Minyard wrote: Allow a system to have multiple BMC connections to the same BMC and multiple different BMCs. This can happen on real systems, and is useful for testing the IPMI driver on Linux. Signed-off-by: Corey Minyard --- I'm working on a fairly extensive

Re: [PATCH for-10.0] docs: deprecate RISC-V default machine option

On 4/4/25 05:28, Daniel Henrique Barboza wrote: Commit 5b4beba124 ("RISC-V Spike Machines") added the Spike machine and made it default for qemu-system-riscv32/64. It was the first RISC-V machine added in QEMU so setting it as default was sensible. Today we have 7 riscv64 and 6 riscv32 machines

Re: [PATCH v8 10/28] vfio: add device IO ops vector

On 2/19/25 15:48, John Levon wrote: From: Jagannathan Raman For vfio-user, device operations such as IRQ handling and region read/writes are implemented in userspace over the control socket, not ioctl() or read()/write() to the vfio kernel driver; add an ops vector to generalize this, and imple

Re: [RFC PATCH-for-10.1 38/39] hw/arm: Move xen files to arm_common_ss[]

On 4/4/25 01:58, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- XXX untested Now with Xen setup accessible, so tested. What is missing: -- >8 -- diff --git a/hw/arm/xen-pvh.c b/hw/arm/xen-pvh.c index d1509bd235..8e81947c7d 100644 --- a/hw/arm/xen-pvh.c +++ b/hw/arm/xe

Re: [PATCH v5] [for-10.1] virtio: add VIRTQUEUE_ERROR QAPI event

Vladimir Sementsov-Ogievskiy writes: > On 04.04.25 09:46, Markus Armbruster wrote: >> Vladimir Sementsov-Ogievskiy writes: >> >>> For now we only log the vhost device error, when virtqueue is actually >>> stopped. Let's add a QAPI event, which makes possible: >>> >>> - collect statistics of s

Re: [PATCH] hw/9pfs: add cleanup operation for 9p-synth

On Fri, 04 Apr 2025 15:59:54 +0200 Christian Schoenebeck wrote: > On Monday, March 31, 2025 3:52:31 PM CEST Zheng Huang wrote: > > Hi, > > Hi! > Hi Zheng ! We certainly appreciate politeness here but we only want relevant details in what will become the commit message. Anything else you want

Re: [PATCH v8 09/28] vfio: split out VFIOKernelPCIDevice

On 4/4/25 16:21, John Levon wrote: On Fri, Apr 04, 2025 at 02:49:40PM +0200, Cédric Le Goater wrote: If it's possible to set up vfio_user_pci_dev_info and its callbacks without needing a sub-type then maybe not? I think the vfio-user-device could inherit directly from vfio-pci and override th

Re: [PATCH] smbios: Fix buffer overrun when using path= option

On Thu, Apr 3, 2025 at 9:37 PM Philippe Mathieu-Daudé wrote: > Also I was hoping I could get feedback from Valentin. > > Sorry, I did not realize that you wanted my feedback. Daan's patch looks fine to me. I have manually tested it and it fixes my issue.

[PATCH 1/2] target/riscv/tcg: make 'max' cpu rva23s64 compliant

The 'max' CPU includes all available extensions we implement, but at this moment it is not rva23s64 compliant due to missing checks that the parent profile (rva22s64) does. Users might expect that the a CPU called 'max' CPU will also compatible with our latest S mode profile. Let's make it officia

Re: [PATCH v8 05/28] vfio: add vfio_prepare_device()

On 4/3/25 11:34, John Levon wrote: On Thu, Apr 03, 2025 at 11:19:34AM +0200, Cédric Le Goater wrote: On 2/19/25 15:48, John Levon wrote: Commonize some initialization code shared by the legacy and iommufd vfio implementations (and later by vfio-user). Signed-off-by: John Levon --- hw/vfio

Re: [PATCH] smbios: Fix buffer overrun when using path= option

Yes. On Fri, Apr 4, 2025 at 5:02 PM Philippe Mathieu-Daudé wrote: > On 4/4/25 16:46, Valentin David wrote: > > On Thu, Apr 3, 2025 at 9:37 PM Philippe Mathieu-Daudé > > wrote: > > > > Also I was hoping I could get feedback from Valentin. > > > > > > Sorry, I did no

Re: [PATCH v8 05/28] vfio: add vfio_prepare_device()

On Fri, Apr 04, 2025 at 05:41:54PM +0200, Cédric Le Goater wrote: > > > > +void vfio_prepare_device(VFIODevice *vbasedev, VFIOContainerBase > > > > *bcontainer, > > > > + VFIOGroup *group, struct vfio_device_info > > > > *info) > > > > > > I would prefer that the first v

Re: [PATCH v8 09/28] vfio: split out VFIOKernelPCIDevice

On Fri, Apr 04, 2025 at 04:48:10PM +0200, Cédric Le Goater wrote: > On 4/4/25 16:21, John Levon wrote: > > On Fri, Apr 04, 2025 at 02:49:40PM +0200, Cédric Le Goater wrote: > > > > > > If it's possible to set up vfio_user_pci_dev_info and its callbacks > > > > without > > > > needing a sub-type

[PATCH] hw/ipmi: Move vmsd registration to device class

It's the right way to do it now, and it handles multiple instances properly. I need multiple instances for some testing I'm doing so this is the right thing to do. Tested by doing: (qemu) migrate -d exec:cat>filen.mig before and after the fix, then: scripts/analyze-migration.py -d desc -

[PATCH 0/2] hw/riscv/virt.c: change default CPU to 'max'

Hi, The 'rv64' CPU, the default CPU for the 'virt' machine, is a strange CPU. It is a collection of extensions that were enabled/disabled as extensions were being added in TCG, and in the end we ended up with a CPU that we can't say exactly what it does. This is further aggravated by the distros

Re: [PATCH v8 10/28] vfio: add device IO ops vector

On Fri, Apr 04, 2025 at 04:36:47PM +0200, Cédric Le Goater wrote: > On 2/19/25 15:48, John Levon wrote: > > From: Jagannathan Raman > > > > For vfio-user, device operations such as IRQ handling and region > > read/writes are implemented in userspace over the control socket, not > > ioctl() or re

Re: [PATCH] hw/ipmi: Allow multiple BMC instances

On Fri, Apr 04, 2025 at 03:21:09PM +0200, Philippe Mathieu-Daudé wrote: > On 4/4/25 15:04, Corey Minyard wrote: > > On Fri, Apr 04, 2025 at 02:41:46PM +0200, Philippe Mathieu-Daudé wrote: > > > Hi Corey, > > > > > > On 4/4/25 02:57, Corey Minyard wrote: > > > > Allow a system to have multiple BMC

[PATCH 2/2] hw/riscv/virt.c: change default CPU to 'max'

In [1], minute 44, we have a hint from a Canonical kernel developer that the next Ubuntu LTS will be RVA23 compliant. If this really comes to pass, the 'virt' CPU won't run it by default - we'll need to either use 'rva23s64' or 'max' CPUs instead because rv64 is not RVA23 compliant. Other distros w

Re: [PATCH 1/6] target/hexagon: handle .new values

On Thu, 3 Apr 2025 19:51:58 -0700 Brian Cain wrote: > > From: Brian Cain Perhaps it would be best to reset the autorship here to brian.c...@oss.qualcomm.com? > Signed-off-by: Brian Cain > --- > target/hexagon/hex_common.py | 27 ++- > 1 file changed, 22 insertions(+)

[PATCH 09/11] qapi/qapi-schema: Address the introduction's bit rot

Cut the crap that stopped making sense years ago. Adjust the remainder. Signed-off-by: Markus Armbruster --- qapi/qapi-schema.json | 27 +++ 1 file changed, 7 insertions(+), 20 deletions(-) diff --git a/qapi/qapi-schema.json b/qapi/qapi-schema.json index 0d027d5017..7bc

Re: [PATCH v8 09/28] vfio: split out VFIOKernelPCIDevice

On Fri, Apr 04, 2025 at 02:49:40PM +0200, Cédric Le Goater wrote: > > If it's possible to set up vfio_user_pci_dev_info and its callbacks without > > needing a sub-type then maybe not? > > I think the vfio-user-device could inherit directly from vfio-pci > and override the io ops callbacks. It wo

Re: [PATCH v8 05/28] vfio: add vfio_prepare_device()

On Thu, Apr 03, 2025 at 11:19:34AM +0200, Cédric Le Goater wrote: > On 2/19/25 15:48, John Levon wrote: > > Commonize some initialization code shared by the legacy and iommufd vfio > > implementations (and later by vfio-user). > > > > Signed-off-by: John Levon > > --- > > hw/vfio/common.c

[PATCH-for-10.0? v2 07/14] hw/intc/gicv3_its: Do not check its_class_name() for NULL

Since commit cc5e719e2c8 ("kvm: require KVM_CAP_SIGNAL_MSI"), its_class_name() single implementation doesn't return NULL anymore. Update the prototype docstring, and remove the pointless checks. Reported-by: Gustavo Romero Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/arm_gicv3_its_

Re: [PATCH v6 3/6] hw/loongarch/virt: Fix error handling in cpu unplug

On Fri, 21 Mar 2025 15:35:37 +0800 bibo mao wrote: > On 2025/3/21 下午3:21, Markus Armbruster wrote: > > bibo mao writes: > > > >> +Igor > >> > >> > >> On 2025/3/21 下午2:47, Markus Armbruster wrote: > >>> Bibo Mao writes: > >>> > In function virt_cpu_unplug(), it will send cpu unplug m

Re: [PATCH] docs/cxl: Add serial number for persistent-memdev

On Tue, 25 Mar 2025 15:49:37 +0800 Yuquan Wang wrote: > > -原始邮件- > > 发件人: "Jonathan Cameron" > > 发送时间:2025-03-13 02:10:35 (星期四) > > 收件人: "Yuquan Wang" > > 抄送: qemu-devel@nongnu.org, linux-...@vger.kernel.org > > 主题: Re: [PATCH] docs/cxl: Add serial number for persistent-memdev > > > >

Re: [PATCH] [for-10.1] qapi/block-core: derpecate some block-job- APIs

On 04.04.25 17:13, Markus Armbruster wrote: Vladimir Sementsov-Ogievskiy writes: On 04.04.25 09:20, Markus Armbruster wrote: Vladimir Sementsov-Ogievskiy writes: [...] + +``block-job-finalize`` (since 10.1) +'' + +Use ``job-finalize`` instead. + block-jo

Re: [PATCH] hw/ipmi: Move vmsd registration to device class

Cc'ing migration maintainers On 4/4/25 17:52, Corey Minyard wrote: It's the right way to do it now, and it handles multiple instances properly. I need multiple instances for some testing I'm doing so this is the right thing to do. Tested by doing: (qemu) migrate -d exec:cat>filen.mig bef

Re: [PATCH v8 03/28] vfio/container: support VFIO_DMA_UNMAP_FLAG_ALL

On 4/3/25 11:45, John Levon wrote: On Wed, Apr 02, 2025 at 06:49:50PM +0200, Cédric Le Goater wrote: On 2/19/25 15:48, John Levon wrote: Some containers can directly implement unmapping all regions; add a new flag to support this. Originally-by: John Johnson Signed-off-by: Elena Ufimtseva S

Re: [PATCH-for-10.0? v2 11/14] qtest/bios-tables-test: Whitelist aarch64/virt 'its_off' variant blobs

On Thu, 3 Apr 2025 17:18:26 +0200 Philippe Mathieu-Daudé wrote: > We are going to fix the test_acpi_aarch64_virt_tcg_its_off() > test. In preparation, copy the ACPI tables which will be > altered as 'its_off' variants, and whitelist them. > > Reviewed-by: Gustavo Romero > Signed-off-by: Philip

Re: [PATCH] smbios: Fix buffer overrun when using path= option

On 4/4/25 16:46, Valentin David wrote: On Thu, Apr 3, 2025 at 9:37 PM Philippe Mathieu-Daudé > wrote: Also I was hoping I could get feedback from Valentin. Sorry, I did not realize that you wanted my feedback. Daan's patch looks fine to me. I have manually tested

Re: [PATCH] hw/ipmi: Allow multiple BMC instances

On Fri, Apr 04, 2025 at 02:41:46PM +0200, Philippe Mathieu-Daudé wrote: > Hi Corey, > > On 4/4/25 02:57, Corey Minyard wrote: > > Allow a system to have multiple BMC connections to the same BMC and > > multiple different BMCs. This can happen on real systems, and is > > useful for testing the IPM

Re: [PATCH] hw/9pfs: add cleanup operation for 9p-synth

On Monday, March 31, 2025 3:52:31 PM CEST Zheng Huang wrote: > Hi, Hi! > This patch adds a cleanup operation for 9p-synth, which fixes a memory > leak bug in synth_init() and other related operations. Which other operations? > All child nodes > of synth_root need to be freed before the entire

Re: [RFC PATCH] tests/tcg: fix semihosting SYS_EXIT for aarch64 in boot.S

On 4/4/25 04:56, Alex Bennée wrote: We don't expect to hit exceptions in our testing so currently all the vectors report an un-expected exception and then attempt to exit. However for aarch64 we should always use the extended information block as we do in _exit. Rather than duplicate the code on

Re: [PATCH] hw/ipmi: Allow multiple BMC instances

On 4/4/25 15:04, Corey Minyard wrote: On Fri, Apr 04, 2025 at 02:41:46PM +0200, Philippe Mathieu-Daudé wrote: Hi Corey, On 4/4/25 02:57, Corey Minyard wrote: Allow a system to have multiple BMC connections to the same BMC and multiple different BMCs. This can happen on real systems, and is us

Re: [PATCH v8 08/28] vfio: add region cache

On 4/3/25 18:00, John Levon wrote: On Thu, Apr 03, 2025 at 05:46:03PM +0200, Cédric Le Goater wrote: +static void vfio_get_all_regions(VFIODevice *vbasedev) +{ +struct vfio_region_info *info; +int i; + +for (i = 0; i < vbasedev->num_regions; i++) { +vfio_get_region_info(vbas

Re: [PULL 0/2] virtio,pc: fixes

Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes. signature.asc Description: PGP signature

Re: [PULL 0/1] Migration patches for 2025-04-01

Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes. signature.asc Description: PGP signature

Re: [PULL -rce 0/1] NBD patches for 2025-04-03

Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes. signature.asc Description: PGP signature

Re: [RFC PATCH-for-10.1 05/19] qemu: Introduce target_long_bits()

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/target_info-impl.h | 3 +++ include/qemu/target_info.h | 2 ++ target_info-stub.c | 1 + target_info.c | 5 + 4 files changed, 11 insertions(+) R

Re: [RFC PATCH-for-10.1 01/19] qemu: Introduce TargetInfo API in 'target_info.h'

On 4/3/25 16:48, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- meson.build | 9 + include/exec/poison.h | 1 + include/qemu/target_info-impl.h | 21 + include/qemu/target_info.h | 18 +

Re: [RFC PATCH-for-10.1 19/19] system/vl: Filter machine list for binary using machine_binary_filter()

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- system/vl.c | 24 1 file changed, 24 insertions(+) diff --git a/system/vl.c b/system/vl.c index d8a0fe713c9..554f5f2a467 100644 --- a/system/vl.c +++ b/system/vl.c @@ -27,6 +27,8

Re: [RFC PATCH-for-10.1 18/19] qemu: Prepare per-binary QOM filter via TYPE_BINARY_PREFIX

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- meson.build| 1 + include/hw/boards.h| 1 + include/qemu/target_info-qom.h | 14 ++ target_info-qom.c | 15 +++ 4 files changed, 3

Re: [RFC PATCH-for-10.1 17/19] accel: Move target-agnostic code from accel-target.c -> accel-common.c

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- accel/accel-common.c | 142 +++ accel/accel-target.c | 129 --- accel/meson.build| 1 + 3 files changed, 143 insertions(

Re: [RFC PATCH-for-10.1 10/19] cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type()

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- cpu-target.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/cpu-target.c b/cpu-target.c index 761c2d28645..01b0064b91f 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -22,6 +22

Re: [RFC PATCH-for-10.1 09/19] qemu: Introduce target_cpu_type()

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/target_info-impl.h | 3 +++ include/qemu/target_info.h | 2 ++ target_info-stub.c | 2 ++ target_info.c | 5 + 4 files changed, 12 insertions(+) di

Re: [RFC PATCH-for-10.1 07/19] target/hppa: Replace TARGET_LONG_BITS -> target_long_bits()

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/mem_helper.c | 3 ++- target/hppa/translate.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index 554d7bf4d14..0

Re: [RFC PATCH-for-10.1 03/19] qemu: Factor target_system_arch() out

On 4/3/25 16:48, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/target_info-impl.h | 4 include/qemu/target_info.h | 4 hw/core/machine-qmp-cmds.c | 6 ++ target_info-stub.c | 1 + target_info.c

Re: [RFC PATCH-for-10.1 11/19] accel/tcg: Replace CPU_RESOLVING_TYPE -> target_cpu_type()

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/tcg-all.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index bf27c5c0fb3..a13cb39644f 100644 --- a/accel/tcg/tcg-all.c +++ b/

Re: [RFC PATCH-for-10.1 13/19] accel: Replace CPU_RESOLVING_TYPE -> target_cpu_type()

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- accel/accel-target.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/accel/accel-target.c b/accel/accel-target.c index 33a539b4cbb..9e9e70be876 100644 --- a/accel/accel-target.c

Re: [RFC PATCH-for-10.1 12/19] cpus: Move target-agnostic methods out of cpu-target.c

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- cpu-target.c | 78 +--- hw/core/cpu-common.c | 74 + 2 files changed, 75 insertions(+), 77 deletions(-) diff --git

Re: [RFC PATCH-for-10.1 16/19] accel: Make AccelCPUClass structure target-agnostic

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Include missing "hw/core/cpu.h" header in "accel/accel-cpu.h" to avoid: include/accel/accel-cpu-target.h:39:28: error: unknown type name 'CPUClass' 39 | void (*cpu_class_init)(CPUClass *cc); |^ Signed-off-

Re: [RFC PATCH-for-10.1 08/19] target/riscv: Replace TARGET_LONG_BITS -> target_long_bits()

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- hw/riscv/riscv-iommu.c | 3 ++- hw/riscv/riscv_hart.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index 65411b3e4c0..37563b210

Re: [RFC PATCH-for-10.1 02/19] qemu: Convert target_name() to TargetInfo API

On 4/3/25 16:48, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 2 -- include/qemu/target_info-impl.h | 3 +++ include/qemu/target_info.h | 2 ++ cpu-target.c| 5 - hw/core/machine-qmp-cmds.c | 1 +

Re: [RFC PATCH-for-10.1 00/39] single-binary: Make hw/arm/ common

On 4/3/25 16:57, Philippe Mathieu-Daudé wrote: Hi, At this point this series is mostly a draft for Pierrick. After introducing the generic TargetInfo API [*], we implement the ARM variants, then use the API to remove target-specific code, allowing to eventually remove the target-specific arm_ss

Re: [RFC PATCH-for-10.1 15/19] accel: Include missing 'qemu/accel.h' header in accel-internal.h

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: In file included from ../../accel/accel-target.c:29: ../../accel/accel-internal.h:13:32: error: unknown type name 'AccelClass' 13 | void accel_init_ops_interfaces(AccelClass *ac); |^ Signed-off-by: Philippe

Re: [RFC PATCH-for-10.1 06/19] target/tricore: Replace TARGET_LONG_BITS -> target_long_bits()

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- target/tricore/translate.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) The temptation is good, but please do not touch any target code at this point. We want to focus on defining the A

Re: [RFC PATCH-for-10.1 14/19] accel: Implement accel_init_ops_interfaces() for both system/user mode

On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- accel/{accel-system.h => accel-internal.h} | 8 accel/accel-system.c | 4 ++-- accel/accel-target.c | 10 ++ accel/accel-user.c

Re: [PULL 0/6] tcg patch queue for 10.0-rc3

Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes. signature.asc Description: PGP signature

Re: [PATCH v8 00/28] vfio-user client

John, On 2/19/25 15:48, John Levon wrote: This is the 8th revision of the vfio-user client implementation. The vfio-user protocol allows for implementing (PCI) devices in another userspace process; SPDK is one example, which includes a virtual NVMe implementation. The vfio-user framework consis

Re: [RFC PATCH-for-10.1 19/19] system/vl: Filter machine list for binary using machine_binary_filter()

On 4/4/25 11:08, Pierrick Bouvier wrote: On 4/4/25 11:01, Philippe Mathieu-Daudé wrote: Hi Pierrick, On 4/4/25 19:10, Pierrick Bouvier wrote: On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé ---   system/vl.c | 24   1 file chan

Re: [PATCH RFC 0/3] Attempt to add GHES for x86

On Tue, 4 Mar 2025 14:30:55 +0100 Mauro Carvalho Chehab wrote: > Hi Igor, > > This patch series comes after: > > https://lore.kernel.org/qemu-devel/cover.1740903110.git.mchehab+hua...@kernel.org/ > > I'm basically trying to add support for error injection for x86, > without success so far.

Re: [PATCH 6/6] target/hexagon: Add memory order definition

On 4/3/25 19:52, Brian Cain wrote: From: Brian Cain Signed-off-by: Brian Cain --- target/hexagon/cpu-param.h | 5 + 1 file changed, 5 insertions(+) diff --git a/target/hexagon/cpu-param.h b/target/hexagon/cpu-param.h index 45ee7b4640..ccaf6a9d28 100644 --- a/target/hexagon/cpu-param.h

Re: [RFC PATCH-for-10.1 03/39] target/arm: Filter CPU types for binary

On 4/3/25 16:57, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.c | 2 ++ target/arm/cpu64.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 377791c84dd..b1aa482c726 100644 --- a/target/arm/cpu.c +++ b

Re: [PATCH-for-10.0 0/2] hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600

On 4/1/25 01:04, Philippe Mathieu-Daudé wrote: Mark SCU MemoryRegionOps read/write handler implementations as 32-bit, then allow down to 8-bit accesses. Joel Stanley (1): hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600 Philippe Mathieu-Daudé (1): hw/misc/aspeed_scu:

[PATCH] Rust: Add tracing and logging support for Rust code

This change introduces initial support for tracing and logging in Rust-based QEMU code. As an example, tracing and logging have been implemented in the pl011 device, which is written in Rust. - Updated `rust/wrapper.h` to include the `qemu/log.h` and `hw/char/trace.h` header. - Added log.rs to wr

Re: [PATCH] Rust: Add tracing and logging support for Rust code

On Mon, Mar 31, 2025 at 07:26:33PM -0500, saman wrote: > This change introduces initial support for tracing and logging in Rust-based > QEMU code. As an example, tracing and logging have been implemented in the > pl011 device, which is written in Rust. > > - Updated `rust/wrapper.h` to include the

Re: [RFC PATCH-for-10.1 01/39] target/arm: Implement per-binary TargetInfo structures

On 4/3/25 16:57, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- meson.build | 1 + target/arm/target_info-aarch64-softmmu.c | 24 target/arm/target_info-arm-softmmu.c | 24 target/ar

Re: [PATCH for-10.1 16/32] vfio: Move vfio_get_info_dma_avail() into helpers.c

On Tue, Mar 18, 2025 at 10:53:59AM +0100, Cédric Le Goater wrote: > vfio_get_info_dma_avail() is a low level routine similar to the other > routines extracting capabilities from 'struct vfio_iommu_type1_info'. > It belongs to file "helpers.c". > > Signed-off-by: Cédric Le Goater Reviewed-by: Jo

Re: [PATCH] hw/ipmi: Move vmsd registration to device class

Corey Minyard writes: > It's the right way to do it now, and it handles multiple instances > properly. I need multiple instances for some testing I'm doing so this > is the right thing to do. > > Tested by doing: > >(qemu) migrate -d exec:cat>filen.mig > > before and after the fix, then: > >

Re: [PATCH v3 03/29] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c

On 4/1/25 20:31, Philippe Mathieu-Daudé wrote: On 25/3/25 05:58, Pierrick Bouvier wrote: Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/cpu-all.h | 4 cpu-target.c | 4 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/in

Re: [PATCH] target/riscv: support atomic instruction fetch (Ziccif)

On Fri, Jun 7, 2024 at 8:15 PM Jim Shu wrote: > > Support 4-byte atomic instruction fetch when instruction is natural > aligned. > > Current implementation is not atomic because it loads instruction twice > for first and last 2 bytes. We load 4 bytes at once to keep the > atomicity. This instructi

Re: [PATCH v8 08/28] vfio: add region cache

On Fri, Apr 04, 2025 at 06:57:46PM +0200, Cédric Le Goater wrote: > > > why not populate vbasedev->regions[index] in vfio_get_all_regions() ? > > > > Good question. I presume it's not possible for us to ever look up a region > > that has somehow appeared *after* vfio_prepare_device() ? > > > > W

hw/nvme: Issue with multiple controllers behind a subsystem

I'm running into a issue with the latest qemu-nvme with v10.0.0-rc2 with regards to multiple controllers behind a subsystem.  When I setup a subsystem with 2 controllers, each with a private/non-shared namespace, the two private/non-shared namespaces all get attached to one of the controllers.

[PATCH] gdbstub: Implement qqemu.Pid packet

This patch adds support for the `qqemu.Pid` packet to the qemu gdbstub which can be used by clients to get the QEMU process PID. This is useful for plugins like Pwndbg [0] or gdb-pt-dump in order to inspect the QEMU process memory through the /proc/self/{maps,mem} interfaces. Without this feature,

Re: [RFC PATCH-for-10.1 08/19] target/riscv: Replace TARGET_LONG_BITS -> target_long_bits()

On 4/4/25 18:48, Pierrick Bouvier wrote: On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé ---   hw/riscv/riscv-iommu.c | 3 ++-   hw/riscv/riscv_hart.c  | 3 ++-   2 files changed, 4 insertions(+), 2 deletions(-) The temptation is good, but please do not tou

Re: [RFC PATCH-for-10.1 07/19] target/hppa: Replace TARGET_LONG_BITS -> target_long_bits()

On 4/4/25 18:48, Pierrick Bouvier wrote: On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé ---   target/hppa/mem_helper.c | 3 ++-   target/hppa/translate.c  | 3 ++-   2 files changed, 4 insertions(+), 2 deletions(-) The temptation is good, but please do not

Re: [RFC PATCH-for-10.1 11/19] accel/tcg: Replace CPU_RESOLVING_TYPE -> target_cpu_type()

On 4/4/25 18:51, Pierrick Bouvier wrote: On 4/3/25 16:49, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé ---   accel/tcg/tcg-all.c | 4 ++--   1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index bf27c5c0fb3..a13cb3964

Re: [PATCH v4] block/file-posix.c: Use pwritev2() with RWF_DSYNC for FUA

On Fri, Apr 04, 2025 at 12:42:33AM -0700, Pinku Deb Nath wrote: > Full Unit Access (FUA) is an optimization where a disk write with the > flag set will be persisted to disk immediately instead of potentially > remaining in the disk's write cache. This commit address the todo task > for using pwrite

Re: [RFC PATCH-for-10.1 04/19] qemu: Convert target_words_bigendian() to TargetInfo API

On 4/3/25 16:48, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- include/exec/tswap.h| 13 + include/qemu/target_info-impl.h | 4 include/qemu/target_info.h | 11 +++ cpu-target.c| 6 -- hw/core/cpu

Re: [RFC PATCH-for-10.1 00/39] single-binary: Make hw/arm/ common

On 4/4/25 19:12, Pierrick Bouvier wrote: On 4/3/25 16:57, Philippe Mathieu-Daudé wrote: Hi, At this point this series is mostly a draft for Pierrick. After introducing the generic TargetInfo API [*], we implement the ARM variants, then use the API to remove target-specific code, allowing to ev

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