+qemu-block@
On 4/4/25 14:06, Cédric Le Goater wrote:
Hello,
On 4/2/25 11:14, Kane-Chen-AS wrote:
This patch introduces part of the Secure Boot Controller device,
which consists of several sub-components, including an OTP memory,
OTP controller, cryptographic engine, and boot controller.
In this version, the implementation includes the OTP memory and its
controller. The OTP memory can be programmed from within the guest
OS via a software utility.
What is the OTP memory ? An external flash device or built-in SRAM ?
If the latter, I suggest using an allocated buffer under the SBC model
and avoid the complexity of the BlockBackend implementation and
the definition of a drive on the command line for it. The
proposal is bypassing a lot of QEMU layers for this purpose.
More of the former, a built-in eFuse behaving more like flash. So using
block backend for the storage seems correct to me. However I don't think
the implementation belongs to hw/misc/aspeed_sbc; ideally we'd have some
abstract (or interface) implementation in hw/block/otp.c -- with methods
such program_otp_data() --, completed by hw/block/aspeed_otc.c.
Current patch might be good enough to start with IMHO.
Regards,
Phil.
