Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tcg-op-ldst.c | 21 +++--
tcg/tcg.c | 4 +---
2 files changed, 4 insertions(+), 21 deletions(-)
diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c
index 77271e0193..7ba9a3ef7e 100644
--- a/tcg/
Since we no longer support 64-bit guests on 32-bit hosts,
we can use a 32-bit type on a 32-bit host.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/vaddr.h | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/include/exec/va
On 2/17/25 00:01, Philippe Mathieu-Daudé wrote:
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h | 3 +--
tcg/optimize.c | 9 +++--
tcg/tcg-op.c | 21 ++---
tcg/tcg.c | 6 ++-
On 2/17/25 00:29, Philippe Mathieu-Daudé wrote:
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h | 5 +
tcg/optimize.c | 9 +
tcg/tcg-op.c | 8
tcg/tcg.c | 6 ++
tcg/tci.c
On 7/10/24 15:00, Hanna Czenczek wrote:
On 05.06.24 15:25, Jean-Louis Dupond wrote:
When discard is not set to unmap/on, we should not allow setting
discard-no-unref.
Is this important? Technically, it’s an incompatible change, and
would require a deprecation warning first.
No it doesn't
On 17.02.2025 14:48, Cédric Le Goater wrote:
On 2/14/25 21:58, Maciej S. Szmigiero wrote:
On 12.02.2025 14:47, Cédric Le Goater wrote:
On 1/30/25 11:08, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
The multifd received data needs to be reassembled since device state
packets sent vi
On Fri, Feb 7, 2025 at 4:28 AM Paolo Bonzini wrote:
>
> Prepare for adding more fields to RISCVCPUDef and reading them in
> riscv_cpu_init: instead of storing the misa_mxl_max field in
> RISCVCPUClass, ensure that there's always a valid RISCVCPUDef struct
> and go through it.
>
> Signed-off-by: Pa
On Mon, Feb 17, 2025 at 9:38 PM Eric Auger wrote:
>
> Currently the IOMMU may be reset before the devices
> it protects. For example this happens with virtio devices
> but also with VFIO devices. In this latter case this
> produces spurious translation faults on host.
>
> Let's use 3-phase reset m
On Mon, Feb 17, 2025 at 9:38 PM Eric Auger wrote:
>
> Currently the iommu may be reset before the devices
> it protects. For example this happens with virtio-net.
>
> Let's use 3-phase reset mechanism and reset the IOMMU on
> exit phase after all DMA capable devices have been
> reset during the 'e
On 2/17/2025 8:08 PM, Paolo Bonzini wrote:
It is possible to start QEMU with a confidential-guest-support object
even in TCG mode. While there is already a check in qemu_machine_creation_done:
if (machine->cgs && !machine->cgs->ready) {
error_setg(errp, "accelerator does not suppo
The declaration uses uint64_t for addr.
Fixes: 595cd9ce2ec ("plugins: add plugin API to read guest memory")
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
plugins/api.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/plugins/api.c b/plugins/api.c
in
On 2/17/25 05:06, Philippe Mathieu-Daudé wrote:
Simplify user implementation of cpu_memory_rw_debug() by
taking the mmap lock globally. See commit 87ab2704296
("linux-user: Allow gdbstub to ignore page protection")
for why this lock is necessary.
Suggested-by: Richard Henderson
Signed-off-by: P
On 2/17/25 05:06, Philippe Mathieu-Daudé wrote:
Commit 35c653c4029 ("tcg: Add 128-bit guest memory
primitives") introduced the use of bswap128() which is
declared in "qemu/int128.h", commit de95016dfbf ("accel/tcg:
Implement helper_{ld,st}*_mmu for user-only") introduced the
other bswap*() uses,
On 2/17/25 05:06, Philippe Mathieu-Daudé wrote:
We checked the page flags with page_get_flags(), so
locking the page is superfluous. Remove the lock_user()
calls and directly use g2h() in place.
Suggested-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
cpu-target.c | 17 ++-
On 2/17/25 05:06, Philippe Mathieu-Daudé wrote:
cpu_memory_rw_debug() system implementation is defined in
system/physmem.c. Move the user one to accel/tcg/user-exec.c
to simplify cpu-target.c maintenance.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/user-exec.c | 80
On 17.02.25 17:40, Albert Esteve wrote:
Hi all,
Hi,
looks like our debugging session was successfu :)
One question below.
v3->v4
- Change mmap strategy to use RAM blocks
and subregions.
- Add new bitfield to qmp feature map
- Followed most review comments from
last iteration.
- Merge
On Fri, 10 Jan 2025 at 13:23, Alex Bennée wrote:
> Now that we have virtio-gpu Vulkan support, let's add a test for it.
> Currently this is using images build by buildroot:
>
> https://lists.buildroot.org/pipermail/buildroot/2024-December/768196.html
>
> Reviewed-by: Thomas Huth
> Signed-off-by
Am 17. Februar 2025 13:28:42 UTC schrieb Peter Maydell
:
>On Tue, 4 Feb 2025 at 09:21, Bernhard Beschow wrote:
>>
>> On a real device, the boot ROM contains the very first instructions the CPU
>> executes. Also, U-Boot calls into the ROM to determine the boot device. While
>> we're not actuall
Prasad Pandit writes:
> From: Prasad Pandit
>
> Enable Multifd and Postcopy migration together.
> The migration_ioc_process_incoming() routine
> checks magic value sent on each channel and
> helps to properly setup multifd and postcopy
> channels.
>
> The Precopy and Multifd threads work during
On 12.02.2025 17:19, Cédric Le Goater wrote:
On 2/12/25 16:48, Cédric Le Goater wrote:
On 1/30/25 11:08, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Since it's important to finish loading device state transferred via the
main migration channel (via save_live_iterate SaveVMHandler)
On 12.02.2025 17:21, Cédric Le Goater wrote:
On 1/30/25 11:08, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Load device config received via multifd using the existing machinery
behind vfio_load_device_config_state().
Also, make sure to process the relevant main migration channel fla
On 12.02.2025 16:48, Cédric Le Goater wrote:
On 1/30/25 11:08, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Since it's important to finish loading device state transferred via the
main migration channel (via save_live_iterate SaveVMHandler) before
starting loading the data asynchrono
On 2/17/25 5:19 AM, Yong-Xuan Wang wrote:
KVM AIA is only needed to be set when the virt machine use the AIA MSI.
So we can move the KVM AIA configuration into virt_create_aia() to reduce
the condition checking.
Signed-off-by: Yong-Xuan Wang
---
Unfortunately this doesn't work.
The reason
On 2/17/25 04:50, Peter Maydell wrote:
Currently we have a compile-time shortcut where we return a hardcode
value from snan_bit_is_one() on everything except MIPS, because we
know that's the only target that needs to change
status->no_signaling_nans at runtime.
Pasto from the previous patch on
On 2/17/25 04:50, Peter Maydell wrote:
Currently we have a compile-time shortcut where we
return false from no_signaling_nans() on everything except
Xtensa, because we know that's the only target that
might ever set status->no_signaling_nans.
Remove the ifdef, so we always look at the status fla
On 2/17/25 04:50, Peter Maydell wrote:
Now we have removed all the target-specifics from the softfloat code,
we can switch to building it once for the whole system rather than
once per target.
Signed-off-by: Peter Maydell
---
fpu/softfloat.c | 3 ---
fpu/meson.build | 2 +-
2 files changed,
On 2/17/25 04:50, Peter Maydell wrote:
We happen to know that for the PPC target the FP status flags (and in
particular float_flag_inexact) will always be cleared before a
floating point operation, and so can_use_fpu() will always return
false. So we speed things up a little by forcing QEMU_NO_H
On 12.02.2025 18:03, Cédric Le Goater wrote:
On 1/30/25 11:08, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Implement the multifd device state transfer via additional per-device
thread inside save_live_complete_precopy_thread handler.
Switch between doing the data transfer in the ne
On 17.02.2025 10:38, Cédric Le Goater wrote:
On 2/14/25 21:55, Maciej S. Szmigiero wrote:
On 12.02.2025 11:55, Cédric Le Goater wrote:
On 1/30/25 11:08, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Add support for VFIOMultifd data structure that will contain most of the
receive-sid
On 2/17/25 04:50, Peter Maydell wrote:
Currently we compile-time set an 'm68k_denormal' flag in the FloatFmt
for floatx80 for m68k. This controls our handling of what the Intel
documentation calls a "pseudo-denormal": a value where the exponent
field is zero and the explicit integer bit is set.
From: Mikael Szreder
The gdbstub implementation for the Sparc architecture would
incorrectly calculate the the floating point register offset.
This resulted in, for example, registers f32 and f34 to point to
the same value.
The issue was caused by the confusion between even register numbers
and
This is now prohibited in configuration.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
include/qemu/atomic.h | 18 +++--
include/tcg/oversized-guest.h | 23 --
accel/tcg/cputlb.c | 7 ---
accel/tcg/tcg-all.c
Eliminate code repetition by using the appropriate helpers.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.c.inc | 65 +--
1 file changed, 8 insertions(+), 57 deletions(-)
diff --git a/tcg/i386/tcg-target.c.inc b
On 2/17/25 00:29, Philippe Mathieu-Daudé wrote:
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h | 3 +--
tcg/optimize.c | 9 +
tcg/tcg-op.c | 16
tcg/tcg.c | 6 ++
On 2/16/25 5:11 PM, dan tan wrote:
*** BLURB HERE ***
Version 9 summary:
1/3 tpm/tpm_tis_spi: Support TPM for SPI
- rebased with the master, and conform with the latest
device property definition
3/3 tests/qtest/tpm: add unit test to tis-spi
- remove unn
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 17 +
tcg/tcg-op.c | 8
tcg/tcg.c| 9 +++--
tcg/tci.c| 6 ++
docs/d
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 17 +
tcg/tcg-op.c | 10 +-
tcg/tcg.c| 9 +++--
tcg/tci.c| 6 ++
docs
Hi Alex and Paolo,
I hit an compiling error with "./configure --enable-rust" at this patch:
[69/124] Compiling Rust source ../rust/qemu-api/tests/tests.rs
FAILED: rust/qemu-api/rust-qemu-api-integration
rustc -C linker=cc -C link-arg=-m64 --color=auto -C debug-assertions=yes -C
overflow-checks=n
On 17/1/25 18:02, Philippe Mathieu-Daudé wrote:
We already have "qemu/compiler.h" for compiler-specific arrangements,
automatically included by "qemu/osdep.h" for each source file. No
need to explicitly include a header for a Clang particularity.
Suggested-by: Pierrick Bouvier
Reviewed-by: Pier
On 17/2/25 00:09, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 2 +-
tcg/tcg-op.c | 8
tcg/tcg.c| 9 +++--
tcg/tci.c| 6 ++
docs/devel/tcg-ops.rst |
On 17/2/25 00:09, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 22 +++---
tcg/tcg-op.c | 12 ++--
tcg/tcg.c| 9 +++--
tcg/tci.c| 12 --
On 17/2/25 00:09, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h | 5 +
tcg/optimize.c | 10 +-
tcg/tcg-op.c | 16
tcg/tcg.c | 6 ++
docs/devel/tcg-ops.rst | 4 ++--
Support user-space emulation of SIREG and STOPEI CSR with KVM
acceleration. For SIREG emulation, the SISELECT CSR value and iprio
array must be loaded before handling, and since the iprio array might
be modified, it must be written back after the emulation.
When running with KVM acceleration, the
Modify memory_region_set_ram_discard_manager() to return false if a
RamDiscardManager is already set in the MemoryRegion. The caller must
handle this failure, such as having virtio-mem undo its actions and fail
the realize() process. Opportunistically move the call earlier to avoid
complex error ha
As the commit 852f0048f3 ("RAMBlock: make guest_memfd require
uncoordinated discard") highlighted, some subsystems like VFIO may
disable ram block discard. However, guest_memfd relies on the discard
operation to perform page conversion between private and shared memory.
This can lead to stale IOMMU
Add the description about "-accel kvm,kernel-irqchip=off" into
docs/specs/riscv-aia.rst and docs/system/riscv/virt.rst.
Signed-off-by: Yong-Xuan Wang
---
docs/specs/riscv-aia.rst | 24 ++--
docs/system/riscv/virt.rst | 10 ++
2 files changed, 24 insertions(+), 10 de
As guest_memfd is now managed by memory_attribute_manager with
RamDiscardManager, only block uncoordinated discard.
Signed-off-by: Chenyi Qiang
---
Changes in v2:
- Change the ram_block_discard_require(false) to
ram_block_coordinated_discard_require(false).
---
system/physmem.c | 6 +++
Add KVM_REG_RISCV_CSR_SMSTATEEN support to get/set the context of
Smstateen extension in VS mode.
Signed-off-by: Yong-Xuan Wang
---
target/riscv/kvm/kvm-cpu.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
in
KVM AIA is only needed to be set when the virt machine use the AIA MSI.
So we can move the KVM AIA configuration into virt_create_aia() to reduce
the condition checking.
Signed-off-by: Yong-Xuan Wang
---
hw/riscv/virt.c | 79 +++--
1 file changed, 37 i
This series introduces the user-space AIA MSI emulation when using KVM
acceleration.
After this series, RISC-V QEMU virt machine with KVM acceleration has
3 parameters to control the type of irqchip and its emulation method:
- Machine prop "aia" controls the type of irqchip
- none: use PLIC and
As KVM_REG_RISCV_CSR includes several subtypes of CSR, rewrite the
related macros and functions to prepare for other subtypes.
Signed-off-by: Yong-Xuan Wang
---
target/riscv/kvm/kvm-cpu.c | 70 +++---
1 file changed, 43 insertions(+), 27 deletions(-)
diff --git a
Rewrite the kvm_riscv_handle_csr() to support additional CSR emulation
in user space with KVM acceleration. This update reuses the TCG CSR
emulation function to simplify the implementation and reduce the
redundant work. Also it introduces two hook functions for certain CSRs.
Before emulation, the r
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 10 +-
tcg/tcg-op.c | 22 ++
tcg/tcg.c| 6 ++
tcg/tci.c| 4 ++--
docs
Il lun 17 feb 2025, 07:35 Zhao Liu ha scritto:
> > @@ -347,14 +330,13 @@ static const VMStateDescription vmstate_hpet = {
> > .version_id = 2,
> > .minimum_version_id = 1,
> > .pre_save = hpet_pre_save,
> > -.pre_load = hpet_pre_load,
> > .post_load = hpet_post_load,
> >
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 9 +++--
tcg/tcg-op.c | 21 ++---
tcg/tcg.c| 6 ++
tcg/tci.c| 6 ++
docs
The netdev reports NETDEV_VHOST_USER_CONNECTED event when
the chardev is connected, and NETDEV_VHOST_USER_DISCONNECTED
when it is disconnected.
The NETDEV_VHOST_USER_CONNECTED event includes the chardev id.
This allows a system manager like libvirt to detect when the server
fails.
For instance w
In legacy doorbell mode, the command descriptor slot matched
the UTRD slot. To maintain consistency in MCQ mode, command descriptor
slot allocation and deallocation now use a bitmap-based approach.
Acked-by: Fabiano Rosas
Signed-off-by: Jeuk Kim
---
tests/qtest/ufs-test.c | 562
Removed dead code related to the unimplemented task
management request.
Acked-by: Fabiano Rosas
Signed-off-by: Jeuk Kim
---
tests/qtest/ufs-test.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/tests/qtest/ufs-test.c b/tests/qtest/ufs-test.c
index 1f860b41c0..ce
s/pull-ufs-20250217
for you to fetch changes up to a54596a96006096798b172a368ae952a231f9f72:
tests/qtest/ufs-test: Add test code for MCQ functionality (2025-02-17
18:20:53 +0900)
ufs updates for MCQ testing
- Remove u
On 14/02/25 05:43PM, Jonathan Cameron wrote:
On Fri, 14 Feb 2025 18:52:11 +0530
Sweta Kumari wrote:
1)get alert configuration(Opcode 4201h)
2)set alert configuration(Opcode 4202h)
Move the change log to below the ---
The key thing being git then doesn't pick it up whilst applying the patch.
Hi Paolo,
> --- a/hw/timer/Kconfig
> +++ b/hw/timer/Kconfig
> @@ -11,7 +11,7 @@ config A9_GTIMER
>
> config HPET
> bool
> -default y if PC
> +default y if PC && !HAVE_RUST
+
+config X_HPET_RUST
+bool
+default y if PC && HAVE_RUST
> config I8254
> bool
This patch do
From: Marc-André Lureau
Fix SDL backend compilation for win32.
Fixes: commit 31287d1af4 ("ui/sdl2: Implement dpy dmabuf functions")
Signed-off-by: Marc-André Lureau
---
ui/sdl2-gl.c | 2 ++
ui/sdl2.c| 4
2 files changed, 6 insertions(+)
diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c
index
Add serial number parameter in the cxl persistent examples.
Signed-off-by: Yuquan Wang
---
docs/system/devices/cxl.rst | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst
index 882b036f5e..e307caf3f8 100
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 4 +---
tcg/optimize.c | 6 +++---
tcg/tcg-op.c | 4 ++--
tcg/tcg.c| 24
tcg/tci.c| 6 ++
docs/
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 2 +-
tcg/tcg-op.c | 4 ++--
tcg/tcg.c| 15 +--
tcg/tci.c| 4 ++--
docs/devel/tcg-ops.rs
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 7 +++
tcg/tcg-op.c | 8
tcg/tcg.c| 9 +++--
tcg/tci.c| 5 ++---
docs/devel/tcg-ops.rst
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 4 +---
tcg/optimize.c | 7 +++
tcg/tcg-op.c | 8
tcg/tcg.c| 9 +++--
tcg/tci.c| 5 ++---
docs/devel/tcg-o
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 10 +-
tcg/tcg-op.c | 16
tcg/tcg.c| 6 ++
tcg/tci.c| 4 ++--
docs/devel
On 17/2/25 00:09, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 14 --
tcg/tcg-op.c | 8
tcg/tcg.c| 9 +++--
tcg/tci.c| 12
doc
Hi Shameer, Nicolin,
>-Original Message-
>From: Duan, Zhenzhong
>Subject: RE: [RFC PATCH 0/5] hw/arm/virt: Add support for user-creatable nested
>SMMUv3
>
>Hi Shameer,
>
>>-Original Message-
>>From: Shameerali Kolothum Thodi
>>Subject: RE: [RFC PATCH 0/5] hw/arm/virt: Add support
On Sat, 15 Feb 2025 at 02:17, Keith Packard via wrote:
>
> This ensure that the CPU gets reset every time QEMU resets.
>
> Signed-off-by: Keith Packard
> ---
> target/rx/cpu.c | 11 ++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/target/rx/cpu.c b/target/rx/cpu.c
>
On Mon, Feb 17, 2025 at 11:48:49AM +0100, Ilya Leoshkevich wrote:
> Date: Mon, 17 Feb 2025 11:48:49 +0100
> From: Ilya Leoshkevich
> Subject: [PATCH] stub: Remove monitor-fd.c
> X-Mailer: git-send-email 2.48.1
>
> Both monitor-fd.c and monitor-internal.c contain a stub for
> monitor_get_fd(), whi
John Snow writes:
> This is being done primarily to ensure consistency between the source
> documents and the final, rendered HTML output. Because
> member/feature/returns sections will always appear in a visually grouped
> element in the HTML output, prohibiting free paragraphs between those
> s
Hi
On Mon, Feb 17, 2025 at 3:16 PM wrote:
>
> From: Marc-André Lureau
>
> Fix SDL backend compilation for win32.
>
> Fixes: commit 31287d1af4 ("ui/sdl2: Implement dpy dmabuf functions")
Pierre-Eric, I realize this is not yet upstream. Can you update your
patch? thanks
>
> Signed-off-by: Marc-
Add a helper function to get CSR name from CSR number.
Signed-off-by: Yong-Xuan Wang
---
target/riscv/cpu.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 616c3bdc1c24..133d1852ee1e 100644
--- a/target/riscv/cpu.h
+++ b/targ
Rename the helper to memory_region_section_intersect_range() to make it
more generic. Meanwhile, define the @end as Int128 and replace the
related operations with Int128_* format since the helper is exported as
a wider API.
Suggested-by: Alexey Kardashevskiy
Reviewed-by: David Hildenbrand
Signed
Let kvm_msicfgaddr use the same format with mmsicfgaddr and smsicfgaddr.
Signed-off-by: Yong-Xuan Wang
---
hw/intc/riscv_aplic.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index e5714267c096..5964cd
Introduce a new field, memory_attribute_manager, in RAMBlock to link to
an MemoryAttributeManager object. This change centralizes all
guest_memfd state information (like fd and shared_bitmap) within a
RAMBlock, making it easier to manage.
Use the realize()/unrealize() helpers to initialize/uniniti
Add KVM_REG_RISCV_CSR_AIA support to get/set the context of AIA
extension in VS mode.
Signed-off-by: Yong-Xuan Wang
---
target/riscv/kvm/kvm-cpu.c | 45 ++
1 file changed, 45 insertions(+)
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
i
When the APLIC is emulated in the kernel, the GPIO output lines to CPUs
can be remove. In this case the APLIC trigger CPU interrupts by KVM APIs.
This patch also move the code that claim the CPU interrupts to the
beginning of APLIC realization. This can avoid the unnecessary resource
allocation be
Reorder the code to reduce the conditional checking and remove
unnecessary resource setting when using in-kernl AIA irqchip.
Yong-Xuan Wang (4):
hw/riscv/virt: KVM AIA refinement
hw/intc/imsic: refine the IMSIC realize
hw/intc/aplic: refine the APLIC realize
hw/intc/aplic: refine kvm_msicf
When the IMSIC is emulated in the kernel, the GPIO output lines to CPUs
and aia_ireg_rmw_fn setting can be remove. In this case the IMSIC
trigger CPU interrupts by KVM APIs, and the RMW of IREG is handled in
kernel.
This patch also move the code that claim the CPU interrupts to the
beginning of IM
Introduce a new state_change() callback in MemoryAttributeManagerClass to
efficiently notify all registered RamDiscardListeners, including VFIO
listeners about the memory conversion events in guest_memfd. The
existing VFIO listener can dynamically DMA map/unmap the shared pages
based on conversion
The riscv-aia property only controls the in-kernel IMSIC mode, the
emulation of AIA MSI mode is controlled by the kernel-irqchip property.
Rename the riscv-aia property to riscv-imsic to prevent the confusion.
Signed-off-by: Yong-Xuan Wang
---
target/riscv/kvm/kvm-cpu.c | 52
On Mon, Feb 17, 2025 at 09:02:24AM +0100, Paolo Bonzini wrote:
> Date: Mon, 17 Feb 2025 09:02:24 +0100
> From: Paolo Bonzini
> Subject: Re: [PATCH v2] hpet: do not overwrite properties on post_load
>
> Il lun 17 feb 2025, 07:35 Zhao Liu ha scritto:
>
> > > @@ -347,14 +330,13 @@ static const VMS
On 17/2/25 00:10, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 19 +---
tcg/optimize.c | 27 -
tcg/tcg-op.c | 24 +++
tcg/tcg.c| 64 ++--
On 17/2/25 00:10, Richard Henderson wrote:
All integer opcodes are now converted to TCGOutOp.
Signed-off-by: Richard Henderson
---
tcg/tcg.c| 12 +++-
tcg/aarch64/tcg-target.c.inc | 7 ---
tcg/arm/tcg-target.c.inc | 7 ---
tcg/i386/tcg-
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 5 +
tcg/optimize.c | 9 +
tcg/tcg-op.c | 8
tcg/tcg.c| 6 ++
tcg/tci.c| 4 ++--
docs/devel/tcg-ops.rst
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 9 +
tcg/tcg-op.c | 16
tcg/tcg.c| 6 ++
tcg/tci.c| 5 ++---
docs/devel
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
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This is the v2 series of the shared device assignment support.
The overview of this series:
- Patch 1-2: preparation patches. One is to export a helper to get
intersection of a MemoryRegionSection with a given range. The other is
to change the memory_region_set_ram_discard_manager() to return
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 10 +-
tcg/tcg-op.c | 4 ++--
tcg/tcg.c| 6 ++
tcg/tci.c| 13 -
docs/devel/tc
Please take a look at the following CI failure:
https://gitlab.com/qemu-project/qemu/-/jobs/9153630625#L5195
Thanks,
Stefan
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
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On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 12 ++--
tcg/tcg-op.c | 4 ++--
tcg/tcg.c| 6 ++
tcg/tci.c| 12
docs/devel/t
On 17/2/25 00:08, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 17 +++--
tcg/tcg-op.c | 4 ++--
tcg/tcg.c| 6 ++
tcg/tci.c| 11 +++
docs/dev
On 14/02/2025 15:19, Daniel P. Berrangé wrote:
On Fri, Feb 14, 2025 at 01:59:20PM +, Daniel P. Berrangé wrote:
On Fri, Feb 14, 2025 at 11:18:55AM +0100, Laurent Vivier wrote:
On 14/02/2025 11:06, Markus Armbruster wrote:
Laurent Vivier writes:
The netdev reports NETDEV_VHOST_USER_CONNEC
Both monitor-fd.c and monitor-internal.c contain a stub for
monitor_get_fd(), which causes a duplicate symbol linker error when
linking rust-qemu-api-integration. Use monitor-internal.c instead of
monitor-fd.c and remove the latter.
Reported-by: Zhao Liu
Suggested-by: Zhao Liu
Fixes: fccb744f41c
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