Re: [PATCH v2 0/8] vhost-user-gpu: fix several security issues

2021-05-16 Thread Marc-André Lureau
Hi On Sun, May 16, 2021 at 7:04 AM Li Qiang wrote: > These security issue is low severity and is similar with the > virtio-vga/virtio-gpu device. All of them can be triggered by > the guest user. > > Change since v1: > Add the CVE information: > Several memory leak issues is combined assigned CV

[RFC PATCH v3 2/9] device_tree: Add qemu_fdt_add_path

2021-05-16 Thread Yanan Wang
From: Andrew Jones qemu_fdt_add_path() works like qemu_fdt_add_subnode(), except it also adds all missing subnodes from the given path. We'll use it in a coming patch where we will add cpu-map to the device tree. And we also tweak an error message of qemu_fdt_add_subnode(). Cc: David Gibson Cc

[RFC PATCH v3 0/9] hw/arm/virt: Introduce cpu topology support

2021-05-16 Thread Yanan Wang
Hi, This is v3 of the series [1] that I posted to introduce support of generating cpu topology descriptions to guest. Description: An accurate cpu topology may help improve the cpu scheduler's decision making when dealing with multi-core system. So cpu topology description is helpful to provide g

[RFC PATCH v3 1/9] hw/arm/virt: Disable cpu topology support on older machine types

2021-05-16 Thread Yanan Wang
Add a compat variable "no_cpu_topology" used to determine if a machine type has enabled support of generating cpu topology description for the guest. Also, for compatibility we disable this support on older machine types. On existing older machine types, without cpu topology description in ACPI or

[RFC PATCH v3 5/9] hw/arm/virt-acpi-build: Use possible cpus in generation of DSDT

2021-05-16 Thread Yanan Wang
When building ACPI tables regarding CPUs we should always build them for the number of possible CPUs, not the number of present CPUs. So we create cpu nodes in DSDT for possible cpus and then ensure only the present CPUs are marked useful. Co-developed-by: Andrew Jones Signed-off-by: Andrew Jones

[RFC PATCH v3 7/9] hw/acpi/aml-build: Add Processor hierarchy node structure

2021-05-16 Thread Yanan Wang
Add a generic API to build Processor hierarchy node structure (Type 0), which is strictly consistent with descriptions in ACPI 6.2: 5.2.29.1. This function will be used to build ACPI PPTT table for cpu topology. Co-developed-by: Ying Fang Signed-off-by: Ying Fang Co-developed-by: Henglong Fan

[RFC PATCH v3 4/9] hw/arm/virt: Initialize the present cpu members

2021-05-16 Thread Yanan Wang
We create and initialize a cpuobj for each present cpu in machvirt_init(). Now we also initialize the cpu member of structure CPUArchId for each present cpu in the function. This will be used to determine whether a cpu is present when generating ACPI tables in later patches. Co-developed-by: Ying

[RFC PATCH v3 3/9] hw/arm/virt: Add cpu-map to device tree

2021-05-16 Thread Yanan Wang
From: Andrew Jones Support device tree CPU topology descriptions. In accordance with the Devicetree Specification, the Linux Doc "arm/cpus.yaml" requires that cpus and cpu nodes in the DT are present. And we meet the requirement by creating /cpus/cpu@* nodes for members within ms->smp.cpus. Cor

[RFC PATCH v3 0/4] hw/arm/virt: Introduce cluster cpu topology support

2021-05-16 Thread Yanan Wang
Hi, This is v3 of the series [1] that I posted to introduce cluster cpu topology besides now existing sockets, cores, and threads for ARM platform. Description: In implementations of ARM architecture, at most there could be a cpu hierarchy like "sockets/dies/clusters/cores/threads" defined. For e

[RFC PATCH v3 9/9] hw/arm/virt: Add separate -smp parsing function for ARM machines

2021-05-16 Thread Yanan Wang
The cpu hierarchy topology information parsed out from QEMU -smp command line will be exposed to guest kernel through ACPI and DT since machine type 6.1, so we will expect more detailed topology descriptions and will be more strict with the -smp cmdlines when parsing them. Compared with the defaul

[RFC PATCH v3 8/9] hw/arm/virt-acpi-build: Generate PPTT table

2021-05-16 Thread Yanan Wang
From: Andrew Jones Add the Processor Properties Topology Table (PPTT) to expose CPU topology information defined by users to ACPI guests. Note, a DT-boot Linux guest with a non-flat CPU topology will see socket and core IDs being sequential integers starting from zero, which is different from AC

[RFC PATCH v3 2/4] hw/arm/virt: Add cluster level to device tree

2021-05-16 Thread Yanan Wang
Add a cluster level between core level and socket level to ARM device tree. This is also consistent with content in Linux Doc "Documentation/devicetree/bindings/cpu/cpu-topology.txt". Reviewed-by: Andrew Jones Signed-off-by: Yanan Wang --- hw/arm/virt.c | 12 1 file changed, 8 inse

[RFC PATCH v3 6/9] hw/arm/virt-acpi-build: Use possible cpus in generation of MADT

2021-05-16 Thread Yanan Wang
When building ACPI tables regarding CPUs we should always build them for the number of possible CPUs, not the number of present CPUs. So we create gicc nodes in MADT for possible cpus and then ensure only the present CPUs are marked ENABLED. Furthermore, it also needed if we are going to support CP

[RFC PATCH v3 4/4] hw/arm/virt: Parse -smp cluster parameter in virt_smp_parse

2021-05-16 Thread Yanan Wang
There is a separate function virt_smp_parse() in hw/virt/arm.c used to parse cpu topology for the ARM machines. So add parsing of -smp cluster parameter in it, then total number of logical cpus will be calculated like: max_cpus = sockets * clusters * cores * threads. Note, we will assume multi-clu

[RFC PATCH v3 1/4] vl.c: Add -smp, clusters=* command line support for ARM cpu

2021-05-16 Thread Yanan Wang
In implementations of ARM architecture, at most there could be a cpu hierarchy like "sockets/dies/clusters/cores/threads" defined. For example, ARM64 server chip Kunpeng 920 totally has 2 sockets, 2 NUMA nodes (also means cpu dies) in each socket, 6 clusters in each NUMA node, 4 cores in each clust

[RFC PATCH v3 3/4] hw/arm/virt-acpi-build: Add cluster level to PPTT table

2021-05-16 Thread Yanan Wang
Add a Processor Hierarchy Node of cluster level between core level and socket level to ARM PPTT table. Reviewed-by: Andrew Jones Signed-off-by: Yanan Wang --- hw/arm/virt-acpi-build.c | 45 1 file changed, 27 insertions(+), 18 deletions(-) diff --git a/

Re: [PATCH] linux-user/syscall: zero-init msghdr in do_sendrecvmsg_locked

2021-05-16 Thread Laurent Vivier
Le 16/05/2021 à 11:15, Kenta Iwasaki a écrit : > The mixing of libc and kernel versions of the layout of the `msghdr` > struct causes EMSGSIZE to be returned by sendmsg if the `msghdr` struct > is not zero-initialized (such that padding bytes comprise of > uninitialized memory). > > Other parts of

Re: [PATCH v6 11/11] hvf: arm: Implement -cpu host

2021-05-16 Thread Alexander Graf
On 28.01.21 17:55, Peter Maydell wrote: > On Wed, 20 Jan 2021 at 22:44, Alexander Graf wrote: >> Now that we have working system register sync, we push more target CPU >> properties into the virtual machine. That might be useful in some >> situations, but is not the typical case that users want.

[PULL 00/46] softfloat: Convert float128 to FloatParts (part 1)

2021-05-16 Thread Richard Henderson
27;remotes/marcandre/tags/rtd-pull-request' into staging (2021-05-14 17:20:08 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-fp-20210516 for you to fetch changes up to 463b3f0d7fa11054daeb5ca22346f77d566795bf: softfloat: Move round_to_int_and_pa

[PULL 06/46] softfloat: Move the binary point to the msb

2021-05-16 Thread Richard Henderson
Rather than point the binary point at msb-1, put it at the msb. Use uadd64_overflow to detect when addition overflows instead of DECOMPOSED_OVERFLOW_BIT. This reduces the number of special cases within the code, such as shifting an int64_t either left or right during conversion. Reviewed-by: Alex

[PULL 02/46] qemu/host-utils: Add wrappers for overflow builtins

2021-05-16 Thread Richard Henderson
These builtins came in with gcc 5 and clang 3.8, which are slightly newer than our supported minimum compiler versions. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/qemu/host-utils.h | 225 ++ 1 file changed, 225 insertions(+) diff -

[PULL 04/46] accel/tcg: Use add/sub overflow routines in tcg-runtime-gvec.c

2021-05-16 Thread Richard Henderson
Obvious uses of the new functions. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime-gvec.c | 36 1 file changed, 16 insertions(+), 20 deletions(-) diff -

[PULL 22/46] softfloat: Use pointers with ftype_unpack_canonical

2021-05-16 Thread Richard Henderson
Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 509 ++-- 1 file changed, 320 insertions(+), 189 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index e02cbafaf9..e53d4a138f 100644 --- a/fpu/softfloat.c +++

[PULL 01/46] qemu/host-utils: Use __builtin_bitreverseN

2021-05-16 Thread Richard Henderson
Clang has added some builtins for these operations; use them if available. Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- include/qemu/host-utils.h | 16 1 file changed, 16 insertions(+) diff --git a/include/qemu/host-utils.h b/in

[PULL 07/46] softfloat: Inline float_raise

2021-05-16 Thread Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- include/fpu/softfloat.h| 5 - fpu/softfloat-specialize.c.inc | 12 2 files changed, 4 insertions(+), 13 deletions(-) diff --git a/include/fpu/softfloat.h b/include/

[PULL 09/46] softfloat: Tidy a * b + inf return

2021-05-16 Thread Richard Henderson
No reason to set values in 'a', when we already have float_class_inf in 'c', and can flip that sign. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c | 5 ++--- 1 file changed, 2 insertions(+), 3 d

[PULL 11/46] softfloat: Use return_nan in float_to_float

2021-05-16 Thread Richard Henderson
Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c | 8 +--- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 64edb23793..b694e38522 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat

[PULL 08/46] softfloat: Use float_raise in more places

2021-05-16 Thread Richard Henderson
We have been somewhat inconsistent about when to use float_raise and when to or in the bit by hand. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c | 87 + 1 file changed, 44

[PULL 25/46] softfloat: Rearrange FloatParts64

2021-05-16 Thread Richard Henderson
Shuffle the fraction to the end, otherwise sort by size. Add frac_hi and frac_lo members to alias frac. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 14 -- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softflo

[PULL 03/46] qemu/host-utils: Add wrappers for carry builtins

2021-05-16 Thread Richard Henderson
These builtins came in clang 3.8, but are not present in gcc through version 11. Even in clang the optimization is only ideal on x86_64, but never worse than the hand-coding that we currently do. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/qemu/host-utils.h | 50 +

[PULL 05/46] tests/fp: add quad support to the benchmark utility

2021-05-16 Thread Richard Henderson
From: Alex Bennée Currently this only support softfloat calculations because working out if the hardware supports 128 bit floats needs configure magic. The 3 op muladd operation is currently unimplemented so commented out for now. Reviewed-by: David Hildenbrand Signed-off-by: Alex Bennée Messa

[PULL 15/46] softfloat: Rename FloatParts to FloatParts64

2021-05-16 Thread Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c| 362 - fpu/softfloat-specialize.c.inc | 6 +- 2 files changed, 184 insertions(+), 184 deletions(-) diff --git a/fpu/softflo

[PULL 32/46] softfloat: Move round_canonical to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
At the same time, convert to pointers, renaming to parts$N_uncanon, and define a macro for parts_uncanon using QEMU_GENERIC. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 201 +- fpu/softfloat-parts.c.inc | 148

[PULL 10/46] softfloat: Add float_cmask and constants

2021-05-16 Thread Richard Henderson
Testing more than one class at a time is better done with masks. This reduces the static branch count. Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c | 30 +++--- 1 file changed, 23 insertions(+), 7 deletions

[PULL 12/46] softfloat: fix return_nan vs default_nan_mode

2021-05-16 Thread Richard Henderson
Do not call parts_silence_nan when default_nan_mode is in effect. This will avoid an assert in a later patch. Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c | 19 +++ 1 file changed, 7 insertions(+), 12 deletions(-)

[PULL 14/46] softfloat: Do not produce a default_nan from parts_silence_nan

2021-05-16 Thread Richard Henderson
Require default_nan_mode to be set instead. Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat-specialize.c.inc | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat

[PULL 35/46] softfloat: Implement float128_add/sub via parts

2021-05-16 Thread Richard Henderson
Replace the existing Berkeley implementation with the FloatParts implementation. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 257 +++- 1 file changed, 36 insertions(+), 221 deletions(-) diff --git a/fpu/softfloat.c

[PULL 16/46] softfloat: Move type-specific pack/unpack routines

2021-05-16 Thread Richard Henderson
In preparation from moving sf_canonicalize. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c | 109 +--- 1 file changed, 56 insertions(+), 53 deletions(-) diff --git a/fpu/softfl

[PULL 40/46] softfloat: Tidy mul128By64To192

2021-05-16 Thread Richard Henderson
Clean up the formatting and variables; no functional change. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/fpu/softfloat-macros.h | 22 ++ 1 file changed, 6 insertions(+), 16 deletions(-) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/soft

[PULL 13/46] target/mips: Set set_default_nan_mode with set_snan_bit_is_one

2021-05-16 Thread Richard Henderson
This behavior is currently hard-coded in parts_silence_nan, but setting this bit properly will allow this to be cleaned up. Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/mips/fpu_helper.h | 10 -- 1 file changed, 8 insertions(+), 2

[PULL 18/46] softfloat: Use pointers with unpack_raw

2021-05-16 Thread Richard Henderson
At the same time, rename to unpack_raw64. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- fpu/softfloat.c | 29 +++-- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c inde

[PULL 31/46] softfloat: Move sf_canonicalize to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
At the same time, convert to pointers, rename to parts$N_canonicalize and define a macro for parts_canonicalize using QEMU_GENERIC. Rearrange the cases to recognize float_class_normal as early as possible. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c

[PULL 19/46] softfloat: Use pointers with ftype_unpack_raw

2021-05-16 Thread Richard Henderson
Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 76 +++-- 1 file changed, 48 insertions(+), 28 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 5ff9368012..5a736a46cf 100644 --- a/fpu/softfloat.c +++ b/

[PULL 27/46] softfloat: Convert float128_default_nan to parts

2021-05-16 Thread Richard Henderson
Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c| 17 - fpu/softfloat-specialize.c.inc | 19 +++ 2 files changed, 23 insertions(+), 13 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index f8f4ef51e8..08fd8

[PULL 45/46] softfloat: Move round_to_int to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
At the same time, convert to pointers, split out parts$N_round_to_int_normal, define a macro for parts_round_to_int using QEMU_GENERIC. This necessarily meant some rearrangement to the rount_to_{,u}int_and_pack routines, so go ahead and convert to parts_round_to_int_normal, which in turn allows cl

[PULL 23/46] softfloat: Use pointers with ftype_round_pack_canonical

2021-05-16 Thread Richard Henderson
Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 131 +--- 1 file changed, 68 insertions(+), 63 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index e53d4a138f..b0cbd5941c 100644 --- a/fpu/softfloat.c +++ b/

[PULL 20/46] softfloat: Use pointers with pack_raw

2021-05-16 Thread Richard Henderson
At the same time, rename to pack_raw64. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 21 + 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 5a736a46cf..b59b777bca 100644 --- a/fpu/softfl

[PULL 44/46] softfloat: Convert float-to-float conversions with float128

2021-05-16 Thread Richard Henderson
Introduce parts_float_to_float_widen and parts_float_to_float_narrow. Use them for float128_to_float{32,64} and float{32,64}_to_float128. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 203 1 file changed, 69 inse

[PULL 30/46] softfloat: Move pick_nan_muladd to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
At the same time, convert to pointers, rename to pick_nan_muladd$N and define a macro for pick_nan_muladd using QEMU_GENERIC. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c | 53 ++- fpu/softfloat-parts.c.inc | 4

[PULL 17/46] softfloat: Use pointers with parts_default_nan

2021-05-16 Thread Richard Henderson
At the same time, rename to parts64_default_nan and add a macro for parts_default_nan. This will be flushed out once 128-bit support is added. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c| 47 +++--- fpu/softflo

[PULL 26/46] softfloat: Convert float128_silence_nan to parts

2021-05-16 Thread Richard Henderson
This is the minimal change that also introduces float128_params, float128_unpack_raw, and float128_pack_raw without running into unused symbol Werrors. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c| 96 +- fpu/softf

Re: [PATCH] disas/libvixl: Protect C system header for C++ compiler

2021-05-16 Thread Thomas Huth
On 15/05/2021 20.35, Philippe Mathieu-Daudé wrote: When selecting an ARM target on Debian unstable, we get: Compiling C++ object libcommon.fa.p/disas_libvixl_vixl_utils.cc.o FAILED: libcommon.fa.p/disas_libvixl_vixl_utils.cc.o c++ -Ilibcommon.fa.p -I. -I.. [...] -o libcommon.fa.p/disas

[PULL 34/46] softfloat: Move addsub_floats to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
In preparation for implementing multiple sizes. Rename to parts_addsub, split out parts_add/sub_normal for future reuse with muladd. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 253 ++- fpu/softfloat-parts-addsub.

[PULL 21/46] softfloat: Use pointers with ftype_pack_raw

2021-05-16 Thread Richard Henderson
Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 44 1 file changed, 24 insertions(+), 20 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index b59b777bca..e02cbafaf9 100644 --- a/fpu/softfloat.c +++ b/fpu/s

[PULL 29/46] softfloat: Move pick_nan to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
At the same time, convert to pointers, rename to parts$N_pick_nan and define a macro for parts_pick_nan using QEMU_GENERIC. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c | 62 ++- fpu/softfloat-parts.c.inc | 25

[PULL 37/46] softfloat: Move muladd_floats to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
Rename to parts$N_muladd. Implement float128_muladd with FloatParts128. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/fpu/softfloat.h | 2 + fpu/softfloat.c | 406 ++ tests/fp/fp-bench.c | 8 +- tests/fp/fp-test.c

Re: [PATCH v6 04/26] plugins: Drop tcg_flags from struct qemu_plugin_dyn_cb

2021-05-16 Thread Philippe Mathieu-Daudé
Hi Richard, On 5/3/21 1:57 AM, Richard Henderson wrote: > As noted by qemu-plugins.h, enum qemu_plugin_cb_flags is > currently unused -- plugins can neither read nor write > guest registers. > > Signed-off-by: Richard Henderson > --- > accel/tcg/plugin-helpers.h | 1 - > include/qemu/plugin.h

[PULL 33/46] softfloat: Use uadd64_carry, usub64_borrow in softfloat-macros.h

2021-05-16 Thread Richard Henderson
Use compiler support for carry arithmetic. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/fpu/softfloat-macros.h | 95 +- 1 file changed, 25 insertions(+), 70 deletions(-) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat

[PULL 24/46] softfloat: Use pointers with parts_silence_nan

2021-05-16 Thread Richard Henderson
At the same time, rename to parts64_silence_nan, split out parts_silence_nan_frac, and define a macro for parts_silence_nan. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c| 16 +--- fpu/softfloat-specialize.c.inc | 17 +++--

[PULL 36/46] softfloat: Move mul_floats to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
Rename to parts$N_mul. Reimplement float128_mul with FloatParts128. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 206 ++ fpu/softfloat-parts.c.inc | 51 ++ 2 files changed, 128 insertions(+), 129 deletions

[PULL 38/46] softfloat: Use mulu64 for mul64To128

2021-05-16 Thread Richard Henderson
Via host-utils.h, we use a host widening multiply for 64-bit hosts, and a common subroutine for 32-bit hosts. Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- include/fpu/softfloat-macros.h | 23 +++ 1 file changed, 3 insertions(+

[PULL 28/46] softfloat: Move return_nan to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
At the same time, convert to pointers, rename to return_nan$N and define a macro for return_nan using QEMU_GENERIC. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- fpu/softfloat.c | 45 ++- fpu/softfloat-parts.c.inc | 37

[PULL 41/46] softfloat: Introduce sh[lr]_double primitives

2021-05-16 Thread Richard Henderson
Have x86_64 assembly for them, with a fallback. This avoids shuffling values through %cl in the x86 case. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/fpu/softfloat-macros.h | 36 fpu/softfloat.c| 102 + 2 fi

[PULL 39/46] softfloat: Use add192 in mul128To256

2021-05-16 Thread Richard Henderson
We can perform the operation in 6 total adds instead of 8. Reviewed-by: Alex Bennée Tested-by: Alex Bennée Signed-off-by: Richard Henderson --- include/fpu/softfloat-macros.h | 37 +++--- 1 file changed, 12 insertions(+), 25 deletions(-) diff --git a/include/fpu/so

[PULL 46/46] softfloat: Move round_to_int_and_pack to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
Rename to parts$N_float_to_sint. Reimplement float128_to_int{32,64}{_round_to_zero} with FloatParts128. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 365 +- fpu/softfloat-parts.c.inc | 64 +++ 2 files changed

Re: [PATCH] disas/libvixl: Protect C system header for C++ compiler

2021-05-16 Thread Philippe Mathieu-Daudé
Forgot to tag as RFC. Cc'ing mjt to have feedback from Debian packaging. On 5/15/21 8:35 PM, Philippe Mathieu-Daudé wrote: > When selecting an ARM target on Debian unstable, we get: > > Compiling C++ object libcommon.fa.p/disas_libvixl_vixl_utils.cc.o > FAILED: libcommon.fa.p/disas_libvixl_v

[Bug 1926521] Re: QEMU-user ignores MADV_DONTNEED

2021-05-16 Thread Thomas Huth
Ok, I'm closing this one on Launchpad now. Thanks for moving it to GitLab, Vitaly! ** Changed in: qemu Status: Incomplete => Invalid -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1926521 Tit

[PULL 43/46] softfloat: Split float_to_float

2021-05-16 Thread Richard Henderson
Split out parts_float_to_ahp and parts_float_to_float. Convert to pointers. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 174 1 file changed, 101 insertions(+), 73 deletions(-) diff --git a/fpu/softfloat.c b/fp

Re: [PATCH v6 07/26] tcg: Add tcg_call_func

2021-05-16 Thread Philippe Mathieu-Daudé
On 5/16/21 3:21 AM, Richard Henderson wrote: > On 5/3/21 4:50 PM, Philippe Mathieu-Daudé wrote: >> Hi Richard, >> >> On 5/3/21 1:57 AM, Richard Henderson wrote: >>> Signed-off-by: Richard Henderson >>> --- >>>   tcg/internal.h | 5 + >>>   tcg/tcg.c  | 5 ++--- >>>   2 files changed, 7 insert

[PULL 42/46] softfloat: Move div_floats to softfloat-parts.c.inc

2021-05-16 Thread Richard Henderson
Rename to parts$N_div. Implement float128_div with FloatParts128. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- fpu/softfloat.c | 290 +++--- fpu/softfloat-parts.c.inc | 55 2 files changed, 171 insertions(+), 174 deletions(-)

Re: [PATCH 01/10] hw/mem/nvdimm: Use Kconfig 'imply' instead of 'depends on'

2021-05-16 Thread Philippe Mathieu-Daudé
On 5/16/21 2:50 AM, Bin Meng wrote: > On Sun, May 16, 2021 at 1:33 AM Philippe Mathieu-Daudé > wrote: >> >> On 5/14/21 5:02 AM, Bin Meng wrote: >>> On Fri, May 14, 2021 at 12:53 AM Philippe Mathieu-Daudé >>> wrote: Per the kconfig.rst: A device should be listed [...] ``imply

[Bug 1922252] Re: [feature request] webcam support

2021-05-16 Thread Thomas Huth
Ticket has been moved to the new issue tracker at GitLab (thanks!): https://gitlab.com/qemu-project/qemu/-/issues/316 ... so I'm closing this ticket on Launchpad now. ** Bug watch added: gitlab.com/qemu-project/qemu/-/issues #316 https://gitlab.com/qemu-project/qemu/-/issues/316 ** Changed in:

Re: [PULL 00/46] softfloat: Convert float128 to FloatParts (part 1)

2021-05-16 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20210516123431.718318-1-richard.hender...@linaro.org/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20210516123431.718318-1-richard.hender...@linaro.org Subject: [PULL 00/46] soft

Re: [PATCH] linux-user/syscall: zero-init msghdr in do_sendrecvmsg_locked

2021-05-16 Thread Kenta Iwasaki
Sure, The bytes of `msghdr` need to be cleared because the `msghdr` struct layout specified in QEMU appears to generalize between the definitions of `msghdr` across different libc's and kernels. To appropriately generalize `msghdr` across libc's and kernels would either: 1. require specializing c

[PATCH] linux-user/syscall: zero-init msghdr in do_sendrecvmsg_locked

2021-05-16 Thread Kenta Iwasaki
The mixing of libc and kernel versions of the layout of the `msghdr` struct causes EMSGSIZE to be returned by sendmsg if the `msghdr` struct is not zero-initialized (such that padding bytes comprise of uninitialized memory). Other parts of the QEMU codebase appear to zero-initialize the `msghdr` s

Re: [PATCH 2/2] QOMify sifive_uart model

2021-05-16 Thread Lukas Jünger
On 5/11/21 2:26 PM, Philippe Mathieu-Daudé wrote: Hi Lukas, On 5/4/21 5:34 PM, Lukas Jünger wrote: Signed-off-by: Lukas Jünger --- include/hw/char/sifive_uart.h | 6 +-- hw/char/sifive_uart.c | 72 ++- 2 files changed, 65 insertions(+), 13 deletions

Re: [PATCH] accel/tcg: Align data dumped at end of TB

2021-05-16 Thread Richard Henderson
On 5/15/21 5:42 AM, Philippe Mathieu-Daudé wrote: +qemu_log("0x%08" PRIxPTR ": .quad 0x%0*" TCG_PRIlx "\n", + (uintptr_t)&rx_data_gen_ptr[i], + 2 * sizeof(tcg_target_ulong), rx_data_gen_ptr[i]); This doesn't quite work, because

Re: [PATCH] meson: Set implicit_include_directories to false

2021-05-16 Thread Alexander Graf
On 29.04.21 04:43, Katsuhiro Ueno wrote: > Without this, libvixl cannot be compiled with macOS 11.3 SDK due to > include file name conflict (usr/include/c++/v1/version conflicts with > VERSION). > > Signed-off-by: Katsuhiro Ueno I can confirm that this patch is required to build QEMU with curr

[PULL v2 1/4] MAINTAINERS: Add include/exec/gen-icount.h to 'Main Loop' section

2021-05-16 Thread Richard Henderson
From: Philippe Mathieu-Daudé As the 'Main Loop' section covers softmmu/icount.c, add "exec/gen-icount.h" there too. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210422064128.2318616-2-f4...@amsat.org> Signed-off-by: Richard Henderson --- MAINTAINERS | 1 + 1 file changed, 1 insertion(

[PULL v2 2/4] exec/gen-icount.h: Add missing "exec/exec-all.h" include

2021-05-16 Thread Richard Henderson
From: Philippe Mathieu-Daudé When including "exec/gen-icount.h" we get: include/exec/gen-icount.h: In function ‘gen_tb_start’: include/exec/gen-icount.h:40:9: error: implicit declaration of function ‘tb_cflags’ [-Werror=implicit-function-declaration] 40 | if (tb_cflags(tb) & CF_USE

Re: [PATCH v6 03/11] hvf: Move common code out

2021-05-16 Thread Alexander Graf
On 21.01.21 08:26, Philippe Mathieu-Daudé wrote: > Hi Alexander, > > On 1/20/21 11:44 PM, Alexander Graf wrote: >> Until now, Hypervisor.framework has only been available on x86_64 systems. >> With Apple Silicon shipping now, it extends its reach to aarch64. To >> prepare for support for multiple

[PULL v2 0/4] tcg patch queue

2021-05-16 Thread Richard Henderson
3:24 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210516 for you to fetch changes up to 6c6a4a76eea900112c343ba4f9c5737e298feddf: accel/tcg: Align data dumped at end of TB (2021-05-16 09:0

[PULL v2 3/4] tcg: Add tcg_constant_tl

2021-05-16 Thread Richard Henderson
From: Matheus Ferst Used in ppc D/DS/X-form load/store implementation. Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-24-matheus.fe...@eldorado.org.br> Signed-off-by: Richard Henderson --- include/tcg/tcg-op.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/tcg

[PULL v2 4/4] accel/tcg: Align data dumped at end of TB

2021-05-16 Thread Richard Henderson
From: Philippe Mathieu-Daudé To better visualize the data dumped at the end of a TB, left-align it (padding it with 0). Print ".long" instead of ".quad" on 32-bit hosts. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210515104202.241504-1-f4...@amsat.org> [rth: Split the qemu_log and pri

Re: [PATCH 01/10] hw/mem/nvdimm: Use Kconfig 'imply' instead of 'depends on'

2021-05-16 Thread Bin Meng
On Sun, May 16, 2021 at 8:42 PM Philippe Mathieu-Daudé wrote: > > On 5/16/21 2:50 AM, Bin Meng wrote: > > On Sun, May 16, 2021 at 1:33 AM Philippe Mathieu-Daudé > > wrote: > >> > >> On 5/14/21 5:02 AM, Bin Meng wrote: > >>> On Fri, May 14, 2021 at 12:53 AM Philippe Mathieu-Daudé > >>> wrote: > >

[Bug 1926759] Re: WFI instruction results in unhandled CPU exception

2021-05-16 Thread Thomas Huth
Fix has been merged: https://gitlab.com/qemu-project/qemu/-/commit/5b2c8af89b82a671137a ** Changed in: qemu Status: In Progress => Fix Committed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1

[Bug 1926996] Re: qemu-user clone syscall fails

2021-05-16 Thread Thomas Huth
The QEMU project is currently moving its bug tracking to another system. For this we need to know how to transfer the bug to the new system if (if still necessary). For this we're setting the status to "Incomplete" now. In the unlikely case that the bug has already been fixed in the latest upstrea

Re: [PULL v3 0/1] Rtd patches

2021-05-16 Thread Peter Maydell
On Sat, 15 May 2021 at 20:02, Marc-André Lureau wrote: > Otherwise, you should get a warning and doc will be disabled. Mine is less > ugly than yours, not sure why: I think that's a sphinx-version dependent thing. I requested that they improve the support for conf.py raising ConfigError to produc

Re: [PATCH v6 77/82] target/arm: Fix decode for VDOT (indexed)

2021-05-16 Thread Peter Maydell
On Sat, 15 May 2021 at 18:13, Richard Henderson wrote: > > On 5/13/21 2:25 PM, Peter Maydell wrote: > >> -VDOT_scalar 1110 0 . 10 1101 . q:1 index:1 u:1 rm:4 \ > >> - vm=%vm_dp vn=%vn_dp vd=%vd_dp > >> +VDOT_scalar 1110 0 . 10 1101 . q:1 index:1 u:

Re: [PATCH v6 11/11] hvf: arm: Implement -cpu host

2021-05-16 Thread Peter Maydell
On Sun, 16 May 2021 at 12:16, Alexander Graf wrote: > > > On 28.01.21 17:55, Peter Maydell wrote: > > Nicer to follow the KVM approach of only doing this once > > and caching the results in arm_host_cpu_features, so that > > for a many-cores VM you don't do it once per core. > > > I tend to disagr

Re: [PULL 00/20] CI, qtest, and misc patches

2021-05-16 Thread Peter Maydell
On Fri, 14 May 2021 at 13:15, Thomas Huth wrote: > > Hi Peter! > > The following changes since commit 2d3fc4e2b069494b1e9e2e4a1e3de24cbc036426: > > Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' > into staging (2021-05-13 20:13:24 +0100) > > are available in the Git re

Re: [PATCH] disas/libvixl: Protect C system header for C++ compiler

2021-05-16 Thread Philippe Mathieu-Daudé
On 5/16/21 2:46 PM, Thomas Huth wrote: > On 15/05/2021 20.35, Philippe Mathieu-Daudé wrote: >> When selecting an ARM target on Debian unstable, we get: >> >>    Compiling C++ object libcommon.fa.p/disas_libvixl_vixl_utils.cc.o >>    FAILED: libcommon.fa.p/disas_libvixl_vixl_utils.cc.o >>    c++ -Il

9pfs: scope of rename_lock?

2021-05-16 Thread Christian Schoenebeck
Hi Greg, while reviewing the 9p code base for further optimizations, I stumbled over the 'rename_lock' introduced by 02cb7f3a2 and wondered about what exactly it shall protect? As far as I understand it, the original intention at introduction (aforementioned 02cb7f3a2) was to protect

[PATCH v2] disas/libvixl: Protect C system header for C++ compiler

2021-05-16 Thread Philippe Mathieu-Daudé
When selecting an ARM target on Debian unstable, we get: Compiling C++ object libcommon.fa.p/disas_libvixl_vixl_utils.cc.o FAILED: libcommon.fa.p/disas_libvixl_vixl_utils.cc.o c++ -Ilibcommon.fa.p -I. -I.. [...] -o libcommon.fa.p/disas_libvixl_vixl_utils.cc.o -c ../disas/libvixl/vixl/utils.

Re: [PATCH] accel/tcg: Align data dumped at end of TB

2021-05-16 Thread Philippe Mathieu-Daudé
On 5/16/21 4:01 PM, Richard Henderson wrote: > On 5/15/21 5:42 AM, Philippe Mathieu-Daudé wrote: >> +    qemu_log("0x%08" PRIxPTR ":  .quad  0x%0*" TCG_PRIlx >> "\n", >> + (uintptr_t)&rx_data_gen_ptr[i], >> + 2 * sizeof(tcg_target_ulong),

[PATCH] 9pfs: simplify v9fs_walk()

2021-05-16 Thread Christian Schoenebeck
There is only one comparison between nwnames and P9_MAXWELEM required. Signed-off-by: Christian Schoenebeck --- hw/9pfs/9p.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c index 0fa776af09..89aa07db78 100644 --- a/hw/9pfs/9p.c +++ b/hw/9p

Re: [PULL 00/16] pc,pci,virtio: bugfixes, improvements

2021-05-16 Thread Peter Maydell
On Fri, 14 May 2021 at 17:04, Michael S. Tsirkin wrote: > > The following changes since commit 609d7596524ab204ccd71ef42c9eee4c7c338ea4: > > Update version for v6.0.0 release (2021-04-29 18:05:29 +0100) > > are available in the Git repository at: > > git://git.kernel.org/pub/scm/virt/kvm/mst/q

[PATCH v7 00/19] hvf: Implement Apple Silicon Support

2021-05-16 Thread Alexander Graf
Now that Apple Silicon is widely available, people are obviously excited to try and run virtualized workloads on them, such as Linux and Windows. This patch set implements a fully functional version to get the ball going on that. With this applied, I can successfully run both Linux and Windows as

[PATCH v7 07/19] hvf: Split out common code on vcpu init and destroy

2021-05-16 Thread Alexander Graf
Until now, Hypervisor.framework has only been available on x86_64 systems. With Apple Silicon shipping now, it extends its reach to aarch64. To prepare for support for multiple architectures, let's start moving common code out into its own accel directory. This patch splits the vcpu init and destr

[PATCH v7 01/19] hvf: Move assert_hvf_ok() into common directory

2021-05-16 Thread Alexander Graf
Until now, Hypervisor.framework has only been available on x86_64 systems. With Apple Silicon shipping now, it extends its reach to aarch64. To prepare for support for multiple architectures, let's start moving common code out into its own accel directory. This patch moves assert_hvf_ok() and intr

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