On 05/01/2021 20:44, Philippe Mathieu-Daudé wrote:
> On 1/5/21 8:17 PM, Laurent Vivier wrote:
>> macro is not reset after use, so the format decoded is always the
>> one of the first "PRI" in the format string.
>>
>> For instance:
>>
>> vhost_vdpa_set_config(void *dev, uint32_t offset, uint32_t s
If KVM_CAP_RPT_INVALIDATE KVM capability is enabled, then
- indicate the availability of H_RPT_INVALIDATE hcall to the guest via
ibm,hypertas-functions property.
- Enable the hcall
Both the above are done only if the new sPAPR machine capability
cap-rpt-invalidate is set.
Note: The KVM impleme
On 21.12.20 14:49, David Edmondson wrote:
When a call to fcntl(2) for the purpose of manipulating file locks
fails, report the error returned by fcntl.
Signed-off-by: David Edmondson
---
block/file-posix.c | 20 +-
tests/qemu-iotests/153.out | 76 +++--
On 21.12.20 14:49, David Edmondson wrote:
When sending JSON to running qemu, qemu-io, etc. instances, flatten
the echoed input to a single line to ensure that comparisons with the
expected input (which is always a single line) are successful.
Signed-off-by: David Edmondson
---
tests/qemu-iote
Hey everyone!
I want to work on implementing the emulation for the VritioSound device. I
contacted the mentor for the project, (Greg), who said it's fine and that I
should declare it on the mailing list in order to find out if someone else
is already working on this project. That is what this mail
Target description is not currently implemented in RISC-V architecture. Thus
GDB won't set it properly when attached. The patch implements the target
description response.
Signed-off-by: Sylvain Pelissier
---
target/riscv/cpu.c | 13 +
1 file changed, 13 insertions(+)
diff --git a
Hello,
I may have made an error by copy pasting the comment into the file. I sent
a new v3 with git send-email. I hope it is fine now.
Regards
Sylvain
On Tue, 5 Jan 2021 at 22:03, Alistair Francis wrote:
> On Wed, Dec 30, 2020 at 12:26 AM Sylvain Pelissier
> wrote:
> >
> > Target description
Hi Sylvain,
On Wed, Jan 6, 2021 at 6:34 PM Sylvain Pelissier
wrote:
>
> Target description is not currently implemented in RISC-V architecture. Thus
> GDB won't set it properly when attached. The patch implements the target
> description response.
Please limit the commit message in less than 7
On 19/12/2020 11:19, Mark Cave-Ayland wrote:
The sun4m board code connects both of the IRQ outputs of each ESCC to the
same slavio input qemu_irq. Connecting two qemu_irqs outputs directly to the
same input is not valid as it produces subtly wrong behaviour (for instance
if both the IRQ lines ar
On Tue, 5 Jan 2021 at 09:44, Philippe Mathieu-Daudé wrote:
>
> The following changes since commit e551455f1e7a3d7eee9e11e2903e4050bc5511ae:
>
> Merge remote-tracking branch
> 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-01-04
> 15:02:53 +)
>
> are available in the G
On 06/01/2021 06:06, Gan Qixin wrote:
> When the length of mname is less than 5, memcpy("xenfv", mname, 5) will cause
> heap buffer overflow. Therefore, use strncmp to avoid this problem.
>
> The asan showed stack:
>
> ERROR: AddressSanitizer: heap-buffer-overflow on address 0x6020f2f4 at
> p
Sylvain Pelissier writes:
> Hello,
>
> I may have made an error by copy pasting the comment into the file. I sent
> a new v3 with git send-email. I hope it is fine now.
Your v3 doesn't include the review tags you got for v2 which makes it
look un-reviewed. See:
https://wiki.qemu.org/Contri
The Cirrus CI macOS build hosts have exhibited a serious performance
degradation in recent months. For example the "qom-test" qtest takes
over an hour for only the qemu-system-aarch64 binary. This is as much
20-40 times slower than other environments. The other qtests all show
similar performance d
Shreyansh Chouhan writes:
> Hey everyone!
>
> I want to work on implementing the emulation for the VritioSound device. I
> contacted the mentor for the project, (Greg), who said it's fine and that I
> should declare it on the mailing list in order to find out if someone else
> is already workin
The following changes since commit 2e0b5bbe813930021b2baab03c9d424c1c52d18b:
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210104' into
staging (2021-01-05 21:06:42 +)
are available in the Git repository at:
git://github.com/mcayland/qemu.git tags/qemu-spar
From: Philippe Mathieu-Daudé
Per the "NCR89C105 Chip Specification" referenced in the header:
Chip-level Address Map
--
| 1D0 -> | Counter/Timers| W,D|
| 1DF |
The sun4m board code connects both of the IRQ outputs of each ESCC to the
same slavio input qemu_irq. Connecting two qemu_irqs outputs directly to the
same input is not valid as it produces subtly wrong behaviour (for instance
if both the IRQ lines are high, and then one goes low, the PIC input wil
From: Peter Maydell
The grlib.h header defines a set_pil_in_fn typedef which is never
used; remove it.
Signed-off-by: Peter Maydell
Message-Id: <20201212144134.29594-3-peter.mayd...@linaro.org>
Reviewed-by: KONRAD Frederic
Signed-off-by: Mark Cave-Ayland
---
include/hw/sparc/grlib.h | 2 --
From: Peter Maydell
Currently the GRLIB_IRQMP device is used in one place (the leon3 board),
but instead of the device providing inbound gpio lines for the board
to wire up, the board code itself calls qemu_allocate_irqs() with
the handler function being a set_irq function defined in the code
for
On 05/01/2021 13.44, Alex Bennée wrote:
The read binary data as text via a PPM export of the frame buffer
seems a bit sketchy and it did blow up in the real world when the
assertion failed:
https://gitlab.com/qemu-project/qemu/-/jobs/943183183
However short of cleaning up the test to be more
On Wednesday, 2021-01-06 at 10:48:09 +01, Max Reitz wrote:
> On 21.12.20 14:49, David Edmondson wrote:
>> When a call to fcntl(2) for the purpose of manipulating file locks
>> fails, report the error returned by fcntl.
>> Signed-off-by: David Edmondson
>> ---
>> block/file-posix.c | 20
Is there full support for ARMv8.5 Memory Tagging Extensions (MTE) inside
QEMU?
So is this MTE example code supposed to work inside QEMU?
https://www.kernel.org/doc/html/latest/arm64/memory-tagging-extension.html
All variables are 64-bit and so %l / %ll are not required, and the
latter is actually invalid:
$ sudo stap -e 'probe begin{printf ("BEGIN")}' -I .
parse error: invalid or missing conversion specifier
saw: operator ',' at ./qemu-system-x86_64-log.stp:15118:101
source: prin
On 06/01/2021 06.06, Gan Qixin wrote:
When the length of mname is less than 5, memcpy("xenfv", mname, 5) will cause
heap buffer overflow. Therefore, use strncmp to avoid this problem.
The asan showed stack:
ERROR: AddressSanitizer: heap-buffer-overflow on address 0x6020f2f4 at
pc 0x7f65d8cc
On 1/6/21 1:19 PM, Daniel P. Berrangé wrote:
> All variables are 64-bit and so %l / %ll are not required, and the
> latter is actually invalid:
>
> $ sudo stap -e 'probe begin{printf ("BEGIN")}' -I .
> parse error: invalid or missing conversion specifier
> saw: operator ',' at ./qem
On 06/01/2021 12.41, Daniel P. Berrangé wrote:
The Cirrus CI macOS build hosts have exhibited a serious performance
degradation in recent months. For example the "qom-test" qtest takes
over an hour for only the qemu-system-aarch64 binary. This is as much
20-40 times slower than other environments
On 06/01/2021 13:19, Daniel P. Berrangé wrote:
> All variables are 64-bit and so %l / %ll are not required, and the
> latter is actually invalid:
>
> $ sudo stap -e 'probe begin{printf ("BEGIN")}' -I .
> parse error: invalid or missing conversion specifier
> saw: operator ',' at ./q
On Wed, Jan 6, 2021 at 8:44 AM Daniel P. Berrangé wrote:
>
> The Cirrus CI macOS build hosts have exhibited a serious performance
> degradation in recent months. For example the "qom-test" qtest takes
> over an hour for only the qemu-system-aarch64 binary. This is as much
> 20-40 times slower than
On 05/01/2021 20:17, Laurent Vivier wrote:
> The "%llu" format type is not understood by stap:
>
> $ sudo stap -e 'probe begin{printf ("BEGIN")}' -I .
>
> parse error: invalid or missing conversion specifier
> saw: operator ',' at ./qemu-system-x86_64-log.stp:15118:101
>source:
On Tue, Jan 05, 2021 at 08:17:21PM +0100, Laurent Vivier wrote:
> macro is not reset after use, so the format decoded is always the
> one of the first "PRI" in the format string.
>
> For instance:
>
> vhost_vdpa_set_config(void *dev, uint32_t offset, uint32_t size, \
> u
On Fri, Jan 1, 2021 at 8:16 PM Philippe Mathieu-Daudé wrote:
>
> Boot rootfs build by Guenter Roeck [*].
>
> Full test output:
>
> $ avocado --show=app,console run -t machine:fuloong2e tests/acceptance/
> Fetching asset from
> tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_mips6
Le 05/01/2021 à 21:07, Matevz Langus a écrit :
> Hi Laurent,
Hi Matevz,
> I know it must be more complex, but it worked for our case so I wanted to
> share it anyway as we did
> not find support for this in latest git, but forgot to check mailing list.
This kind of patch only works if endiannes
All variables are 64-bit and so %l / %ll are not required, and the
latter is actually invalid:
$ sudo stap -e 'probe begin{printf ("BEGIN")}' -I .
parse error: invalid or missing conversion specifier
saw: operator ',' at ./qemu-system-x86_64-log.stp:15118:101
source: prin
On 04/01/2021 02.39, BALATON Zoltan via wrote:
On Sun, 3 Jan 2021, Thomas Huth wrote:
On 03/01/2021 02.09, BALATON Zoltan via wrote:
All machines that select SERIAL also select PPC4XX so we can just add
this common dependency there once.
Signed-off-by: BALATON Zoltan
---
hw/ppc/Kconfig | 5
On Tue, 05 Jan 2021 17:31:43 +0100
Vitaly Kuznetsov wrote:
> Igor Mammedov writes:
>
> > On Tue, 05 Jan 2021 12:50:05 +0100
> >
> > I think there is a misunderstanding, idea was:
> >
> > cpu_initfn() {
> > //current set
> > cpu->default_hyperv_cpu_features = ACD
> > }
> >
> > compat_pro
On Tue, 5 Jan 2021 08:52:58 -0800
Ben Widawsky wrote:
> This is the beginning of implementing mailbox support for CXL 2.0
> devices.
>
> v2: Use register alignment helper (Ben)
> Minor cleanups (Jonathan)
> Rename error codes to match spec (Jonathan)
> Update cap count from 1 to 2 (J
On Tue, 5 Jan 2021 08:52:56 -0800
Ben Widawsky wrote:
> This implements all device MMIO up to the first capability .That
> includes the CXL Device Capabilities Array Register, as well as all of
> the CXL Device Capability Header Registers. The latter are filled in as
> they are implemented in the
ilable in the Git repository at:
>
> https://gitlab.com/dgibson/qemu.git tags/ppc-for-6.0-20210106
>
> for you to fetch changes up to 5cbd51a5a58098444ffa246ece2013849be04299:
>
> ppc440_pcix: Fix up pci config access (2021-01-06 11:09:59 +1100)
>
> -
On Tue, 5 Jan 2021 09:53:49 +0800
Jiahui Cen wrote:
> On 2021/1/5 8:35, Igor Mammedov wrote:
> > On Wed, 30 Dec 2020 16:22:08 -0500
> > "Michael S. Tsirkin" wrote:
> >
> >> On Tue, Dec 29, 2020 at 02:41:42PM +0100, Igor Mammedov wrote:
> >>> On Wed, 23 Dec 2020 17:08:31 +0800
> >>> Jiahui C
On Wed, Jan 06, 2021 at 11:41:59AM +, Daniel P. Berrangé wrote:
> The Cirrus CI macOS build hosts have exhibited a serious performance
> degradation in recent months. For example the "qom-test" qtest takes
> over an hour for only the qemu-system-aarch64 binary. This is as much
> 20-40 times slo
Igor Mammedov writes:
> On Tue, 05 Jan 2021 17:31:43 +0100
> Vitaly Kuznetsov wrote:
>
>> Igor Mammedov writes:
>>
>> > On Tue, 05 Jan 2021 12:50:05 +0100
>> >
>> > I think there is a misunderstanding, idea was:
>> >
>> > cpu_initfn() {
>> > //current set
>> > cpu->default_hyperv_cpu_f
On 06/01/2021 14:02, Daniel P. Berrangé wrote:
> All variables are 64-bit and so %l / %ll are not required, and the
> latter is actually invalid:
>
> $ sudo stap -e 'probe begin{printf ("BEGIN")}' -I .
> parse error: invalid or missing conversion specifier
> saw: operator ',' at ./q
Daniel P. Berrangé writes:
> The Cirrus CI macOS build hosts have exhibited a serious performance
> degradation in recent months. For example the "qom-test" qtest takes
> over an hour for only the qemu-system-aarch64 binary. This is as much
> 20-40 times slower than other environments. The othe
Hi
On Tue, Dec 29, 2020 at 8:19 PM Jag Raman wrote:
>
>
> > On Dec 23, 2020, at 1:49 PM, Elena Ufimtseva
> wrote:
> >
> > On Wed, Dec 23, 2020 at 03:01:24PM +0400, Marc-André Lureau wrote:
> >> Hi
> >>
> >> On Wed, Dec 23, 2020 at 10:45 AM wrote:
> >>
> >>> From: Jagannathan Raman
> >>>
> >>>
On 05/01/2021 11.49, Stefan Hajnoczi wrote:
The second post in the storage series covers virtio-blk and virtio-scsi.
It compares the two and offers recommendations that users and tools
using QEMU can use as a starting point. Graphs are included comparing
the performance of various options.
Signe
On 10/12/2020 18.28, Philippe Mathieu-Daudé wrote:
Replace I/O write error reported with error_report() by
qemu_log_mask(GUEST_ERROR) which allow filtering.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/virtio/virtio-pci.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --gi
Hi Francisco,
On Tue, Dec 22, 2020 at 9:40 AM Bin Meng wrote:
>
> Hi Francisco,
>
> On Wed, Dec 16, 2020 at 6:11 PM Bin Meng wrote:
> >
> > Hi Francisco,
> >
> > On Wed, Dec 16, 2020 at 12:40 AM Francisco Iglesias
> > wrote:
> > >
> > > Hello Bin,
> > >
> > > On [2020 Dec 12] Sat 17:44:27, Bin
On 06/01/2021 14:02, Daniel P. Berrangé wrote:
> All variables are 64-bit and so %l / %ll are not required, and the
> latter is actually invalid:
>
> $ sudo stap -e 'probe begin{printf ("BEGIN")}' -I .
> parse error: invalid or missing conversion specifier
> saw: operator ',' at ./q
The following changes since commit 41192db338588051f21501abc13743e62b0a5605:
Merge remote-tracking branch
'remotes/ehabkost-gl/tags/machine-next-pull-request' into staging (2021-01-01
22:57:15 +)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstr
Signed-off-by: Paolo Bonzini
---
configure | 32
meson.build | 21 ++---
meson_options.txt | 2 ++
3 files changed, 24 insertions(+), 31 deletions(-)
diff --git a/configure b/configure
index 1904734259..934cb098aa 100755
--- a/confi
Signed-off-by: Paolo Bonzini
---
configure | 32
meson.build | 20 +---
meson_options.txt | 2 ++
3 files changed, 23 insertions(+), 31 deletions(-)
diff --git a/configure b/configure
index 934cb098aa..63aba41f17 100755
--- a/config
Signed-off-by: Paolo Bonzini
---
configure | 31 ---
meson.build | 20 +---
meson_options.txt | 2 ++
3 files changed, 23 insertions(+), 30 deletions(-)
diff --git a/configure b/configure
index 63aba41f17..a1e1fa8b34 100755
--- a/configu
On 30/12/2020 15:37, Mark Cave-Ayland wrote:
This patch series comes from an experimental branch that I've been working on
to try and boot a MacOS toolbox ROM under the QEMU q800 machine. The effort is
far from complete, but it seems worth submitting these patches separately since
they are limit
This patch series is a kind of 'rethinking' of Denis Plotnikov's ideas he's
implemented in his series '[PATCH v0 0/4] migration: add background snapshot'.
Currently the only way to make (external) live VM snapshot is using existing
dirty page logging migration mechanism. The main problem is that i
Glue code to the userfaultfd kernel implementation.
Querying feature support, createing file descriptor, feature control,
memory region registration, IOCTLs on registered registered regions.
Signed-off-by: Andrey Gruzdev
Reviewed-by: Peter Xu
---
include/exec/memory.h | 1 +
include/qemu
Add new capability to 'qapi/migration.json' schema.
Update migrate_caps_check() to validate enabled capability set
against introduced one. Perform checks for required kernel features
and compatibility with guest memory backends.
Signed-off-by: Andrey Gruzdev
Reviewed-by: Peter Xu
Acked-by: Marku
In this particular implementation the same single migration
thread is responsible for both normal linear dirty page
migration and procesing UFFD page fault events.
Processing write faults includes reading UFFD file descriptor,
finding respective RAM block and saving faulting page to
the migration
Introducing implementation of 'background' snapshot thread
which in overall follows the logic of precopy migration
while internally utilizes completely different mechanism
to 'freeze' vmstate at the start of snapshot creation.
This mechanism is based on userfault_fd with wr-protection
support and
Add BCC/eBPF script to analyze userfaultfd write fault latency distribution.
Signed-off-by: Andrey Gruzdev
Acked-by: Peter Xu
---
scripts/userfaultfd-wrlat.py | 148 +++
1 file changed, 148 insertions(+)
create mode 100755 scripts/userfaultfd-wrlat.py
diff --gi
Accidentally the wrong version of this series was committed, this
series fixes that up to the last version that was meant to be merged.
BALATON Zoltan (3):
Revert "sam460ex: Remove FDT_PPC dependency from KConfig"
Revert "ppc4xx: Move common dependency on serial to common option"
sam460ex: U
This reverts commit e6d5106786 which was added mistakenly. While this
change works it was suggested during review that keeping dependencies
explicit for each board may be better than listing them in a common
option so keep the previous version and revert this change.
Signed-off-by: BALATON Zoltan
Use the PCI_BUS type cast macro to convert result of
qdev_get_child_bus(). Also remove the check for NULL afterwards which
should not be needed because sysbus_create_simple() uses error_abort
and PCI_BUS macro also checks its argument by default so this
shouldn't fail here.
Signed-off-by: BALATON
This reverts commit 038da2adf that was mistakenly added, this
dependency is still needed to get libfdt dependencies even if fdt.o is
not needed by sam460ex.
Signed-off-by: BALATON Zoltan
---
hw/ppc/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index
)
are available in the Git repository at:
https://gitlab.com/dgibson/qemu.git tags/ppc-for-6.0-20210106
for you to fetch changes up to 5cbd51a5a58098444ffa246ece2013849be04299:
ppc440_pcix: Fix up pci config access (2021-01-06 11:0
On 05.01.2021 22:36, Peter Xu wrote:
On Thu, Dec 17, 2020 at 07:57:07PM +0300, Andrey Gruzdev wrote:
This patch series is a kind of 'rethinking' of Denis Plotnikov's ideas he's
implemented in his series '[PATCH v0 0/4] migration: add background snapshot'.
Currently the only way to make (externa
available in the Git repository at:
>
> git://github.com/mcayland/qemu.git tags/qemu-sparc-20210106
>
> for you to fetch changes up to a879306ca14de576d3a5dd51f830ebf89753e223:
>
> sun4m: don't connect two qemu_irqs di
P.S.: sorry for the terribly broken lines. I didn't expect launchpad to
add additional line breaks that way :-(
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1873769
Title:
SB16 audio playback free
Hi Allan,
I've hit EXACTLY the same problem, while writing a SB16 driver.
Reproducing the bug
--
I've tried to QEMU 4 in several scenarios (GTK UI, text mode with the -curses
option,
just serial console with -nographic and with virt-manager which uses Spice). It
works
as exp
On Fri, Dec 11, 2020 at 04:12:49PM +0100, Alexander Graf wrote:
> Now that Apple Silicon is widely available, people are obviously excited
> to try and run virtualized workloads on them, such as Linux and Windows.
>
> This patch set implements a fully functional version to get the ball
> going on
Add secure pl061 for reset/power down machine from
the secure world (Arm Trusted Firmware).
Use the same gpio 3 and gpio 4 which were used by
non acpi variant of linux power control gpios.
Signed-off-by: Maxim Uvarov
---
v2: replace printf with qemu_log (Philippe Mathieu-Daudé)
hw/arm/Kconfig
On 21-01-06 13:21:23, Jonathan Cameron wrote:
> On Tue, 5 Jan 2021 08:52:58 -0800
> Ben Widawsky wrote:
>
> > This is the beginning of implementing mailbox support for CXL 2.0
> > devices.
> >
> > v2: Use register alignment helper (Ben)
> > Minor cleanups (Jonathan)
> > Rename error code
Add secure pl061 for reset/power down machine from
the secure world (Arm Trusted Firmware).
Use the same gpio 3 and gpio 4 which were used by
non acpi variant of linux power control gpios.
Signed-off-by: Maxim Uvarov
---
v3: added missed include qemu/log.h for qemu_log(..
v2: replace printf wi
Please skip v2 and use v3. I had to check that one line change code
compiles. qemu_log() requires include header for that function.
Best regards,
Maxim.
On Wed, 6 Jan 2021 at 19:34, Maxim Uvarov wrote:
>
> Add secure pl061 for reset/power down machine from
> the secure world (Arm Trusted Firmwar
On 1/5/2021 11:27 AM, Daniel P. Berrangé wrote:
> On Tue, Jan 05, 2021 at 07:41:53AM -0800, Steve Sistare wrote:
>> Allocate anonymous memory using memfd_create if the memfd-alloc option is
>> set.
>>
>> Signed-off-by: Steve Sistare
>> ---
>> exec.c | 38 +
On 1/6/21 5:34 PM, Maxim Uvarov wrote:
> Add secure pl061 for reset/power down machine from
> the secure world (Arm Trusted Firmware).
> Use the same gpio 3 and gpio 4 which were used by
> non acpi variant of linux power control gpios.
>
> Signed-off-by: Maxim Uvarov
> ---
> v3: added missed inc
On Wed, 06 Jan 2021 14:38:56 +0100
Vitaly Kuznetsov wrote:
> Igor Mammedov writes:
>
> > On Tue, 05 Jan 2021 17:31:43 +0100
> > Vitaly Kuznetsov wrote:
> >
> >> Igor Mammedov writes:
> >>
> >> > On Tue, 05 Jan 2021 12:50:05 +0100
> >> >
> >> > I think there is a misunderstanding, idea wa
On 1/6/21 3:36 PM, Laurent Vivier wrote:
> On 06/01/2021 14:02, Daniel P. Berrangé wrote:
>> All variables are 64-bit and so %l / %ll are not required, and the
>> latter is actually invalid:
>>
>> $ sudo stap -e 'probe begin{printf ("BEGIN")}' -I .
>> parse error: invalid or missing conversion
On 21-01-06 13:28:05, Jonathan Cameron wrote:
> On Tue, 5 Jan 2021 08:52:56 -0800
> Ben Widawsky wrote:
>
> > This implements all device MMIO up to the first capability .That
> > includes the CXL Device Capabilities Array Register, as well as all of
> > the CXL Device Capability Header Registers.
Hello,
Host : centos 7
Guest : Concurrent DOS 386 v3.00 (problem also happen on DOS 3.0)
QEMU : v5.1.0
Virtualbox : v6.1.14
Seabios : seabios-rel-1.13.0
I first started to run some tests to debug the alt-gr behavior, and I ended up
noticing something strange.
This issue is the same as this one:
Peter Maydell writes:
> On Mon, 4 Jan 2021 at 14:44, Paolo Bonzini wrote:
>>
>> The following changes since commit 41192db338588051f21501abc13743e62b0a5605:
>>
>> Merge remote-tracking branch
>> 'remotes/ehabkost-gl/tags/machine-next-pull-request' into staging
>> (2021-01-01 22:57:15 +
On Tue, Jan 05, 2021 at 03:14:37PM -0300, Daniel Henrique Barboza wrote:
> Commit v5.2.0-190-g0546c0609c ("vl: split various early command line
> options to a separate function") moved the trace backend init code to
> the qemu_process_early_options(). Which is now being called before
> os_daemonize
On Wed, Jan 06, 2021 at 03:17:10PM +0800, Keqian Zhu wrote:
> Correct sample code to avoid confusing readers.
>
> Signed-off-by: Keqian Zhu
> Cc: qemu-triv...@nongnu.org
> Reviewed-by: Paolo Bonzini
> Reviewed-by: Peter Xu
> ---
>
> v2:
> - Add Cc and R-b.
>
> ---
> docs/devel/rcu.txt | 2 +
On Thu, 17 Dec 2020, Paolo Bonzini wrote:
Due to the renumbering of text consoles when graphical consoles are
created, init_displaystate must be called after all QemuConsoles are
created, i.e. after devices are created.
vl.c calls it from qemu_init_displays, while qmp_x_exit_preconfig is
where d
On Wed, Jan 06, 2021 at 02:38:56PM +0100, Vitaly Kuznetsov wrote:
> Igor Mammedov writes:
>
> > On Tue, 05 Jan 2021 17:31:43 +0100
> > Vitaly Kuznetsov wrote:
> >
> >> Igor Mammedov writes:
> >>
> >> > On Tue, 05 Jan 2021 12:50:05 +0100
> >> >
> >> > I think there is a misunderstanding, idea w
On Wed, 6 Jan 2021 08:49:48 -0800
Ben Widawsky wrote:
> On 21-01-06 13:28:05, Jonathan Cameron wrote:
> > On Tue, 5 Jan 2021 08:52:56 -0800
> > Ben Widawsky wrote:
> >
> > > This implements all device MMIO up to the first capability .That
> > > includes the CXL Device Capabilities Array Regis
I have already sent the v3, so you may want to wait a day or two. The good
thing of conversion patches is that if they break something you can just
drop them. :)
Paolo
Il mer 6 gen 2021, 17:56 Alex Bennée ha scritto:
>
> Peter Maydell writes:
>
> > On Mon, 4 Jan 2021 at 14:44, Paolo Bonzini w
On 21-01-06 17:06:41, Jonathan Cameron wrote:
> On Wed, 6 Jan 2021 08:49:48 -0800
> Ben Widawsky wrote:
>
> > On 21-01-06 13:28:05, Jonathan Cameron wrote:
> > > On Tue, 5 Jan 2021 08:52:56 -0800
> > > Ben Widawsky wrote:
> > >
> > > > This implements all device MMIO up to the first capabilit
On Wednesday, 2021-01-06 at 10:49:06 +01, Max Reitz wrote:
> On 21.12.20 14:49, David Edmondson wrote:
>> When sending JSON to running qemu, qemu-io, etc. instances, flatten
>> the echoed input to a single line to ensure that comparisons with the
>> expected input (which is always a single line) a
On 12/15/20 7:45 AM, Jiaxun Yang wrote:
> Translate embedded assembly into IO writes which is more
> readable.
>
> Signed-off-by: Jiaxun Yang
> ---
> hw/mips/malta.c | 68 ++---
> 1 file changed, 19 insertions(+), 49 deletions(-)
Reviewed-by: Philippe
On Thu, 31 Dec 2020 00:13:01 +0200
Marian Posteuca wrote:
> Qemu's ACPI table generation sets the fields OEM ID and OEM table ID
> to "BOCHS " and "BXPC" where "" is replaced by the ACPI
> table name.
>
> Some games like Red Dead Redemption 2 seem to check the ACPI OEM ID
> and OEM table
On Wed, Jan 06, 2021 at 05:45:42PM +0100, Igor Mammedov wrote:
> On Wed, 06 Jan 2021 14:38:56 +0100
> Vitaly Kuznetsov wrote:
>
> > Igor Mammedov writes:
> >
> > > On Tue, 05 Jan 2021 17:31:43 +0100
> > > Vitaly Kuznetsov wrote:
> > >
> > >> Igor Mammedov writes:
> > >>
> > >> > On Tue,
On Wed, 6 Jan 2021 at 14:57, Paolo Bonzini wrote:
>
> The following changes since commit 41192db338588051f21501abc13743e62b0a5605:
>
> Merge remote-tracking branch
> 'remotes/ehabkost-gl/tags/machine-next-pull-request' into staging (2021-01-01
> 22:57:15 +)
>
> are available in the Git rep
On 12/15/20 7:46 AM, Jiaxun Yang wrote:
> Translate embedded assembly into IO writes which is more
> readable.
>
> Also hardcode cm_base at boot time instead of reading from CP0.
>
> Signed-off-by: Jiaxun Yang
> ---
> hw/mips/boston.c | 45 -
> 1 file
On Wed, Jan 6, 2021 at 6:28 PM Philippe Mathieu-Daudé wrote:
>
> On 12/15/20 7:46 AM, Jiaxun Yang wrote:
> > Translate embedded assembly into IO writes which is more
> > readable.
> >
> > Also hardcode cm_base at boot time instead of reading from CP0.
> >
> > Signed-off-by: Jiaxun Yang
> > ---
>
On Wed, Jan 6, 2021 at 6:30 PM Philippe Mathieu-Daudé wrote:
> On Wed, Jan 6, 2021 at 6:28 PM Philippe Mathieu-Daudé wrote:
> > On 12/15/20 7:46 AM, Jiaxun Yang wrote:
> > > Translate embedded assembly into IO writes which is more
> > > readable.
> > >
> > > Also hardcode cm_base at boot time ins
On Wed, 6 Jan 2021 13:21:23 +
Jonathan Cameron wrote:
> On Tue, 5 Jan 2021 08:52:58 -0800
> Ben Widawsky wrote:
>
> > This is the beginning of implementing mailbox support for CXL 2.0
> > devices.
> >
> > v2: Use register alignment helper (Ben)
> > Minor cleanups (Jonathan)
> > Ren
+Alex
On 12/15/20 7:45 AM, Jiaxun Yang wrote:
> Replace embedded binary with generated code.
>
> Signed-off-by: Jiaxun Yang
> ---
> hw/mips/boston.c| 17 ++---
> hw/mips/fuloong2e.c | 28
> hw/mips/malta.c | 41 ++-
On 1/3/21 9:42 PM, Philippe Mathieu-Daudé wrote:
> On 12/15/20 7:41 AM, Jiaxun Yang wrote:
>> v2:
>> A big reconstruction. rewrite helpers with CPU feature and sepreate
>> changesets.
>>
>> Jiaxun Yang (8):
>> hw/mips: Make bootloader addresses unsgined
>> hw/mips/malta: Use address translation
On 1/5/21 5:01 PM, Richard Henderson wrote:
> On 1/5/21 12:05 AM, Philippe Mathieu-Daudé wrote:
>> I'm not sure it is worth the effort, as I plan to check each ISA /
>> ASE bit from the CP0_ConfigX bits (similarly target/arm/ does), so
>> these definitions should disappear eventually.
>
> Excellen
On 1/4/21 11:11 PM, Philippe Mathieu-Daudé wrote:
> Philippe Mathieu-Daud=C3=A9 (15):
> target/mips/mips-defs: Remove USE_HOST_FLOAT_REGS comment
> target/mips/mips-defs: Reorder CPU_MIPS5 definition
> target/mips/mips-defs: Rename CPU_MIPSxx Release 1 as CPU_MIPSxxR1
> target/mips/mips-def
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