Hi Sylvain,
On Wed, Jan 6, 2021 at 6:34 PM Sylvain Pelissier
<sylvain.peliss...@gmail.com> wrote:
>
> Target description is not currently implemented in RISC-V architecture. Thus
> GDB won't set it properly when attached. The patch implements the target
> description response.
Please limit the commit message in less than 70 characters per line.
>
> Signed-off-by: Sylvain Pelissier <sylvain.peliss...@gmail.com>
> ---
> target/riscv/cpu.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 254cd83f8b..ed4971978b 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -556,6 +556,18 @@ static Property riscv_cpu_properties[] = {
> DEFINE_PROP_END_OF_LIST(),
> };
>
> +static gchar *riscv_gdb_arch_name(CPUState *cs)
> +{
> + RISCVCPU *cpu = RISCV_CPU(cs);
> + CPURISCVState *env = &cpu->env;
> +
> + if (riscv_cpu_is_32bit(env)) {
> + return g_strdup("riscv:rv32");
> + } else {
> + return g_strdup("riscv:rv64");
> + }
> +}
> +
Regards,
Bin
