Kindly ping!
Hi all,
These patches are waiting for review. Could someone help me check them?
Thanks,
Gan Qixin
> -Original Message-
> From: ganqixin
> Sent: Friday, November 27, 2020 3:18 PM
> To: qemu-...@nongnu.org; qemu-devel@nongnu.org
> Cc: peter.mayd...@linaro.org; Chenqun (kuhn)
On ARM64 the VFIO SET_IRQS ioctl is dependent on the VM interrupt
setup, if the restoring of the VFIO PCI device config space is
before the VGIC, an error might occur in the kernel.
So we move the saving of the config space to the non-iterable
process, so that it will be called after the VGIC acco
This patch set includes two fixes and one optimization for VFIO migration
as blew:
Patch 1-2:
- Fix two ordering problems in migration.
Patch 3:
- Optimize the enabling process of the MSI-X vectors in migration.
Thanks,
Shenming
Shenming Lu (3):
vfio: Move the saving of the config space to the
Different from the normal situation when the guest starts, we can
know the max unmasked vetctor (at the beginning) after msix_load()
in VFIO migration. So in order to avoid ineffectively disabling and
enabling vectors repeatedly, let's allocate all needed vectors first
and then enable these unmaske
In the VFIO VM state change handler, VFIO devices are transitioned
in the _SAVING state, which should keep them from sending interrupts.
Then we can save the pending states of all interrupts in the GIC VM
state change handler (on ARM).
So we have to set the priority of the VFIO VM state change han
Hello !
> diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
> index 782ff19..fbae1f1 100644
> --- a/hw/net/ftgmac100.c
> +++ b/hw/net/ftgmac100.c
> @@ -573,7 +573,15 @@ static void ftgmac100_do_tx(FTGMAC100State *s, uint32_t
> tx_ring,
> }
>
> if (flags & FTGMAC100_
Claudio Fontana writes:
> split up the CpusAccel tcg_cpus into three TCG variants:
>
> tcg_cpus_rr (single threaded, round robin cpus)
> tcg_cpus_icount (same as rr, but with instruction counting enabled)
> tcg_cpus_mttcg (multi-threaded cpus)
>
> diff --git a/accel/tcg/tcg-cpus-mttcg.c b/acce
On 08/12/20 23:15, Claudio Fontana wrote:
On 12/8/20 9:00 PM, Philippe Mathieu-Daudé wrote:
On 12/8/20 8:48 PM, Claudio Fontana wrote:
v8 -> v9: move additional methods to CPUClass->tcg_ops
do_unaligned_access, transaction_failed and do_interrupt.
do_interrupt is a bit tricky, as the same cod
On 12/9/20 12:39 AM, Richard Henderson wrote:
On 12/8/20 12:15 PM, Peter Maydell wrote:
The clock_get_ns() API claims to return the period of a clock in
nanoseconds. Unfortunately since it returns an integer and a
clock's period is represented in units of 2^-32 nanoseconds,
the result is often a
On 12/8/20 7:15 PM, Peter Maydell wrote:
Currently the MIPS code uses the old clock_get_ns() API to
calculate a time length in nanoseconds:
cpu->cp0_count_rate * clock_get_ns(MIPS_CPU(cpu)->clock)
This relies on the clock having a period which is an exact number
of nanoseconds.
Switch to the
On 12/8/20 7:15 PM, Peter Maydell wrote:
Remove the now-unused clock_get_ns() API and the CLOCK_PERIOD_TO_NS()
macro that only it was using.
Signed-off-by: Peter Maydell
Reviewed-by: Luc Michel
---
docs/devel/clocks.rst | 17 +
include/hw/clock.h| 6 --
2 files
On 12/8/20 7:15 PM, Peter Maydell wrote:
It's common to want to print a human-readable indication of a clock's
frequency. Provide a utility function in the clock API to return a
string which is a displayable representation of the frequency,
and use it in qdev-monitor.c.
Before:
(qemu) info q
On 12/8/20 5:19 PM, David Hildenbrand wrote:
> On 08.12.20 17:11, Christian Borntraeger wrote:
>>
>>
>> On 08.12.20 15:55, David Hildenbrand wrote:
>>> On 08.12.20 14:29, Christian Borntraeger wrote:
On 04.12.20 09:36, Janosch Frank wrote:
> There's no VSIE support for a protecte
Claudio Fontana writes:
> after the initial split into 3 tcg variants, we proceed to also
> split tcg_start_vcpu_thread.
>
> We actually split it in 2 this time, since the icount variant
> just uses the round robin function.
>
> Suggested-by: Richard Henderson
> Signed-off-by: Claudio Fontana
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
> Reviewed-by: Philippe Mathieu-Daudé
> Reviewed-by: Richard Henderson
> ---
> accel/tcg/tcg-cpus-icount.c | 24 ++--
> accel/tcg/tcg-cpus-icount.h | 6 +--
> accel/tcg/tcg-cpus-mttcg.c | 10 ++---
> accel/tcg/tcg-cpus-rr.c
Hi Richard,
On 12/9/20 1:03 AM, Richard Henderson wrote:
> On 12/8/20 6:01 PM, Richard Henderson wrote:
>> On 12/8/20 5:56 PM, Richard Henderson wrote:
>>> On 12/7/20 6:36 PM, Philippe Mathieu-Daudé wrote:
Make gen_msa() and gen_msa_branch() public declarations
so we can keep calling the
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
> ---
> MAINTAINERS | 5 +
> target/i386/meson.build | 5 +
> target/i386/whpx/meson.build | 4
> target/i386/{ => whpx}/whp-dispatch.h | 0
> target/i386/{ => whpx}/whpx-all
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
Public bug reported:
Trying to build QEMU on sparc64 fails with:
[4648/8435] c++ -o qemu-system-ppc64 qemu-system-ppc64.p/softmmu_main.c.o
libcommon.fa.p/ui_vnc-auth-sasl.c.o libcommon.fa.p/migration_colo-failover.c.o
libcommon.fa.p/hw_input_vhost-user-input.c.o
libcommon.fa.p/replay_replay-r
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
> Reviewed-by: Roman Bolshakov
Reviewed-by: Alex Bennée
--
Alex Bennée
On Wednesday, 2020-12-09 at 07:20:29 GMT, Li Zhang wrote:
> This patch is to avoid executing migrations twice, which causes
> coredump. After the migration has been completed, guest is in postmigrated
> status on source host and the block device is inactive. If executing
> migration again, it wil
On 12/8/20 8:48 PM, Claudio Fontana wrote:
> From: Eduardo Habkost
>
> Signed-off-by: Eduardo Habkost
> [claudio: wrapped in CONFIG_TCG]
> Signed-off-by: Claudio Fontana
> Reviewed-by: Philippe Mathieu-Daudé
> ---
...
> diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
- Original Message -
> On Fri, Nov 20, 2020 at 07:50:38PM +0100, Eugenio Pérez wrote:
> > This series enable vDPA software assisted live migration for vhost-net
> > devices. This is a new method of vhost devices migration: Instead of
> > relay on vDPA device's dirty logging capability, SW a
On 12/8/20 8:48 PM, Claudio Fontana wrote:
> From: Eduardo Habkost
>
> Signed-off-by: Eduardo Habkost
> [claudio: wrapped in CONFIG_TCG]
> Signed-off-by: Claudio Fontana
> Reviewed-by: Philippe Mathieu-Daudé
> ---
...
> diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.
On 12/8/20 8:48 PM, Claudio Fontana wrote:
> Signed-off-by: Claudio Fontana
> ---
...
> diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
> index 6b9b72e785..0cc0927738 100644
> --- a/include/hw/core/tcg-cpu-ops.h
> +++ b/include/hw/core/tcg-cpu-ops.h
Missing (for MemTxAt
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
> ---
> target/i386/meson.build | 14 +-
> target/i386/{ => tcg}/bpt_helper.c | 0
> target/i386/{ => tcg}/cc_helper.c | 0
> target/i386/{ => tcg}/excp_helper.c | 0
> target/i386/{ => tcg}/fpu_helper.c |
On Tue, Dec 08, 2020 at 03:38:22PM +0100, Kevin Wolf wrote:
> Am 08.12.2020 um 13:59 hat Li Feng geschrieben:
> > This patch addresses this issue:
> > When accessing a volume on an NFS filesystem without supporting the file
> > lock,
> > tools, like qemu-img, will complain "Failed to lock byte 100
The 64bits MMU variants have POWERPC_MMU_64 flag and POWERPC_MMU_64B
is a specific one (POWERPC_MMU_32B with flag POWERPC_MMU_64). As a
consequence, the original test ignored POWERPC_MMU_32B too.
The commit 5f2a625452 targeted hash64 mmu version. And indeed the
'mmu-hash64.c' does not use access_t
On Tue, Dec 08, 2020 at 04:20:23PM -0500, Eduardo Habkost wrote:
> Add command-line option that lets the SMBIOS entry point type to
> be configured.
>
> SMBIOS 3.0 support is necessary to allow us to support more
> than 720 VCPUs in x86_64, due to SMBIOS 2.1 table size limits.
>
> Note that it's
From: Philippe Mathieu-Daudé
Document what this job cover (build X86 targets with
KVM being the single accelerator available).
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201207131503.3858889-2-phi...@redhat.com>
Signed-off-by: Thomas Huth
---
.gitlab-ci.yml
From: Philippe Mathieu-Daudé
'extends' is an alternative to using YAML anchors
and is a little more flexible and readable. See:
https://docs.gitlab.com/ee/ci/yaml/#extends
More importantly it allows exploding YAML jobs.
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Thomas Huth
Signed-
From: Philippe Mathieu-Daudé
Introduce a job template to cross-build accelerator specific
jobs (enable a specific accelerator, disabling the others).
The specific accelerator is selected by the $ACCEL environment
variable (default to KVM).
Extra options such disabling other accelerators are pas
From: Philippe Mathieu-Daudé
Cross-build ARM and X86 targets with only Xen accelerator enabled.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201207131503.3858889-6-phi...@redhat.com>
Reviewed-by: Thomas Huth
Signed-off-by: Thomas Huth
---
.gitlab-ci.d/crossbuilds.yml | 14 +++
From: Philippe Mathieu-Daudé
Cross-build s390x target with only KVM accelerator enabled.
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201207131503.3858889-5-phi...@redhat.com>
Signed-off-by: Thomas Huth
---
.gitlab-ci.d/crossbuilds.yml | 7 ++-
1 file cha
Hi Peter,
The following changes since commit 553032db17440f8de011390e5a1cfddd13751b0b:
Update version for v5.2.0 release (2020-12-08 15:55:19 +)
are available in the Git repository at:
https://gitlab.com/huth/qemu.git tags/pull-request-2020-12-09
for you to fetch changes up to b0bed2c
From: Philippe Mathieu-Daudé
Missed in fd250172842 ("qtest: add a reproducer for LP#1878642").
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201201191026.4149955-2-phi...@redhat.com>
Reviewed-by: Li Qiang
Signed-off-by: Thomas Huth
---
tests/qtest/fuzz-test.c
From: Philippe Mathieu-Daudé
Similarly to commit 8cdb2cef3f1, move the coroutine tests to GitLab.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201108204535.2319870-13-phi...@redhat.com>
Reviewed-by: Wainer dos Santos Moschetta
[thuth: Replaced Travis by Gitlab-CI in comment]
Signed-off
From: Alex Chen
The fixture->fd is created in fixture_setup() and, likewise, needs to be closed
in fixture_tear_down().
Reported-by: Euler Robot
Signed-off-by: Alex Chen
Reviewed-by: Li Qiang
Reviewed-by: Marc-André Lureau
Message-Id: <20201125102403.57709-1-alex.c...@huawei.com>
Signed-off-
From: Philippe Mathieu-Daudé
Add these missing options to the 'build-disabled' job:
--disable-auth-pam (commit 8953caf3cd38)
--disable-gcrypt (commit 91bfcdb01d48)
--disable-keyring (commit 54e7aac05624)
--disable-libudev (commit 5c53015
From: Philippe Mathieu-Daudé
Similarly to commit 8cdb2cef3f1, move the user-static test to GitLab.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201108204535.2319870-11-phi...@redhat.com>
Reviewed-by: Wainer dos Santos Moschetta
Signed-off-by: Thomas Huth
---
.gitlab-ci.yml | 7 ++
Thanks for telling me that. I didn't notice this patch.
I just caught this error when I used it and read the source code, it should
be fixed.
Thanks
Li
On Wed, Dec 9, 2020 at 5:23 PM David Edmondson wrote:
> On Wednesday, 2020-12-09 at 07:20:29 GMT, Li Zhang wrote:
>
> > This patch is to avoid
From: Alexander Bulekov
The generic fuzzer can find double-fetch bugs. However:
* We currently have no good way of producing qemu-system reproducers for
double-fetch bugs. Even if we can get developers to run the binary-blob
reproducers with the qemu-fuzz builds, we currently don't have a min
From: Philippe Mathieu-Daudé
We will keep adding/removing options to our 'configure' script,
so for easier maintainability it makes sense to have CONFIGURE_ARGS
declared as one option per line. This way we can review diff easily
(or rebase/cherry-pick).
No logical change.
Signed-off-by: Philipp
From: Peter Maydell
Coverity points out that the realize function for the TYPE_MCF5206_MBAR
device leaks the IRQ array it allocates with qemu_allocate_irqs().
Keep a pointer to it in the device state struct to avoid the leak.
(Since it needs to stay around for the life of the simulation there
is
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
Hi Dmitry,
By and large, this looks OK to me. There are still some issues here and
there, and some comments of mine that you did not address, but I will
follow up with patches to fix that. Let's get this merged.
It looks like the nvme-next you rebased on is slightly old and missing
two commits:
This patch series is a kind of 'rethinking' of Denis Plotnikov's ideas he's
implemented in his series '[PATCH v0 0/4] migration: add background snapshot'.
Currently the only way to make (external) live VM snapshot is using existing
dirty page logging migration mechanism. The main problem is that i
In this particular implementation the same single migration
thread is responsible for both normal linear dirty page
migration and procesing UFFD page fault events.
Processing write faults includes reading UFFD file descriptor,
finding respective RAM block and saving faulting page to
the migration
Glue code to the userfaultfd kernel implementation.
Querying feature support, createing file descriptor, feature control,
memory region registration, IOCTLs on registered registered regions.
Signed-off-by: Andrey Gruzdev
Reviewed-by: Peter Xu
---
include/exec/memory.h | 1 +
include/qemu
Introducing implementation of 'background' snapshot thread
which in overall follows the logic of precopy migration
while internally utilizes completely different mechanism
to 'freeze' vmstate at the start of snapshot creation.
This mechanism is based on userfault_fd with wr-protection
support and
On Dec 9 07:13, Keith Busch wrote:
> On Tue, Dec 08, 2020 at 09:33:39AM +0100, Klaus Jensen wrote:
> > +static uint16_t nvme_copy(NvmeCtrl *n, NvmeRequest *req)
> > +{
>
>
>
> > +for (i = 0; i < nr; i++) {
> > +uint32_t _nlb = le16_to_cpu(range[i].nlb) + 1;
> > +if (_nlb > l
Add new capability to 'qapi/migration.json' schema.
Update migrate_caps_check() to validate enabled capability set
against introduced one. Perform checks for required kernel features
and compatibility with guest memory backends.
Signed-off-by: Andrey Gruzdev
Reviewed-by: Peter Xu
---
migration/
On Tue, Oct 06, 2020 at 12:22:55PM +0200, Kevin Wolf wrote:
> Am 10.09.2020 um 16:43 hat Stefan Hajnoczi geschrieben:
> > Although qemu-storage-daemon QMP commands are identical to QEMU QMP
> > commands they are a subset. Generate a manual page of just the commands
> > supported by qemu-storage-dae
no-re...@patchew.org writes:
> Patchew URL: https://patchew.org/QEMU/20201208194839.31305-1-cfont...@suse.de/
>
>
>
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
Also replicated in:
https://gitlab.com/stsquad/qemu/-/jobs/899057106
>
>
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
> ---
> target/i386/cpu.c | 33 --
> target/i386/cpu.h | 97 ++---
> target/i386/helper-tcg.h | 112 ++
> target/i386/helper.c | 23
Claudio Fontana writes:
> From: Eduardo Habkost
>
> Move invocation of CPUClass.cpu_exec_*() to separate helpers,
> to make it easier to refactor that code later.
>
> Signed-off-by: Eduardo Habkost
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
Claudio Fontana writes:
> From: Eduardo Habkost
>
> This will let us simplify the code that initializes CPU class
> methods, when we move cpu_exec_*() to a separate struct.
> Signed-off-by: Eduardo Habkost
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
v3:
* Address Kevin's comments
v2:
* Drop block-core.json h2 header removal, add an h1 header to
storage-daemon/qapi/qapi-schema.json instead [Kevin]
* Add Examples section to man page [Kevin]
Add documentation for the qemu-storage-daemon program and its QMP commands.
The man page looks lik
Claudio Fontana writes:
> From: Eduardo Habkost
>
> Signed-off-by: Eduardo Habkost
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
The MAINTAINERS file was not updated when the storage daemon was merged.
Signed-off-by: Stefan Hajnoczi
Acked-by: Kevin Wolf
Reviewed-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 68bc160f41..8676730cc9 1
Document the qemu-storage-daemon tool. Most of the command-line options
are identical to their QEMU counterparts. Perhaps Sphinx hxtool
integration could be extended to extract documentation for individual
command-line options so they can be shared. For now the
qemu-storage-daemon simply refers to
Claudio Fontana writes:
> From: Eduardo Habkost
>
> The TCG-specific CPU methods will be moved to a separate struct,
> to make it easier to move accel-specific code outside generic CPU
> code in the future. Start by moving tcg_initialize().
>
> The new CPUClass.tcg_opts field may eventually b
Claudio Fontana writes:
> From: Eduardo Habkost
>
> Signed-off-by: Eduardo Habkost
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
Although individual qemu-storage-daemon QMP commands are identical to
QEMU QMP commands, qemu-storage-daemon only supports a subset of QEMU's
QMP commands. Generate a manual page of just the commands supported by
qemu-storage-daemon so that users know exactly what is available in
qemu-storage-daemo
Claudio Fontana writes:
> move away TCG-only code, make it compile only on TCG.
>
> Signed-off-by: Claudio Fontana
> ---
> accel/tcg/cpu-exec.c | 28 +
> cpu.c | 70 ---
> hw/core/cpu.c | 6 +++-
> include/hw/co
Claudio Fontana writes:
> From: Eduardo Habkost
>
> Signed-off-by: Eduardo Habkost
> [claudio: wrapped in CONFIG_TCG]
> Signed-off-by: Claudio Fontana
> Reviewed-by: Philippe Mathieu-Daudé
> ---
> accel/tcg/cpu-exec.c | 4 ++--
> include/hw/core/cpu.h | 8
> inc
On 12/9/20 10:28 AM, Philippe Mathieu-Daudé wrote:
> On 12/8/20 8:48 PM, Claudio Fontana wrote:
>> From: Eduardo Habkost
>>
>> Signed-off-by: Eduardo Habkost
>> [claudio: wrapped in CONFIG_TCG]
>> Signed-off-by: Claudio Fontana
>> Reviewed-by: Philippe Mathieu-Daudé
>> ---
> ...
>
>> diff --gi
On 08/11/2020 21.45, Philippe Mathieu-Daudé wrote:
> We have various job covered on Travis-CI, but recommend the
> community to use GitLab, so build failures are missed.
>
> We need help to move the jobs to GitLab (we will keep the s390x
> and ppc64 containerized jobs on Travis as there is no simi
On 12/9/20 10:30 AM, Alex Bennée wrote:
>
> Claudio Fontana writes:
>
>> Signed-off-by: Claudio Fontana
>> ---
>> target/i386/meson.build | 14 +-
>> target/i386/{ => tcg}/bpt_helper.c | 0
>> target/i386/{ => tcg}/cc_helper.c | 0
>> target/i386/{ => tcg}/excp_hel
Claudio Fontana writes:
> From: Eduardo Habkost
>
> Signed-off-by: Eduardo Habkost
> [claudio: wrapped in CONFIG_TCG]
> Signed-off-by: Claudio Fontana
> Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
--
Alex Bennée
On 12/9/20 11:23 AM, Alex Bennée wrote:
>
> Claudio Fontana writes:
>
>> Signed-off-by: Claudio Fontana
>> ---
>> target/i386/cpu.c | 33 --
>> target/i386/cpu.h | 97 ++---
>> target/i386/helper-tcg.h | 112 +++
On 12/9/20 11:42 AM, Alex Bennée wrote:
>
> Claudio Fontana writes:
>
>> move away TCG-only code, make it compile only on TCG.
>>
>> Signed-off-by: Claudio Fontana
>> ---
>> accel/tcg/cpu-exec.c | 28 +
>> cpu.c | 70 ---
Hello,
Reviewed-by: Minwoo Im
Claudio Fontana writes:
> From: Eduardo Habkost
>
> Signed-off-by: Eduardo Habkost
> [claudio: wrapped in CONFIG_TCG]
> Signed-off-by: Claudio Fontana
> Reviewed-by: Philippe Mathieu-Daudé
> ---
> accel/tcg/cputlb.c | 6 +++---
> accel/tcg/user-exec.c | 6 +++---
>
Claudio Fontana writes:
> From: Eduardo Habkost
>
> Signed-off-by: Eduardo Habkost
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
Claudio Fontana writes:
> cc->do_interrupt is in theory a TCG callback used in accel/tcg only,
> to prepare the emulated architecture to take an interrupt as defined
> in the hardware specifications,
>
> but in reality the _do_interrupt style of functions in targets are
> also occasionally reus
From: Klaus Jensen
Add new data structures and types for the Simple Copy command.
Signed-off-by: Klaus Jensen
Cc: Stefan Hajnoczi
Cc: Fam Zheng
Reviewed-by: Minwoo Im
Acked-by: Stefan Hajnoczi
---
include/block/nvme.h | 45 ++--
1 file changed, 43 in
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
From: Klaus Jensen
Add support for TP 4065 ("Simple Copy Command").
Changes for v4
* merge for-loops (Keith)
Changes for v3
* rebased on nvme-next
* changed the default msrc value to a more reasonable 127 from 255 to
better align with the default mcl value of 128.
Changes for v2
From: Klaus Jensen
Add support for TP 4065a ("Simple Copy Command"), v2020.05.04
("Ratified").
The implementation uses a bounce buffer to first read in the source
logical blocks, then issue a write of that bounce buffer. The default
maximum number of source logical blocks is 128, translating to
On Dec 8 10:16, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Commit 37712e00b1f0 ("hw/block/nvme: factor out pmr setup") changed the
> control flow such that the CAP register is erronously cleared after
> nvme_init_pmr() has configured it. Since the entire NvmeCtrl structure
> is zero-filled ini
From: yuanjungong
close fd opened by monitor_fd_param() before returning.
Signed-off-by: yuanjungong
---
net/socket.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/net/socket.c b/net/socket.c
index 15b410e..2f720a7 100644
--- a/net/socket.c
+++ b/net/socket.c
@@ -735,12 +735,15 @@ int
On Mon, Dec 7, 2020 at 5:43 PM Stefan Hajnoczi wrote:
>
> On Fri, Nov 20, 2020 at 07:50:42PM +0100, Eugenio Pérez wrote:
> > Signed-off-by: Eugenio Pérez
> > ---
> > hw/virtio/vhost-backend.c | 29 +
> > 1 file changed, 29 insertions(+)
> >
> > diff --git a/hw/virtio/
From: yuanjungong
close vhostfd before returning.
Signed-off-by: yuanjungong
---
hw/scsi/vhost-scsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/scsi/vhost-scsi.c b/hw/scsi/vhost-scsi.c
index 4d70fa0..9d12034 100644
--- a/hw/scsi/vhost-scsi.c
+++ b/hw/scsi/vhost-scs
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
nfs_client_open returns the file size in sectors. This effectively
makes it impossible to open files larger than 1TB.
Fixes: a1a42af422d46812f1f0cebe6b230c20409a3731
Cc: qemu-sta...@nongnu.org
Signed-off-by: Peter Lieven
---
block/nfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Am 01.12.20 um 13:40 schrieb Peter Lieven:
> Hi,
>
>
> i would like to submit a series for 6.0 which will convert the aio hooks to
> native coroutine hooks and add write zeroes support.
>
> The aio routines are nowadays just an emulation on top of coroutines which
> add additional overhead.
>
> F
On Mon, Dec 7, 2020 at 5:19 PM Stefan Hajnoczi wrote:
>
> On Fri, Nov 20, 2020 at 07:50:40PM +0100, Eugenio Pérez wrote:
> > This allows code to reuse the logic to not to re-enable or re-disable
> > migration mechanisms. Code works the same way as before.
> >
> > Signed-off-by: Eugenio Pérez
> >
On Wed, 9 Dec 2020 16:09:17 +0800
Shenming Lu wrote:
> On ARM64 the VFIO SET_IRQS ioctl is dependent on the VM interrupt
> setup, if the restoring of the VFIO PCI device config space is
> before the VGIC, an error might occur in the kernel.
>
> So we move the saving of the config space to the no
Hi all!
I have a coredump of our qemu branch, based on rhev-2.12.0-44.el7_8.2,
which in turn is based on v2.12.0.. And don't have any kind of
reproduce.
The backtrace:
#0 aio_co_schedule (ctx=0x0, co=0x55dd539fa340) at util/async.c:455
#1 0x55dd51149716 in aio_co_enter (ctx=, co=)
On Wed, 9 Dec 2020 10:56:48 +0800
Keqian Zhu wrote:
> In host_memory_backend_get_host_nodes, we build host_nodes
> list and output it to v (a StringOutputVisitor) but forget
> to free the list. This fixes the memory leak.
>
> The memory leak stack:
>
> ==qemu-kvm==209357==ERROR: LeakSanitizer:
On Tue, Dec 08, 2020 at 06:21:12PM +, Marc Zyngier wrote:
> On 2020-12-08 17:21, Catalin Marinas wrote:
> > On Mon, Dec 07, 2020 at 07:03:13PM +, Marc Zyngier wrote:
> > > I wonder whether we will have to have something kernel side to
> > > dump/reload tags in a way that matches the pattern
On Wed, 9 Dec 2020 16:09:18 +0800
Shenming Lu wrote:
> In the VFIO VM state change handler, VFIO devices are transitioned
> in the _SAVING state, which should keep them from sending interrupts.
> Then we can save the pending states of all interrupts in the GIC VM
> state change handler (on ARM).
Claudio Fontana writes:
> make it consistently SOFTMMU-only.
>
> Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
--
Alex Bennée
Claudio Fontana writes:
> Signed-off-by: Claudio Fontana
> ---
> MAINTAINERS| 2 +-
> accel/accel-common.c | 50 ++
> accel/{accel.c => accel-softmmu.c} | 27 ++--
> accel/accel-user.c | 24
Claudio Fontana writes:
> centralize the registration of the cpus.c module
> accelerator operations in accel/accel-softmmu.c
>
> Signed-off-by: Claudio Fontana
> diff --git a/accel/tcg/tcg-cpus.c b/accel/tcg/tcg-cpus.c
> index e335f9f155..38a58ab271 100644
> --- a/accel/tcg/tcg-cpus.c
> +++ b
On 12/9/20 1:51 PM, Alex Bennée wrote:
>
> Claudio Fontana writes:
>
>> Signed-off-by: Claudio Fontana
>> ---
>> MAINTAINERS| 2 +-
>> accel/accel-common.c | 50 ++
>> accel/{accel.c => accel-softmmu.c} | 27 ++--
>>
Claudio Fontana writes:
>
> Looking forward to your comments on this proposal,
OK I've completed my pass although I petered out a little just before
the changes that affect the explicit ordering which was a bit too much
for my brain to process after lunch. Some general thoughts...
I like the
On 2020-12-09 12:44, Catalin Marinas wrote:
On Tue, Dec 08, 2020 at 06:21:12PM +, Marc Zyngier wrote:
On 2020-12-08 17:21, Catalin Marinas wrote:
> On Mon, Dec 07, 2020 at 07:03:13PM +, Marc Zyngier wrote:
> > I wonder whether we will have to have something kernel side to
> > dump/reload
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