On Sat, May 26, 2012 at 02:51:29PM +0200, Andreas Färber wrote:
> Am 26.05.2012 07:55, schrieb 陳韋任:
> > On Fri, May 25, 2012 at 06:13:25PM -0400, Ira Ray Jenkins wrote:
> >> I found a GSOC11 project that attempted to port the Android "Goldfish"
> >> platfo
[1], but apparently it not get merged
into trunk. I don't know why. :)
Regards,
chenwj
[1] http://lists.gnu.org/archive/html/qemu-devel/2011-08/msg02436.html
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ate rather then QEMUFile is a good idea?
I saw OpenRISC target got this kind of feedback before [1].
Regards,
chenwj
[1] http://lists.gnu.org/archive/html/qemu-devel/2012-05/msg02457.html
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ink you can use `time` to measure the timing in user mode, but things
seems get quit complicate in system mode.
Regards,
chenwj
[1] http://blog.gmane.org/gmane.comp.emulators.qemu.coremu.devel/month=20120401
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/* as an example. Otherwise, looks at tcg/xxx/*.
The term "target" could be a little MISLEADING here. :)
Regards,
chenwj
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#x27;s why I add a counter there. But this way I'll collect a
global static not per-process one. I'll try systemtap latter but not sure it
does the same thing I want to do.
Any thoughts? :)
Regards,
chenwj
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G0), so you shouldn't use env here somehow. Maybe Blue can show you some
example how to do that, target-sparc/* might be a place?
Regards,
chenwj
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e me some hits?
I guest you need to write your own floating helper functions to do that.
Am I right, Max?
Regards,
chenwj
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;vmstate_cpu, opaque, version_id);
}
---
Leave to vmstate_save_state/vmstate_load_state (savevm.c) do the real things.
Regards,
chenwj
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ge it
> into OpenriscCPU.
I think OpenRISC is better [1].
Regards,
chenwj
[1] http://en.wikipedia.org/wiki/OpenRISC
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I suppose you only need to #include "def-helper.h" once?
Regards,
chenwj
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Hi all,
I would like to know if I can retrieve pre-process information in QEMU
system mode. For example, I want to know each process's page fault ratio.
Is there a way to do that?
Thanks.
Regards,
chenwj
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tch will remove AREG0 so that we can use clang to compile QEMU?
How much the performance lose?
Regards,
chenwj
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) at /tmp/chenwj/qemu-0.13.0/softmmu_template.h:213
#4 0x0054e4ab in __stl_mmu (addr=229376, val=0, mmu_idx=0) at
/tmp/chenwj/qemu-0.13.0/softmmu_template.h:245
---
Thanks!
Regards,
chenwj
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more about it, but
googling doesn't help. Would you mind to shed some light on that? Thanks.
Regards,
chenwj
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ovides.
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rface.
>
> Any approach to do this in QEMU? Thanks.
Maybe take a look at
http://lists.gnu.org/archive/html/qemu-devel/2008-07/msg00507.html
Regards,
chenwj
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al. :/ If
people can focus on one document, then it's easier to make it a good shape.
Regards,
chenwj
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veryone use x86/x86_64, so I think
replace "qemu" with particular name is inappropriate.
> When "qemu" is not used for the name of the executable, it
> should be written "QEMU".
Agreed.
I have no idea about remaining stuff. :)
Regards,
chenwj
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ause and *_resume functions, but they are -
> as far as I know - not applicable for my task.
Just a quick reply. QEMU system mode provides "-singlestep" option. Maybe you
can start from there, see how the singlestep is done.
Regards,
chenwj
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Wei-Ren Chen (陳韋任)
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ot; message. Any idea
on which part I might did wrong? I use QEMU git head and QEMU 0.13.
Thanks in advance. :)
Regards,
chenwj
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On Sun, Apr 22, 2012 at 12:07:40PM +0800, 陳韋任 wrote:
> > I am using qemu to run VMs on my computer with amd chip on board.
> > However, my computer doesn't support amd-v, so the performance of the VM is
> > low.
> > I do have experiences in optimization of program u
ed by helper functions in scalar manner. Maybe you can try to map
guest SIMD into host SIMD.
Good Luck!
Regards,
chenwj
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gainst the patch.
Regards,
chenwj
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n't compatible with gdb.
Does gdb 7.2 support PIE? QEMU default build is PIE. Try disable PIE build
then run gdb 7.2 again?
Regards,
chenwj
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ill_tlb()
> ...
>
> }
Perhaps __ldb_mmu is not only called in the TLB lookup sequence, I guess.
But I am not sure of it.
Regards,
chenwj
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) is (almost) what TLB lookup hit/miss looks like.
If TLB miss, it will call something like __ldb_mmu (b). __ldb_mmu will try to
walk guest page table, then fill TLB entry if page table hit, or raise a guest
page fault exception if page table miss.
HTH,
chenwj
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MASK) ||
(pc & TARGET_PAGE_MASK) == ((s->pc - 1) & TARGET_PAGE_MASK)) {
}
---
Thanks!
Regards,
chenwj
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u-devel/2011-09/msg03065.html
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e as tb
is. In summary, those check (1) and (2) are used to avoid block linking to cross
guest page boundary.
Am I right? If so far so good, I am curious about why we need (s->pc - 1)
instead of just (s->pc). Could you shed some light on that? Thanks in advance!
Regards,
chenwj
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Wei-Ren Chen (陳韋任)
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7;s hard to find the real instructions of that single program...
You have to know that even a simple helloworld contains many instructions
than you thought (dynamic linker, for example). My suggestion is using
`objdump` at the same time to locate the function you're interested in, then
look in
; ideas on this?
How about inserting your own helper functions instead of an interrupt?
Regards,
chenwj
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OS
can
respond to my keyboard. Besides, Ctrl + C can not terminate QEMU, I have
to
use `kill` to stop it.
Is this what you expect?
Regards,
chenwj
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I ran
linux-0.2.img with a modified QEMU whose cpu_unlink_tb does nothing.
Everything seems work fine. Is this experiment too trivial to show what
bad things happened when we don't unlink tb?
Thanks! :)
Regards,
chenwj
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s.gnu.org/archive/html/qemu-devel/2012-01/msg01897.html
Regards,
chenwj
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s an "internal"
source which breaks the current execution flow of the CPU. Take divide by zero
as an example, CPU will detect this error (occurred in the CPU itself). So
depends on what you mean "exception", do_interrupt or gen_exception might does
the real work.
Regards,
che
-> X86 to moniter the ram
> access on QEMU?
TGC ops like qemu_ld/qemu_st is for address translations (guest virtual to
host virtual) in system mode, that's all I can tell.
Regards,
chenwj
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On Wed, Mar 28, 2012 at 04:25:54PM +0800, Zhi Yong Wu wrote:
> On Wed, Mar 28, 2012 at 4:05 PM, 陳韋任 wrote:
> >> Il 28/03/2012 09:53, Zhi Yong Wu ha scritto:
> >> > By the way, why have we not add one QOM cookbook to docs? It is very
> >> > useful for us newb
> Il 28/03/2012 09:53, Zhi Yong Wu ha scritto:
> > By the way, why have we not add one QOM cookbook to docs? It is very
> > useful for us newbiew to learn.
You can write what you learn during this work. This should be a good
start! :)
Regards,
chenwj
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C
ecture/
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> Another question, how can I boot up Android on QEMU?
IIRC, QEMU is lack of some hw support needed by Android platform, so the
answer might be no.
Regards,
chenwj
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http://qemu.weilnetz.de/qemu-doc.html#QEMU-User-space-emulator
On Thu, Mar 15, 2012 at 10:42:02PM -0400, Yue Chen wrote:
> So how to run a Windows program or Linux program under user mode ? I cannot
> find useful documentations. Many thanks.
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:
> But it is hard to localize a specific program instead of lots of logs.
> On Mar 15, 2012 4:14 AM, "陳韋任" wrote:
>
> > On Thu, Mar 15, 2012 at 01:26:44PM +0700, Mulyadi Santosa wrote:
> > > On Thu, Mar 15, 2012 at 09:12, Yue Chen wrote:
> > > > Hi!
proach to do this under
> > QEMU? Thanks.
>
> are you referring to you Qemu system emulation or Qemu user mode?
Does that matter? I think "-d op" should be enough, right?
Regards,
chenwj
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> Finally, as I am trying to trace the functions called, is it possible for
> me to output the true address of the translated instruction instead of its
> code cache address? If yes, this would allow me to compare the generated
> trace and with the dump of the IR, making it easy to draw a code flow graph.
I think you need to output the guest pc, which is ususally something like
"target_ulong pc".
Regards,
chenwj
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e-trace-backend=simple
> make
>
> 2. Create a file with the events you want to trace:
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CC'ed to the list.
On Wed, Mar 07, 2012 at 07:47:08PM +0800, WanPeng Li wrote:
> On Tue, Mar 06, 2012 at 06:10:16PM +0800, 陳韋任 wrote:
> >> I read pci code in qemu about i440fx, pci.c and so on. I think if guest
> >> os whose mainboard is based on x86, it will use IO i
et called.
HTH,
chenwj
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mentioned on the mail below is a good start.
http://www.mail-archive.com/qemu-devel@nongnu.org/msg99864.html
HTH,
chenwj
[1]
http://wiki.qemu.org/Documentation/GettingStartedDevelopers#Getting_to_know_the_code
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tp://en.wikipedia.org/wiki/Conventional_PCI
[4] http://en.wikipedia.org/wiki/General_Purpose_Input/Output
[5] 系统虚拟化:原理与实现
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%esp,%ebp
0x080483b7: pop%ebp
0x080483b8: ret
> Finally, I've been trying to find material about how this translation works
> properly, but I've been unable to find much. Is there something I should be
> reading before asking around here? If yes, please, point me to
te important if we want to make
TCG multithreaded, right? Is there a better way to solve this?
Regards,
chenwj
[1]
http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.187.6011&rep=rep1&type=pdf
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- Emulate all potentially trapping guest instructions in the same order with
respect to the guest store instructions.
Thanks!
Regards,
chenwj
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Home
headers.
I thought QEMU is written in C, right? Is there anything related to C++?
Regards,
chenwj
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ey done while facing
> different problems on the way of paralleling the TCG.
> I'm sure that those approaches should be used in future work.
FWIW, COREMU maintainer tends to upstream their work but they have
another project to do right now, so ... ;)
Regards,
chenwj
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s unless you know where
> you're going...
Would the paper "PQEMU: A Parallel System Emulator Based on QEMU " help on
this?
Regards,
chenwj
[1] http://www.cs.nthu.edu.tw/~ychung/conference/ICPADS2011.pdf
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Hi Rajat,
Great work! It seems this is a kind of like static compilation, right? I think
people are more interested in using QEMU as a dynamic translator as a library.
Would you mind to tell me what scenario your work aims to?
Regards,
chenwj
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> ...which Peter has already done:
>
> http://patchwork.ozlabs.org/patch/142306/
>
> Please coordinate with him.
O.K., I already told Stefan to ignore my patch. :)
Thanks!
Regards,
chenwj
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Hi Stefan,
Peter already fix this issue [1]. Please ignore my patch, thanks!
Regards,
chenwj
[1] http://patchwork.ozlabs.org/patch/142306/
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,
chenwj
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> 3: or give me some introduce of FDC.
http://en.wikipedia.org/wiki/Floppy_disk_controller
HTH,
chenwj
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On Tue, Feb 21, 2012 at 12:27:26PM +, Stefan Hajnoczi wrote:
> On Tue, Feb 21, 2012 at 10:12 AM, 陳韋任 wrote:
> > Commit 7b93fadf3a38d1ed65ea5536a52efc2772c6e3b8 adds basic version of
> > bridge
> > helper, but introduces dependency issue at the same time. While buildin
Commit 7b93fadf3a38d1ed65ea5536a52efc2772c6e3b8 adds basic version of bridge
helper, but introduces dependency issue at the same time. While building target
xxx-linux-user, qemu-bridge-helper.c needs config-host.h which is not generated
at the moment. Explicitly declaring the dependency for the h
Commit 7b93fadf3a38d1ed65ea5536a52efc2772c6e3b8 adds basic version of bridge
helper, but introduces dependency issue at the same time. While building target
xxx-linux-user, qemu-bridge-helper.c needs config-host.h which is not generated
at the moment. Building recurse-all target first fixes the p
+1
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+1
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+1
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+1
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+1
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+1
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+1
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t be help.
Regards,
chenwj
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> probably via gdbserver.
I see. Thanks.
Regards,
chenwj
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On Fri, Feb 10, 2012 at 08:14:41AM +, Stefan Hajnoczi wrote:
> On Thu, Feb 09, 2012 at 06:33:16PM +0800, 陳韋任 wrote:
> > The question is not so related to QEMU itself, but I want to give it a
> > try.
> > I am running a tiny OS on QEMU and debugging it with gdbstub.
work. This seems to be a bug
or missing feature in GDB remote protocol. [1]
Is there a way to do what I'm trying to do? Thanks!
Regards,
chenwj
[1] http://sourceware.org/bugzilla/show_bug.cgi?id=13584
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Acade
cpu(env); <---
return env;
}
Just follow qemu_init_vcpu and you'll see how vcpu thread is spawn.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.
events while I/O operations are
> running.
So, IO thread runs the event loop (I think it's main_loop_wait in main-loop.c,
right?), and it leave blocking I/O system calls to posix-aio-compat.c worker
threads? Is that correct?
Thanks!
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Syst
ardless current QEMU's support for multi-threaded
application, it's possible to emulate a architecture with stronger memory
model on a weaker one?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-
indentation cleanup.
Signed-off-by: Chen Wei-Ren (陳韋任)
---
v1 -> v2:
Didn't notice tab in previous patch, please use this patch instead.
Sorry about that.
cpu-exec.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index a9fa608..2c2d24
indentation cleanup.
Signed-off-by: Chen Wei-Ren (陳韋任)
---
cpu-exec.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index a9fa608..f7f19f5 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -1,5 +1,5 @@
/*
- * i386 emulator main execution loop
e. Maybe you can try libcpu [1] instead?
Regards,
chenwj
[1] http://www.libcpu.org/wiki/Main_Page
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj
;
>
> Device simulation is somehow easy to comprehend. As for kernel boot, is
> there any detailed document? I need some to make it clearer.
I guess not. You might need to read the source code first then ask question
here. :)
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab,
. If the tb of process
B is existed, QEMU refill the virtual pc hash table. Otherwise, it does
the translation.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj
you mean if there is another thread calls cpu_loop_exit when TCG is
doing the translation?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj
for(; curr_cpu != NULL; curr_cpu = curr_cpu->next_cpu) {
>...
>}
Seems this is a proper way to iterate all virtual cpus.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886
;re talking about [1], maybe you can seek for help on their mailing list
too.
[1] http://sourceforge.net/p/coremu/home/Home/
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #16
places, each of which
> suggests something faulty has happened. my guess is that it will get call
> when exceptions have occurred in the code cache. Am I right ?
Not exactly. `grep -r cpu_resume_from_signal` shows places using
cpu_resume_from_signal. Not all of them means something f
On Fri, Jan 20, 2012 at 08:54:12AM -0500, Xin Tong wrote:
> On Fri, Jan 20, 2012 at 3:23 AM, 陳韋任 wrote:
> >> 1. The control of gCR3 and hCR3 needs kernel access. While they can
> >> be set with a device module as what is done in kvm. Trapping into the
> >> kernel ev
es is writing some data (which will be
executed
as instruction latter on) into the memory. In this case, icache/dcache should be
sync'ed.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj
[New Thread 0x7ffed2013700 (LWP 29500)]
> >>
> >> what spawns these threads and what do these threads do ?
> >
> >
> > The block layer's thread pool.
Qemu 1.0 enable IO thread by default, I think that's why you can see there are
two threads. You can ch
_cache is sane or not. If something goes wrong, it
turns to call tb_find_slow to use physical pc to do a slow search. The size
should not be the reason for having 2 hash tables.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiw
On Fri, Jan 20, 2012 at 09:09:46AM +, Peter Maydell wrote:
> On 20 January 2012 06:12, 陳韋任 wrote:
> > Out of curiosity. What's ARM memory model? From the Wikipedia [1], it seems
> > ARMv7 has the same memory model as IA64.
>
> The ARM memory model is the s
u-devel/2011-09/msg03643.html
HTH,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj
> In cpu_exec() env is a local variable. In do_interrupt() it is the global
> variable (held in a specific register via "asm(AREG0)"). The two aren't
> necessarily the same value, hence the fiddling about.
Do you mean we sync env with envl at this point?
Regards,
chenw
ve implementation? And as a general emulator, QEMU
shouldn't implement any architecture-specific memory model, right? What comes
into my mind is QEMU only need to follow guest memory operations when translates
guest binary to TCG ops. When translate TCG ops to host binary, it also has to
be caref
gt; the from the CPUstates, call to helpers for exits from the code cache,
> we need to change the paging mechanism back to non-nested. can this be
> done ? how expensive will this be ?
Why the memeory references done by the host will be broken?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Co
model as IA64.
Regards,
chenwj
[1] http://en.wikipedia.org/wiki/Memory_ordering
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj
it's O.K., I'll send a patch to correct this comment. Any comment?
Thanks.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj
On Wed, Jan 18, 2012 at 07:50:19PM +, Peter Maydell wrote:
> On 18 January 2012 19:43, James Greensky wrote:
> > On Tue, Jan 17, 2012 at 7:03 PM, 陳韋任 wrote:
> >> I think those numbers (0, 1, and 2) means tb_add_jump 2nd parameter here,
> >> so
> >> it
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