On Thu, Dec 12, 2024 at 11:26:28AM +0800, Binbin Wu wrote:
> Date: Thu, 12 Dec 2024 11:26:28 +0800
> From: Binbin Wu
> Subject: [PATCH] i386/kvm: Set return value after handling
> KVM_EXIT_HYPERCALL
> X-Mailer: git-send-email 2.46.0
>
> Userspace should set the ret field of hypercall after handl
Hi Peter, Richard,
On 12/6/24 12:21, Cornelia Huck wrote:
> A respin/update on the aarch64 KVM cpu models. Also available at
> gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
>
> Find Eric's original cover letter below, so that I do not need to
> repeat myself on the aspects that have not changed since
On Thu, Dec 12, 2024 at 3:30 AM Wafer wrote:
>
>
>
> > -Original Message-
> > From: Eugenio Perez Martin
> > Sent: 2024年12月11日 20:45
> > To: Wafer
> > Cc: m...@redhat.com; jasow...@redhat.com; qemu-devel@nongnu.org;
> > Angus Chen
> > Subject: Re: [PATCH v2] hw/virtio: Fix check availab
On 12/12/2024 3:09 PM, Xiaoyao Li wrote:
On 12/12/2024 1:18 PM, Binbin Wu wrote:
On 12/12/2024 11:44 AM, Xiaoyao Li wrote:
On 12/12/2024 11:26 AM, Binbin Wu wrote:
Userspace should set the ret field of hypercall after handling
KVM_EXIT_HYPERCALL. Otherwise, a stale value could be retur
On 11/12/2024 18.26, Daniel P. Berrangé wrote:
The 'which' helper is simpler and sufficient for test needs.
... and it does not depend on the external "which" program that might not be
installed on all host systems, so this is much better indeed!
Signed-off-by: Daniel P. Berrangé
---
tes
On 12/12/2024 1:18 PM, Binbin Wu wrote:
On 12/12/2024 11:44 AM, Xiaoyao Li wrote:
On 12/12/2024 11:26 AM, Binbin Wu wrote:
Userspace should set the ret field of hypercall after handling
KVM_EXIT_HYPERCALL. Otherwise, a stale value could be returned to KVM.
Fixes: 47e76d03b15 ("i386/kvm: Ad
On 11/12/2024 18.26, Daniel P. Berrangé wrote:
Reduce repeated boilerplate with some helper decorators:
@skipIfNotPlatform("x86_64", "aarch64")
=> Skip unless the build host platform matches
@skipIfMissingCommands("mkisofs", "losetup")
=> Skips unless all listed commands are found i
On 11/12/2024 18.26, Daniel P. Berrangé wrote:
Platforms we target have new enough tesseract that it suffices to merely
check if the binary exists.
Signed-off-by: Daniel P. Berrangé
---
tests/functional/qemu_test/tesseract.py | 12 +---
tests/functional/test_m68k_nextcube.py | 8 ++
On 2024/12/12 7:54, Peter Xu wrote:
On Wed, Dec 11, 2024 at 06:35:57PM +0900, Tomoyuki HIROSE wrote:
Sorry for late reply.
On 2024/12/07 1:42, Peter Xu wrote:
On Fri, Dec 06, 2024 at 05:31:33PM +0900, Tomoyuki HIROSE wrote:
In this email, I explain what this patch set will resolve and an
over
On 12/12/2024 11:44 AM, Xiaoyao Li wrote:
On 12/12/2024 11:26 AM, Binbin Wu wrote:
Userspace should set the ret field of hypercall after handling
KVM_EXIT_HYPERCALL. Otherwise, a stale value could be returned to KVM.
Fixes: 47e76d03b15 ("i386/kvm: Add KVM_EXIT_HYPERCALL handling for
KVM_H
On Thu, Dec 12, 2024 at 11:26:28AM +0800, Binbin Wu wrote:
> Userspace should set the ret field of hypercall after handling
> KVM_EXIT_HYPERCALL. Otherwise, a stale value could be returned to KVM.
>
> Fixes: 47e76d03b15 ("i386/kvm: Add KVM_EXIT_HYPERCALL handling for
> KVM_HC_MAP_GPA_RANGE")
> Re
On 12/11/2024 10:54 AM, Zhao Liu wrote:
On Thu, Dec 05, 2024 at 09:57:13AM -0500, Xiaoyao Li wrote:
Date: Thu, 5 Dec 2024 09:57:13 -0500
From: Xiaoyao Li
Subject: [RFC PATCH 1/4] i386/topology: Update the comment of
x86_apicid_from_topo_ids()
X-Mailer: git-send-email 2.34.1
Update the commen
On 12/12/2024 11:26 AM, Binbin Wu wrote:
Userspace should set the ret field of hypercall after handling
KVM_EXIT_HYPERCALL. Otherwise, a stale value could be returned to KVM.
Fixes: 47e76d03b15 ("i386/kvm: Add KVM_EXIT_HYPERCALL handling for
KVM_HC_MAP_GPA_RANGE")
Reported-by: Farrah Chen
Sig
On 12/11/2024 10:50 AM, Zhao Liu wrote:
On Tue, Dec 10, 2024 at 05:43:38PM +0100, Igor Mammedov wrote:
Date: Tue, 10 Dec 2024 17:43:38 +0100
From: Igor Mammedov
Subject: Re: [RFC PATCH 3/4] i386: Track cores_per_module in CPUX86State
X-Mailer: Claws Mail 4.3.0 (GTK 3.24.43; x86_64-redhat-linux-
On 12/11/2024 12:43 AM, Igor Mammedov wrote:
On Thu, 5 Dec 2024 09:57:15 -0500
Xiaoyao Li wrote:
x86 is the only user of CPUState::nr_cores.
Define cores_per_module in CPUX86State, which can serve as the
substitute of CPUState::nr_cores. After x86 switches to use
CPUX86State::cores_per_modul
Userspace should set the ret field of hypercall after handling
KVM_EXIT_HYPERCALL. Otherwise, a stale value could be returned to KVM.
Fixes: 47e76d03b15 ("i386/kvm: Add KVM_EXIT_HYPERCALL handling for
KVM_HC_MAP_GPA_RANGE")
Reported-by: Farrah Chen
Signed-off-by: Binbin Wu
Tested-by: Farrah Ch
On 12/11/2024 12:35 AM, Igor Mammedov wrote:
On Thu, 5 Dec 2024 22:38:41 +0100
Philippe Mathieu-Daudé wrote:
Hi Xiaoyao,
On 5/12/24 15:57, Xiaoyao Li wrote:
There are duplicated code to setup the value of MSR_CORE_THREAD_COUNT.
Extract a common function for it.
Signed-off-by: Xiaoyao Li
--
Like LSX feature, add type OnOffAuto for LASX feature setting.
Signed-off-by: Bibo Mao
---
target/loongarch/cpu.c | 44 +++
target/loongarch/cpu.h | 2 ++
target/loongarch/kvm/kvm.c | 53 ++
3 files changed, 83 insertions(+
Like LBT feature, add type OnOffAuto for LSX and LASX feature setting.
Also add feature detection with new VM ioctl command, fallback to old
method if it is not supported.
Bibo Mao (2):
target/loongarch: Use auto method with LSX feature
target/loongarch: Use auto method with LASX feature
tar
Like LBT feature, add type OnOffAuto for LSX feature setting. Also
add LSX feature detection with new VM ioctl command, fallback to old
method if it is not supported.
Signed-off-by: Bibo Mao
---
target/loongarch/cpu.c | 38 +++
target/loongarch/cpu.h | 2 ++
targ
> -Original Message-
> From: Eugenio Perez Martin
> Sent: 2024年12月11日 20:45
> To: Wafer
> Cc: m...@redhat.com; jasow...@redhat.com; qemu-devel@nongnu.org;
> Angus Chen
> Subject: Re: [PATCH v2] hw/virtio: Fix check available index on virtio loading
>
> External Mail: This email origin
Hello:
This patch was applied to riscv/linux.git (fixes)
by Greg Kroah-Hartman :
On Tue, 12 Nov 2024 09:35:20 +0100 you wrote:
> After commit 0edb555a65d1 ("platform: Make platform_driver::remove()
> return void") .remove() is (again) the right callback to implement for
> platform drivers.
>
> C
On 12/11/24 17:03, Philippe Mathieu-Daudé wrote:
Some files indirectly get "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to remove
the former from the latter, otherwise we get:
hw/ppc/virtex_ml507.c:123:19: error: call to undeclared function 'tswap32';
ISO
On 12/11/24 17:37, Philippe Mathieu-Daudé wrote:
Replace first_cpu->as by address_space_memory.
Philippe Mathieu-Daudé (2):
system/qtest: Remove uses of 'first_cpu'
qtest/fuzz: Remove uses of 'first_cpu'
system/qtest.c| 53 ---
tests/qtes
On 12/11/24 17:08, Philippe Mathieu-Daudé wrote:
On 12/12/24 00:03, Philippe Mathieu-Daudé wrote:
In preparation of heterogeneous emulation where cores with
different endianness can run concurrently, we need to remove
the tswap() calls -- which use a fixed per-binary endianness.
Get the endiann
On 12/11/24 17:03, Philippe Mathieu-Daudé wrote:
Some files indirectly get "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to remove
the former from the latter, otherwise we get:
hw/xtensa/bootparam.h:40:16: error: call to undeclared function 'tswap16';
ISO C
On 12/11/24 17:03, Philippe Mathieu-Daudé wrote:
Nothing in "exec/cpu-all.h" requires "exec/tswap.h" declarations.
Remove it to reduce headers preprocessing and poisonned target
definitions polution.
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 de
On 12/11/24 17:03, Philippe Mathieu-Daudé wrote:
r2d.c indirectly get "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to
remove the former from the latter, otherwise we get:
hw/sh4/r2d.c:357:35: error: call to undeclared function 'tswap32'; ISO C99
and later
On 12/11/24 17:03, Philippe Mathieu-Daudé wrote:
Some files indirectly get "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to remove
the former from the latter, otherwise we get:
hw/mips/malta.c:674:22: error: call to undeclared function 'tswap32'; ISO
C99 an
On 12/11/24 17:03, Philippe Mathieu-Daudé wrote:
translator.c indirectly gets "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to remove the
former from the latter, otherwise we get:
accel/tcg/translator.c:433:15: error: call to undeclared function 'tswap16';
On 12/11/24 17:03, Philippe Mathieu-Daudé wrote:
Some files indirectly get "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to remove
the former from the latter, otherwise we get:
hw/arm/boot.c:175:19: error: call to undeclared function 'tswap32'; ISO C99
and
Hello,
On behalf of the QEMU Team, I'd like to announce the availability of
the QEMU 9.2.0 release. This release contains 1700+ commits from 209
authors.
You can grab the tarball from our download page here:
https://www.qemu.org/download/#source
The full list of changes are available at:
h
There is no vCPU within the QTest accelerator (well, they
are stubs doing nothing, see dummy_cpu_thread_fn).
Directly access the global &address_space_memory to reduce
access to the 'first_cpu' global (which is meaningless in
a heterogeneous emulation setup).
Cast the returned value to (void) to
There is no vCPU within the QTest accelerator (well, they
are stubs doing nothing, see dummy_cpu_thread_fn).
Directly access the global &address_space_memory to reduce
access to the 'first_cpu' global (which is meaningless in
a heterogeneous emulation setup).
Cast the returned value to (void) to
Replace first_cpu->as by address_space_memory.
Philippe Mathieu-Daudé (2):
system/qtest: Remove uses of 'first_cpu'
qtest/fuzz: Remove uses of 'first_cpu'
system/qtest.c| 53 ---
tests/qtest/fuzz/generic_fuzz.c | 3 +-
tests/qtest/fuzz/qtest
Some files indirectly get "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to remove
the former from the latter, otherwise we get:
hw/ppc/virtex_ml507.c:123:19: error: call to undeclared function 'tswap32';
ISO C99 and later do not support implicit function decla
When running Clang static analyzer on macOS I'm getting:
include/qemu/osdep.h:634:8: error: redefinition of 'iovec'
634 | struct iovec {
|^
/Library/Developer/CommandLineTools/SDKs/MacOSX.sdk/usr/include/sys/_types/_iovec_t.h:31:8:
note: previous definition is here
3
In preparation of heterogeneous emulation where cores with
different endianness can run concurrently, we need to remove
the tswap() calls -- which use a fixed per-binary endianness.
Get the endianness of the CPU accessed using the libisa
xtensa_isa_is_big_endian() call and replace the tswap() call
Nothing in "exec/cpu-all.h" requires "exec/tswap.h" declarations.
Remove it to reduce headers preprocessing and poisonned target
definitions polution.
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/incl
Some files indirectly get "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to remove
the former from the latter, otherwise we get:
hw/arm/boot.c:175:19: error: call to undeclared function 'tswap32'; ISO C99
and later do not support implicit function declarations
On 12/12/24 00:03, Philippe Mathieu-Daudé wrote:
In preparation of heterogeneous emulation where cores with
different endianness can run concurrently, we need to remove
the tswap() calls -- which use a fixed per-binary endianness.
Get the endianness of the CPU accessed using the libisa
xtensa_is
This will be extended in the future commits, let's move it out of line
right away so that it's easier to read.
Signed-off-by: Daniil Tatianin
---
system/vl.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/system/vl.c b/system/vl.c
index 03819a80ef..f0b
Currently, passing mem-lock=on to QEMU causes memory usage to grow by
huge amounts:
no memlock:
$ ./qemu-system-x86_64 -overcommit mem-lock=off
$ ps -p $(pidof ./qemu-system-x86_64) -o rss=
45652
$ ./qemu-system-x86_64 -overcommit mem-lock=off -enable-kvm
$ ps -p $(pidof ./qem
Some files indirectly get "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to remove
the former from the latter, otherwise we get:
hw/xtensa/bootparam.h:40:16: error: call to undeclared function 'tswap16';
ISO C99 and later do not support implicit function declar
Include "exec/tswap.h" where it is needed and remove it from
"exec/cpu-all.h" which is a header included very often.
Philippe Mathieu-Daudé (9):
target/xtensa: Remove tswap() calls in semihosting simcall() helper
target/mips: Remove tswap() calls in semihosting uhi_fstat_cb()
accel/tcg: Incl
Locking the memory without MCL_ONFAULT instantly prefaults any mmaped
anonymous memory with a write-fault, which introduces a lot of extra
overhead in terms of memory usage when all you want to do is to prevent
kcompactd from migrating and compacting QEMU pages. Add an option to
only lock pages laz
This will be used in the following commits to make it possible to only
lock memory on fault instead of right away.
Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Peter Xu
Signed-off-by: Daniil Tatianin
---
include/sysemu/os-posix.h | 2 +-
include/sysemu/os-win32.h | 3 ++-
migration
Replace the boolean value enable_mlock with an enum and add a helper to
decide whether we should be calling os_mlock.
This is a stepping stone towards introducing a new mlock mode, which
will be the third possible state of this enum.
Signed-off-by: Daniil Tatianin
---
hw/virtio/virtio-mem.c |
Some files indirectly get "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to remove
the former from the latter, otherwise we get:
hw/mips/malta.c:674:22: error: call to undeclared function 'tswap32'; ISO C99
and later do not support implicit function declaration
translator.c indirectly gets "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to remove the
former from the latter, otherwise we get:
accel/tcg/translator.c:433:15: error: call to undeclared function 'tswap16';
ISO C99 and later do not support implicit function d
In preparation of heterogeneous emulation where cores with
different endianness can run concurrently, we need to remove
the tswap() calls -- which use a fixed per-binary endianness.
Get the endianness of the UHI CPU accessed using
mips_env_is_bigendian() and replace the tswap() calls
by bswap() on
r2d.c indirectly get "exec/tswap.h" declarations via
"exec/cpu-all.h". Include it directly to be able to
remove the former from the latter, otherwise we get:
hw/sh4/r2d.c:357:35: error: call to undeclared function 'tswap32'; ISO C99
and later do not support implicit function declarations
[-Wim
On Wed, Dec 11, 2024 at 06:35:57PM +0900, Tomoyuki HIROSE wrote:
> Sorry for late reply.
>
> On 2024/12/07 1:42, Peter Xu wrote:
> > On Fri, Dec 06, 2024 at 05:31:33PM +0900, Tomoyuki HIROSE wrote:
> > > In this email, I explain what this patch set will resolve and an
> > > overview of this patch
On Wed, Dec 11, 2024 at 09:56:21AM +, Peter Maydell wrote:
> On Fri, 6 Dec 2024 at 16:43, Peter Xu wrote:
> > I assume it's about xhci_cap_ops then. If you agree we can also mention
> > xhci_cap_ops when dscribing it, so readers can easily reference the MR
> > attributes from the code alongsi
The documentation says that Nitro Enclaves are based on Firecracker. AWS
has never made that statement.
This patch nudges the wording to instead say it "looks like a
Firecracker microvm".
Signed-off-by: Alexander Graf
---
docs/system/i386/nitro-enclave.rst | 2 +-
1 file changed, 1 insertion(+)
On Wed, Dec 11, 2024 at 09:19:32AM +0100, Markus Armbruster wrote:
> Looked at this thread again to refresh my memory on the proposed
> singleton interface, and found I have something to add.
>
> Peter Xu writes:
>
> > On Tue, Oct 29, 2024 at 04:04:50PM +, Daniel P. Berrangé wrote:
> >> I te
On 12/10/2024 7:26 AM, Markus Armbruster wrote:
Steve Sistare writes:
Add the cpr-transfer migration mode. Usage:
qemu-system-$arch -machine aux-ram-share=on ...
start new QEMU with "-incoming -incoming "
Issue commands to old QEMU:
migrate_set_parameter mode cpr-transfer
On 12/12/24 12:52 AM, Peter Xu wrote:
On Wed, Dec 11, 2024 at 03:04:47AM +0300, Daniil Tatianin wrote:
Locking the memory without MCL_ONFAULT instantly prefaults any mmaped
anonymous memory with a write-fault, which introduces a lot of extra
overhead in terms of memory usage when all you want t
On 12/11/24 15:19, Frederic Konrad wrote:
+/*
+ * A misaligned store trap should be triggered even if the store should
+ * fail due to the reservation.
+ */
+tcg_gen_andi_tl(tmp, src1, ~((uint64_t)0) << memop_alignment_bits(mop));
The constant is incorrect for testing the lo
On Wed, Dec 11, 2024 at 03:04:47AM +0300, Daniil Tatianin wrote:
> Locking the memory without MCL_ONFAULT instantly prefaults any mmaped
> anonymous memory with a write-fault, which introduces a lot of extra
> overhead in terms of memory usage when all you want to do is to prevent
> kcompactd from
On 12/11/24 15:19, Frederic Konrad wrote:
Now there is an option to enable misaligned accesses traps, check the alignment
during load and store for the RVI instructions. Do not generate them if the
zama16b extension is there.
Signed-off-by: Frederic Konrad
---
target/riscv/insn_trans/trans_r
On Wed, Dec 11, 2024 at 03:04:46AM +0300, Daniil Tatianin wrote:
> This will be used in the following commits to make it possible to only
> lock memory on fault instead of right away.
>
> Signed-off-by: Daniil Tatianin
Reviewed-by: Peter Xu
--
Peter Xu
On Wed, Dec 11, 2024 at 05:25:10PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > Coroutines are used in many cases in block layers. It's also used in live
> > migration when on destination side, and it'll be handy to diagnose crashes
> > within a coroutine when we want to also know what ot
>From Unpriviledged ISA manual:
"For LR and SC, the Zalrsc extension requires that the address held in rs1 be
naturally aligned to the size of the operand (i.e., eight-byte aligned for
doublewords and four-byte aligned for words). If the address is not naturally
aligned, an address-misaligned exce
Now there is an option to enable misaligned accesses traps, check the alignment
during load and store for the RVI instructions. Do not generate them if the
zama16b extension is there.
Signed-off-by: Frederic Konrad
---
target/riscv/insn_trans/trans_rvi.c.inc | 7 +++
1 file changed, 7 inser
On riscv target, misaligned accesses are either authorized and implemented in
hardware, or unimplemented and generate a trap to be implemented in software.
At the moment misaligned accesses for rvi just succeed, the intention of this
new property is to let the user choose to have a trap when a mis
Hi,
I fell into some strangeness while using RISCV:
* firstly the rvi stores / loads don't seem to generate a trap when doing a
misaligned access, which is something we would like to happen. According
to the documentation an EEI may or may no guarantee misaligned loads and
stores are ha
On 12/11/24 11:26, Daniel P. Berrangé wrote:
The 'access' check implies the file exists.
Signed-off-by: Daniel P. Berrangé
---
tests/functional/qemu_test/cmd.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/functional/qemu_test/cmd.py
b/tests/functional/qemu_test
Peter Xu writes:
> Coroutines are used in many cases in block layers. It's also used in live
> migration when on destination side, and it'll be handy to diagnose crashes
> within a coroutine when we want to also know what other coroutines are
> doing.
Not sure if you've seen this message on the
On Wed, Dec 11, 2024 at 03:17:39PM -0500, Peter Xu wrote:
> Dumping coroutines don't yet work with coredumps. Let's make it work.
>
> We still kept most of the old code because they can be either more
> flexible, or prettier. Only add the fallbacks when they stop working.
>
> Currently the raw
Dumping coroutines don't yet work with coredumps. Let's make it work.
We still kept most of the old code because they can be either more
flexible, or prettier. Only add the fallbacks when they stop working.
Currently the raw unwind is pretty ugly, but it works, like this:
(gdb) qemu bt
Corouti
There're a bunch of code trying to fetch fs_base in different ways. IIUC
the simplest way instead is "$fs_base". It also has the benefit that it'll
work for both live gdb session or coredumps.
Signed-off-by: Peter Xu
---
scripts/qemugdb/coroutine.py | 23 ++-
1 file changed
Coroutines are used in many cases in block layers. It's also used in live
migration when on destination side, and it'll be handy to diagnose crashes
within a coroutine when we want to also know what other coroutines are
doing.
This series adds initial support for that, not pretty but it should sta
It's easier for either debugging plugin errors, or issue reports.
Signed-off-by: Peter Xu
---
scripts/qemu-gdb.py | 2 ++
1 file changed, 2 insertions(+)
diff --git a/scripts/qemu-gdb.py b/scripts/qemu-gdb.py
index 4d2a9f6c43..cfae94a2e9 100644
--- a/scripts/qemu-gdb.py
+++ b/scripts/qemu-gdb.p
On 11/12/2024 18.26, Daniel P. Berrangé wrote:
The 'access' check implies the file exists.
Signed-off-by: Daniel P. Berrangé
---
tests/functional/qemu_test/cmd.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/functional/qemu_test/cmd.py
b/tests/functional/qemu_te
On 11/12/2024 18.26, Daniel P. Berrangé wrote:
Identified using 'pylint --disable=all --enable=W0611'
Reviewed-by: Thomas Huth
Signed-off-by: Daniel P. Berrangé
---
tests/functional/qemu_test/asset.py | 1 -
tests/functional/qemu_test/tesseract.py | 1 -
tests/functio
On 12/9/2024 7:12 AM, Markus Armbruster wrote:
Steven Sistare writes:
On 12/5/2024 10:23 AM, Markus Armbruster wrote:
Steve Sistare writes:
Extend the -incoming option to allow an @MigrationChannel to be specified.
This allows channels other than 'main' to be described on the command
line,
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 94 +++---
target/arm/tcg/a64.decode | 10
2 files changed, 40 insertions(+), 64 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/trans
This includes ADD, SUB, ADDS, SUBS (extended register).
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 65 +++---
target/arm/tcg/a64.decode | 9 +
2 files changed, 29 insertions(+), 45 deletions(-)
diff --g
Pass fpstatus not env, like most other fp helpers.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 6 +++---
target/arm/tcg/translate-a64.c | 15 +++
target/arm/tcg/translate-vfp.c | 6 +++---
target/arm/vfp_helper.c| 12 +++
From: Zhao Liu
Replace type_register() with type_register_static() because
type_register() will be deprecated.
Signed-off-by: Zhao Liu
Signed-off-by: Paolo Bonzini
Link: https://lore.kernel.org/r/20241029085934.2799066-15-zhao1@intel.com
---
ui/console-vc.c | 2 +-
ui/dbus.c | 2 +-
legoater/qemu/ tags/pull-aspeed-20241211
>
> for you to fetch changes up to 124f4dc0d832c1bf3a4513c05a2b93bac0a5fac0:
>
> test/qtest/ast2700-smc-test: Support to test AST2700 (2024-12-11 07:25:53
> +0100)
>
>
>
On Tue, 10 Dec 2024 at 10:11, Christian Schoenebeck
wrote:
>
> The following changes since commit 1cf9bc6eba7506ab6d9de635f224259225f63466:
>
> Update version for v9.2.0-rc3 release (2024-12-03 17:56:12 +)
>
> are available in the Git repository at:
>
> https://github.com/cschoenebeck/qemu
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 94 +++---
target/arm/tcg/a64.decode | 7 +++
2 files changed, 59 insertions(+), 42 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/t
Remove handle_simd_shift_fpint_conv and disas_simd_shift_imm
as these were the last insns decoded by those functions.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 4 +
target/arm/tcg/translate-a64.c | 160 +++--
t
Remove disas_fp_int_conv and disas_data_proc_fp as these
were the last insns decoded by those functions.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 232 ++---
target/arm/tcg/a64.decode | 14 ++
2 files chang
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h | 6 +++
target/arm/tcg/gengvec.c| 58 ++
target/arm/tcg/translate-neon.c | 88 +++--
3 files changed, 81 insertions(+), 71 deletions(-)
diff
This includes PACIA, PACIZA, PACIB, PACIZB, PACDA, PACDZA, PACDB,
PACDZB, AUTIA, AUTIZA, AUTIB, AUTIZB, AUTDA, AUTDZA, AUTDB, AUTDZB.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 173 +
target/arm/tcg/a64.decode
Right now, using cargo with QEMU requires copying by hand the bindings.rs to the
source tree. Instead, we can use an include file to escape the cage of cargo's
mandated source directory structure.
By running cargo within meson's "devenv" and adding a MESON_BUILD_ROOT
environment variable, it is e
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 101 +
target/arm/tcg/a64.decode | 12
2 files changed, 53 insertions(+), 60 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm
Remove handle_fp_1src_half as these were the last insns
decoded by that function.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 117 +++--
target/arm/tcg/a64.decode | 8 +++
2 files changed, 46 insertions(+),
Similar to the existing BqlCell, introduce a custom interior mutability
primitive that resembles RefCell but accounts for QEMU's threading model.
Borrowing the RefCell requires proving that the BQL is held, and
attempting to access without the BQL is a runtime panic.
Almost all of the code was tak
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 64 +-
target/arm/tcg/a64.decode | 7
2 files changed, 39 insertions(+), 32 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/
On Wed, Dec 11, 2024 at 09:20:20AM -0800, Nicolin Chen wrote:
> On Wed, Dec 11, 2024 at 09:11:12AM -0400, Jason Gunthorpe wrote:
> > On Tue, Dec 10, 2024 at 05:28:17PM -0800, Nicolin Chen wrote:
> > > > I would ideally turn it around and provide that range information to
> > > > the kernel and tota
Remove handle_simd_intfp_conv and handle_simd_shift_intfp_conv
as these were the last insns decoded by those functions.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 3 +
target/arm/tcg/translate-a64.c | 201 ++---
Remove handle_fp_fcvt and disas_fp_1src as these were
the last insns decoded by those functions.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 172 +
target/arm/tcg/a64.decode | 7 ++
2 files changed, 74 i
Add gvec interfaces for CNT and RBIT operations.
Use ctpop8 for CNT and revbit+bswap for RBIT.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 4 ++--
target/arm/tcg/translate.h | 4
target/arm/tcg/gengvec.c| 16 +
Remove handle_fp_1src_single and handle_fp_1src_double as
these were the last insns decoded by those functions.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 146 -
target/arm/tcg/a64.decode | 5 ++
2 file
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 35 --
target/arm/tcg/a64.decode | 6 ++
2 files changed, 31 insertions(+), 10 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/tra
Remove handle_2misc_reciprocal as these were the last
insns decoded by that function.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 139 ++---
target/arm/tcg/a64.decode | 3 +
2 files changed, 8 insertions(+),
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