On 12/11/24 15:19, Frederic Konrad wrote:
+ /*
+ * A misaligned store trap should be triggered even if the store should
+ * fail due to the reservation.
+ */
+ tcg_gen_andi_tl(tmp, src1, ~((uint64_t)0) << memop_alignment_bits(mop));
The constant is incorrect for testing the low bits.
+ tcg_gen_brcond_tl(TCG_COND_EQ, tmp, src1, l3);
Best to make the fallthrough path be the common case, as we will optimize across the
extended basic block.
Use test-style comparison:
tcg_gen_brcondi_tl(TCG_COND_TSTNE, src1, memop_size(mop) - 1, l_misalign);
r~
