Re: [PATCH 3/4] acpi: fix OEM ID/OEM Table ID padding

On Mon, 31 Jan 2022 19:51:24 +0530 (IST) Ani Sinha wrote: > On Mon, 31 Jan 2022, Igor Mammedov wrote: > > > On Mon, 31 Jan 2022 18:58:57 +0530 (IST) > > Ani Sinha wrote: > > > > > On Mon, 31 Jan 2022, Igor Mammedov wrote: > > > > > > > On Mon, 31 Jan 2022 11:47:00 +0530 > > > > Ani Sinha w

Re: "make check-acceptance" takes way too long

Hi, > I'm not sure you can recycle something from it, but my (ugly) approach > to make this fast (for a different purpose -- I'm using qemu to run > tests in guests, not testing qemu) is to build an initramfs by copying > the host binaries I need (a shell, ip, jq) and recursively sourcing > libr

Re: [PULL 53/61] target/riscv: Split out the vill from vtype

On 2022/2/1 10:12, Alistair Francis wrote: On Sat, Jan 29, 2022 at 2:10 AM Peter Maydell wrote: On Fri, 21 Jan 2022 at 09:42, Alistair Francis wrote: From: LIU Zhiwei We need not specially process vtype when XLEN changes. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewe

Re: "make check-acceptance" takes way too long

Hi, On Tue, 25 Jan 2022 10:20:11 +0100 Gerd Hoffmann wrote: > Hi, > > > IMHO the ideal scenario would be for us to have a kernel, initrd > > containing just busybox tools for the key arch targets we care > > about. Those could be used with direct kernel boot or stuffed > > into a disk iamge.

Re: [PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface.

On 31/01/2022 10.42, Yoshinori Sato wrote: SCI does not have a fifo, it is necessary to send and receive at a bit rate speed. But, qemu's chardev backend does not have a buffer, so it sends received data continuously. By buffering the received data with the FIFO, continuous received data ca

[PATCH v8 5/5] multifd: Implement zero copy write in multifd migration (multifd-zero-copy)

Implement zero copy send on nocomp_send_write(), by making use of QIOChannel writev + flags & flush interface. Change multifd_send_sync_main() so flush_zero_copy() can be called after each iteration in order to make sure all dirty pages are sent before a new iteration is started. It will also flus

[PATCH v8 3/5] migration: Add zero-copy-send parameter for QMP/HMP for Linux

Add property that allows zero-copy migration of memory pages on the sending side, and also includes a helper function migrate_use_zero_copy_send() to check if it's enabled. No code is introduced to actually do the migration, but it allow future implementations to enable/disable this feature. On n

[PATCH] target/riscv: Fix vill field write in vtype

The guest should be able to set the vill bit as part of vsetvl. Currently we may set env->vill to 1 in the vsetvl helper, but there is nowhere that we set it to 0, so once it transitions to 1 it's stuck there until the system is reset. Signed-off-by: LIU Zhiwei --- target/riscv/vector_helper.c

[PATCH v8 1/5] QIOChannel: Add flags on io_writev and introduce io_flush callback

Add flags to io_writev and introduce io_flush as optional callback to QIOChannelClass, allowing the implementation of zero copy writes by subclasses. How to use them: - Write data using qio_channel_writev*(...,QIO_CHANNEL_WRITE_FLAG_ZERO_COPY), - Wait write completion with qio_channel_flush(). No

[PATCH v8 2/5] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX

For CONFIG_LINUX, implement the new zero copy flag and the optional callback io_flush on QIOChannelSocket, but enables it only when MSG_ZEROCOPY feature is available in the host kernel, which is checked on qio_channel_socket_connect_sync() qio_channel_socket_flush() was implemented by counting how

[PATCH v8 4/5] migration: Add migrate_use_tls() helper

A lot of places check parameters.tls_creds in order to evaluate if TLS is in use, and sometimes call migrate_get_current() just for that test. Add new helper function migrate_use_tls() in order to simplify testing for TLS usage. Signed-off-by: Leonardo Bras Reviewed-by: Juan Quintela Reviewed-b

[PATCH v8 0/5] MSG_ZEROCOPY + multifd

This patch series intends to enable MSG_ZEROCOPY in QIOChannel, and make use of it for multifd migration performance improvement, by reducing cpu usage. Patch #1 creates new callbacks for QIOChannel, allowing the implementation of zero copy writing. Patch #2 implements io_writev flags and io_flus

Re: [PATCH v7 3/5] target/riscv: add support for svnapot extension

On Fri, Jan 28, 2022 at 6:57 PM Weiwei Li wrote: > > - add PTE_N bit > - add PTE_N bit check for inner PTE > - update address translation to support 64KiB continuous region (napot_bits = > 4) > > Signed-off-by: Weiwei Li > Signed-off-by: Junqiang Wang > Reviewed-by: Anup Patel > --- > target/

Re: [RFC PATCH] spapr: Add SPAPR_CAP_AIL_MODES for supported AIL modes for H_SET_MODE hcall

Excerpts from Daniel Henrique Barboza's message of February 1, 2022 5:10 am: > > > On 1/29/22 03:50, Nicholas Piggin wrote: >> The behaviour of the Address Translation Mode on Interrupt resource is >> not consistently supported by all CPU versions or all KVM versions. In >> particular KVM HV onl

Re: [RFC PATCH] spapr: Add SPAPR_CAP_AIL_MODES for supported AIL modes for H_SET_MODE hcall

Excerpts from Fabiano Rosas's message of February 1, 2022 1:51 am: > Nicholas Piggin writes: > >> The behaviour of the Address Translation Mode on Interrupt resource is >> not consistently supported by all CPU versions or all KVM versions. In >> particular KVM HV only supports mode 0 on POWER7 p

Re: "make check-acceptance" takes way too long

On Fri, Jan 21, 2022 at 10:22 AM Daniel P. Berrangé wrote: > > On Fri, Jan 21, 2022 at 12:23:23PM +, Alex Bennée wrote: > > > > Peter Maydell writes: > > > > > On Fri, 21 Jan 2022 at 10:50, Markus Armbruster wrote: > > >> No objection, but it's no replacement for looking into why these tests

Re: [PATCH 0/2] RISC-V: Correctly generate store/amo faults

On Wed, Jan 26, 2022 at 10:09 AM Richard Henderson wrote: > > On 1/24/22 4:17 PM, LIU Zhiwei wrote: > > > > On 2022/1/24 上午8:59, Alistair Francis wrote: > >> From: Alistair Francis > >> > >> This series adds a MO_ op to specify that a load instruction should > >> produce a store fault. This is us

Re: [PATCH v7 2/5] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX

Hello Peter, Re-reading everything before submitting the next version. I think I finally got that you are suggesting to just add a break at the end of the case, after the if :) Sorry I misunderstand that before, Best regards, Leo On Thu, Jan 13, 2022 at 3:48 AM Peter Xu wrote: > > On Thu, Jan

[PATCH v4 3/4] python: upgrade mypy to 0.780

We need a slightly newer version of mypy in order to use some features of the asyncio server functions in the next commit. (Note: pipenv is not really suited to upgrading individual packages; I need to replace this tool with something better for the task. For now, the miscellaneous updates not rel

[PATCH v4 1/4] python/aqmp: Fix negotiation with pre-"oob" QEMU

QEMU versions prior to the "oob" capability *also* can't accept the "enable" keyword argument at all. Fix the handshake process with older QEMU versions. Signed-off-by: John Snow Reviewed-by: Hanna Reitz --- python/qemu/aqmp/qmp_client.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-

[PATCH v4 0/4] Python: Improvements for iotest 040,041

GitLab: https://gitlab.com/jsnow/qemu/-/commits/python-aqmp-fixes CI: https://gitlab.com/jsnow/qemu/-/pipelines/455146881 Fixes and improvements all relating to "iotest 040,041, intermittent failure in netbsd VM" https://lists.gnu.org/archive/html/qemu-devel/2022-01/msg01975.html See each patch f

[PATCH v4 4/4] python/aqmp: add socket bind step to legacy.py

The synchronous QMP library would bind to the server address during __init__(). The new library delays this to the accept() call, because binding occurs inside of the call to start_[unix_]server(), which is an async method -- so it cannot happen during __init__ anymore. Python 3.7+ adds the abilit

[PATCH v4 2/4] python/machine: raise VMLaunchFailure exception from launch()

This allows us to pack in some extra information about the failure, which guarantees that if the caller did not *intentionally* cause a failure (by capturing this Exception), some pretty good clues will be printed at the bottom of the traceback information. This will help make failures in the even

Re: [PATCH v5 17/18] vfio-user: register handlers to facilitate migration

> On Jan 28, 2022, at 3:29 AM, Stefan Hajnoczi wrote: > > On Thu, Jan 27, 2022 at 05:04:26PM +, Jag Raman wrote: >> >> >>> On Jan 25, 2022, at 10:48 AM, Stefan Hajnoczi wrote: >>> >>> On Wed, Jan 19, 2022 at 04:42:06PM -0500, Jagannathan Raman wrote: + * The client subsequetly

Re: [PATCH v7 2/5] target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTE

On Fri, Jan 28, 2022 at 7:06 PM Weiwei Li wrote: > > For non-leaf PTEs, the D, A, and U bits are reserved for future standard use. > > Signed-off-by: Weiwei Li > Signed-off-by: Junqiang Wang > Reviewed-by: Anup Patel Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu_helper.c

Re: [PATCH v7 1/5] target/riscv: Ignore reserved bits in PTE for RV64

On Fri, Jan 28, 2022 at 7:11 PM Weiwei Li wrote: > > From: Guo Ren > > Highest bits of PTE has been used for svpbmt, ref: [1], [2], so we > need to ignore them. They cannot be a part of ppn. > > 1: The RISC-V Instruction Set Manual, Volume II: Privileged Architecture >4.4 Sv39: Page-Based 39-

Re: [PATCH v5 6/7] target/riscv: Add XVentanaCondOps custom extension

On Mon, Jan 31, 2022 at 9:23 PM Philipp Tomsich wrote: > > This adds the decoder and translation for the XVentanaCondOps custom > extension (vendor-defined by Ventana Micro Systems), which is > documented at > https://github.com/ventanamicro/ventana-custom-extensions/releases/download/v1.0.0/vent

Re: [PATCH v5 5/7] target/riscv: iterate over a table of decoders

On Mon, Jan 31, 2022 at 9:32 PM Philipp Tomsich wrote: > > To split up the decoder into multiple functions (both to support > vendor-specific opcodes in separate files and to simplify maintenance > of orthogonal extensions), this changes decode_op to iterate over a > table of decoders predicated o

Re: [PATCH v5 7/7] target/riscv: add a MAINTAINERS entry for XVentanaCondOps

On Mon, Jan 31, 2022 at 9:24 PM Philipp Tomsich wrote: > > The XVentanaCondOps extension is supported by VRULL on behalf of the > Ventana Micro. Add myself as a point-of-contact. > > Signed-off-by: Philipp Tomsich > Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Alistair > > -

Re: [PATCH v5 4/7] target/riscv: access cfg structure through DisasContext

On Mon, Jan 31, 2022 at 9:05 PM Philipp Tomsich wrote: > > The Zb[abcs] support code still uses the RISCV_CPU macros to access > the configuration information (i.e., check whether an extension is > available/enabled). Now that we provide this information directly > from DisasContext, we can acces

Re: [PATCH v5 3/7] target/riscv: access configuration through cfg_ptr in DisasContext

On Mon, Jan 31, 2022 at 9:10 PM Philipp Tomsich wrote: > > The implementation in trans_{rvi,rvv,rvzfh}.c.inc accesses the shallow > copies (in DisasContext) of some of the elements available in the > RISCVCPUConfig structure. This commit redirects accesses to use the > cfg_ptr copied into DisasCo

Re: [PATCH v5 2/7] target/riscv: riscv_tr_init_disas_context: copy pointer-to-cfg into cfg_ptr

On Mon, Jan 31, 2022 at 9:03 PM Philipp Tomsich wrote: > > As the number of extensions is growing, copying them individiually > into the DisasContext will scale less and less... instead we populate > a pointer to the RISCVCPUConfig structure in the DisasContext. > > This adds an extra indirection

Re: [PATCH v5 1/7] target/riscv: refactor (anonymous struct) RISCVCPU.cfg into 'struct RISCVCPUConfig'

On Mon, Jan 31, 2022 at 9:03 PM Philipp Tomsich wrote: > > Signed-off-by: Philipp Tomsich > Suggested-by: Richard Henderson > Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Alistair > > --- > > (no changes since v4) > > Changes in v4: > - use a typedef into 'RISCVCPUConfig' (i

Re: [RFC PATCH] hw/intc: Make RISC-V ACLINT mtime MMIO register writable

On Wed, Jan 26, 2022 at 7:55 PM wrote: > > From: Frank Chang > > RISC-V privilege spec defines that mtime is exposed as a memory-mapped > machine-mode read-write register. However, as QEMU uses host monotonic > timer as timer source, this makes mtime to be read-only in RISC-V > ACLINT. > > This p

Re: [PULL 53/61] target/riscv: Split out the vill from vtype

On Sat, Jan 29, 2022 at 2:10 AM Peter Maydell wrote: > > On Fri, 21 Jan 2022 at 09:42, Alistair Francis > wrote: > > > > From: LIU Zhiwei > > > > We need not specially process vtype when XLEN changes. > > > > Signed-off-by: LIU Zhiwei > > Reviewed-by: Richard Henderson > > Reviewed-by: Alistai

Re: [PATCH] MAINTAINERS: Adding myself as a reviewer of some components

On 31/1/22 13:20, Ani Sinha wrote: Added myself as a reviewer of vmgenid, unimplemented device and empty slot. Signed-off-by: Ani Sinha --- MAINTAINERS | 3 +++ 1 file changed, 3 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index b43344fa98..fed31a5eb5 100644 --- a/MAINTAINERS +++ b

Re: [PATCH] block.h: remove outdated comment

On 31/1/22 13:56, Emanuele Giuseppe Esposito wrote: The comment "disk I/O throttling" doesn't make any sense at all any more. It was added in commit 0563e191516 to describe bdrv_io_limits_enable()/disable(), which were removed in commit 97148076, so the comment is just a forgotten leftover. Sugg

Re: [RFC PATCH 1/1] i386: Remove features from Epyc-Milan cpu

On 1/31/22 14:18, Leonardo Bras Soares Passos wrote: > On Mon, Jan 31, 2022 at 3:04 PM Daniel P. Berrangé > wrote: >> On Mon, Jan 31, 2022 at 02:56:38PM -0300, Leonardo Bras Soares Passos wrote: >>> Hello Daniel, >>> >>> On Mon, Jan 31, 2022 at 6:08 AM Daniel P. Berrangé >>> wrote: CC'in

Re: [PATCH v2] Use long endian options for ppc64

On 31/1/22 10:17, Miroslav Rezanina wrote: GCC options pairs -mlittle/-mlittle-endian and -mbig/-mbig-endian are equivalent on ppc64 architecture. However, Clang supports only long version of the options. Use longer form in configure to properly support both GCC and Clang compiler. In addition,

Re: [PATCH v2 3/6] hppa: Add support for an emulated TOC/NMI button.

On 31/1/22 22:35, Helge Deller wrote: Almost all PA-RISC machines have either a button that is labeled with 'TOC' or a BMC/GSP function to trigger a TOC. TOC is a non-maskable interrupt that is sent to the processor. This can be used for diagnostic purposes like obtaining a stack trace/register

Re: [PATCH v3 2/3] memory: Make memory_region_is_mapped() succeed when mapped via an alias

On 31/1/22 20:20, Niek Linnenbank wrote: Hi Philippe, On Mon, Jan 31, 2022 at 12:29 AM Philippe Mathieu-Daudé > wrote: Hi Niek! (+Mark FYI) On 30/1/22 23:50, Niek Linnenbank wrote: > Hi David, > > While I realize my response is quite late, I

Re: [RFC PATCH 2/2] hw/i386/sgx: Attach SGX-EPC to its memory backend

On 23/1/22 13:52, Yang Zhong wrote: On Mon, Jan 17, 2022 at 12:48:10PM +0100, Paolo Bonzini wrote: On 1/17/22 00:53, Philippe Mathieu-Daudé via wrote: We have one SGX-EPC address/size/node per memory backend, make it child of the backend in the QOM composition tree. Cc: Yang Zhong Signed-off-

[PATCH v3 2/2] hw/i386/sgx: Attach SGX-EPC objects to machine

Previously SGX-EPC objects were exposed in the QOM tree at a path /machine/unattached/device[nn] where the 'nn' varies depending on what devices were already created. With this change the SGX-EPC objects are now at /machine/sgx-epc[nn] where the 'nn' of the first SGX-EPC object is always z

[PATCH v3 1/2] hw/i386: Attach CPUs to machine

Previously CPUs were exposed in the QOM tree at a path /machine/unattached/device[nn] where the 'nn' of the first CPU is usually zero, but can vary depending on what devices were already created. With this change the CPUs are now at /machine/cpu[nn] where the 'nn' of the first CPU is alway

[PATCH v3 0/2] hw/i386: QOM-attach CPUs/SGX-EPC objects to their parents

Trying to fix the issue reported here: https://lists.nongnu.org/archive/html/qemu-devel/2021-11/msg05670.html First attach the CPUs and SGX-EPC objects to the machine. Since v2: - added missing QOM property auto-enum: [*] (Yang Zhong) Since v1: - addressed Paolo & Daniel review feedbacks Philip

Re: [PATCH v1 5/6] hw/misc: Add a model of the Xilinx ZynqMP APU Control

On 31/1/22 13:17, Edgar E. Iglesias wrote: On Mon, Jan 31, 2022 at 12:35:54AM +0100, Philippe Mathieu-Daudé wrote: On 31/1/22 00:12, Edgar E. Iglesias wrote: From: "Edgar E. Iglesias" Add a model of the Xilinx ZynqMP APU Control. Signed-off-by: Edgar E. Iglesias --- include/hw/misc/xlnx-

Re: [PATCH] qapi/block: Cosmetic change in BlockExportType schema

On 31/1/22 22:37, Eric Blake wrote: On Sun, Jan 30, 2022 at 07:50:41PM +0100, Philippe Mathieu-Daudé wrote: On 28/1/22 21:54, Eric Blake wrote: On Wed, Jan 19, 2022 at 01:14:39PM +0100, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daude 'git am' used this line to insert the authorsh

Re: [PATCH v3 4/4] python/aqmp: add socket bind step to legacy.py

On Thu, Jan 27, 2022 at 10:50 AM Hanna Reitz wrote: > > On 24.01.22 19:06, John Snow wrote: > > The synchronous QMP library would bind to the server address during > > __init__(). The new library delays this to the accept() call, because > > binding occurs inside of the call to start_[unix_]server

Re: [PATCH v3 2/4] python/machine: raise VMLaunchFailure exception from launch()

On Thu, Jan 27, 2022 at 9:22 AM Hanna Reitz wrote: > > On 24.01.22 19:06, John Snow wrote: > > This allows us to pack in some extra information about the failure, > > which guarantees that if the caller did not *intentionally* cause a > > failure (by capturing this Exception), some pretty good clu

[PATCH v4 1/2] hw/sensor: Add SB-TSI Temperature Sensor Interface

From: Hao Wu SB Temperature Sensor Interface (SB-TSI) is an SMBus compatible interface that reports AMD SoC's Ttcl (normalized temperature), and resembles a typical 8-pin remote temperature sensor's I2C interface to BMC. This patch implements a basic AMD SB-TSI sensor that is compatible with the

[PATCH v4 0/2] hw/sensor: Add SB-TSI Temperature Sensor Interface

v4: * Added missing signature block from submitter. v3: * typofix where I accidentally embedded 'wq' into a string * moved the type sbtsi definition back into the source file * renamed the qtest file to use hyphens only v2: * Split the commit into a separate patch for the qtest * Moved the

[PATCH v4 2/2] tests: add qtest for hw/sensor/sbtsi

From: Hao Wu Reviewed-by: Doug Evans Signed-off-by: Hao Wu Signed-off-by: Patrick Venture Acked-by: Thomas Huth --- tests/qtest/tmp-sbtsi-test.c | 161 +++ tests/qtest/meson.build | 1 + 2 files changed, 162 insertions(+) create mode 100644 tests/qtest

Re: [PATCH v2 10/11] 9p: darwin: Implement compatibility for mknodat

Upon further review, it looks like since 10.12 there's actually a (not-heavily-documented) function that wraps this syscall and avoids the need to call the private syscall directly: https://opensource.apple.com/source/libpthread/libpthread-218.51.1/src/pthread_cwd.c.auto.html. Chromium uses it too

Re: [PATCH v2 3/6] hppa: Add support for an emulated TOC/NMI button.

On 2/1/22 08:35, Helge Deller wrote: Almost all PA-RISC machines have either a button that is labeled with 'TOC' or a BMC/GSP function to trigger a TOC. TOC is a non-maskable interrupt that is sent to the processor. This can be used for diagnostic purposes like obtaining a stack trace/register

Re: [PATCH v2 2/6] hw/hppa: Allow up to 16 emulated CPUs

On 2/1/22 08:35, Helge Deller wrote: This brings the hppa_hardware.h file in sync with the copy in the SeaBIOS-hppa sources. In order to support up to 16 CPUs, it's required to move the HPA for MEMORY_HPA out of the address space of the 16th CPU. Signed-off-by: Helge Deller --- hw/hppa/hppa_h

[PATCH v2 3/6] hppa: Add support for an emulated TOC/NMI button.

Almost all PA-RISC machines have either a button that is labeled with 'TOC' or a BMC/GSP function to trigger a TOC. TOC is a non-maskable interrupt that is sent to the processor. This can be used for diagnostic purposes like obtaining a stack trace/register dump or to enter KDB/KGDB in Linux. Th

[PATCH v2 4/6] hw/display/artist: rewrite vram access mode handling

From: Sven Schnelle When writing this code it was assumed that register 0x118000 is the buffer access mode for color map accesses. It turned out that this is wrong. Instead register 0x118000 sets both src and dst buffer access mode at the same time. This required a larger rewrite of the code. Th

Re: [PATCH v2] qsd: Document fuse's allow-other option

On Mon, Jan 31, 2022 at 11:31:24AM +0100, Hanna Reitz wrote: > We did not add documentation to the storage daemon's man page for fuse's > allow-other option when it was introduced, so do that now. > > Fixes: 8fc54f9428b9763f800 ("export/fuse: Add allow-other option") > Signed-off-by: Hanna Reitz

[PATCH v2 2/6] hw/hppa: Allow up to 16 emulated CPUs

This brings the hppa_hardware.h file in sync with the copy in the SeaBIOS-hppa sources. In order to support up to 16 CPUs, it's required to move the HPA for MEMORY_HPA out of the address space of the 16th CPU. Signed-off-by: Helge Deller --- hw/hppa/hppa_hardware.h | 5 +++-- 1 file changed, 3

Re: [PATCH] qapi/block: Cosmetic change in BlockExportType schema

On Sun, Jan 30, 2022 at 07:50:41PM +0100, Philippe Mathieu-Daudé wrote: > On 28/1/22 21:54, Eric Blake wrote: > > On Wed, Jan 19, 2022 at 01:14:39PM +0100, Philippe Mathieu-Daudé wrote: > > > From: Philippe Mathieu-Daude 'git am' used this line to insert the authorship... > > > > > > From: Phil

[PATCH v2 0/6] Fixes and updates for hppa target

This patchset fixes some important bugs in the hppa artist graphics driver: - Fix various artist graphics misrenderings on HP-UX and Linux - Fix draw_line() function on artist graphic - Fix mouse cursor positioning and focus under HP-UX New qemu features for hppa: - Allow up to 16 emulated CPUs (i

[PATCH v2 6/6] hw/display/artist: Fix draw_line() artefacts

From: Sven Schnelle The draw_line() function left artefacts on the screen because it was using the x/y variables which were incremented in the loop before. Fix it by using the unmodified x1/x2 variables instead. Signed-off-by: Sven Schnelle Signed-off-by: Helge Deller Cc: qemu-sta...@nongnu.or

[PATCH v2 5/6] hw/display/artist: Mouse cursor fixes for HP-UX

This patch fix the behaviour and positioning of the X11 mouse cursor in HP-UX. The current code missed to subtract the offset of the CURSOR_CTRL register from the current mouse cursor position. The HP-UX graphics driver stores in this register the offset of the mouse graphics compared to the curre

Re: [RFC PATCH 1/1] i386: Remove features from Epyc-Milan cpu

On Mon, Jan 31, 2022 at 3:04 PM Daniel P. Berrangé wrote: > > On Mon, Jan 31, 2022 at 02:56:38PM -0300, Leonardo Bras Soares Passos wrote: > > Hello Daniel, > > > > On Mon, Jan 31, 2022 at 6:08 AM Daniel P. Berrangé > > wrote: > > > > > > CC'ing Babu Moger who aded the Milan CPU model. > > > >

Re: [PATCH] replay: use CF_NOIRQ for special exception-replaying TB

On 1/31/22 22:25, Pavel Dovgalyuk wrote: Commit aff0e204cb1f1c036a496c94c15f5dfafcd9b4b4 introduced CF_NOIRQ usage, but one case was forgotten. Record/replay uses one special TB which is not really executed, but used to cause a correct exception in replay mode. This patch adds CF_NOIRQ flag for s

[PULL 13/40] bsd-user/arm/target_arch_cpu.h: Correct code pointer

The code has moved in FreeBSD since the emulator was started, update the comment to reflect that change. Signed-off-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/b

[PULL 25/40] bsd-user/signal.c: Implement rewind_if_in_safe_syscall

Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- bsd-user/qemu.h | 2 ++ bsd-user/signal.c | 13 - 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index 49f01932a53

[PULL 18/40] bsd-user/signal.c: Add si_type argument to queue_signal

Mirror the linux-user practice and add a si_type argument to queue signal. This will be transported as the upper 8 bits in the si_type element of siginfo so that we know what bits of the structure are valid and so we can properly implement host_to_target_siginfo_noswap and tswap_siginfo. Adapt the

[PULL 19/40] bsd-user/host/arm/host-signal.h: Implement host_signal_*

Implement host_signal_pc, host_signal_set_pc and host_signal_write for arm. Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/host/arm/host-signal.h | 35 + 1 file changed, 35 insertions(+) create mode 100644 bsd-u

Re: [RFC 4/5] target/riscv: Add *envcfg* CSRs support

On Fri, Jan 28, 2022 at 5:50 PM angell1518 wrote: > > 在 2022/1/29 上午9:28, Atish Patra 写道: > > > > On Wed, Jan 26, 2022 at 12:37 AM Weiwei Li wrote: > >> >> 在 2022/1/21 上午4:07, Atish Patra 写道: >> > The RISC-V privileged specification v1.12 defines few execution >> > environment configuration CSRs

[PULL 17/40] bsd-user/signal.c: Implement signal_init()

Initialize the signal state for the emulator. Setup a set of sane default signal handlers, mirroring the host's signals. For fatal signals (those that exit by default), establish our own set of signal handlers. Stub out the actual signal handler we use for the moment. Signed-off-by: Stacey Son Si

[PULL 11/40] bsd-user/signal.c: implement cpu_loop_exit_sigbus

First attempt at implementing cpu_loop_exit_sigbus, mostly copied from linux-user version of this function. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- bsd-user/signal.c | 12 +--- 1 file

[PULL 34/40] bsd-user/signal.c: process_pending_signals

Process the currently queued signals. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/signal.c | 56 ++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/bsd-use

[PULL 09/40] bsd-user/signal-common.h: Move signal functions prototypes to here

Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_cpu.h| 1 + bsd-user/i386/target_arch_cpu.h | 1 + bsd-user/qemu.h | 8 bsd-user/signal-common.h | 6 ++ bsd-user/x86_64/target_arch_cpu.h | 1 + 5 files changed,

Re: [RFC PATCH 1/2] target/arm: move regime_ttbr helper

[PULL 40/40] bsd-user/freebsd/target_os_ucontext.h: Prefer env as arg name for CPUArchState args

Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/freebsd/target_os_ucontext.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bsd-user/freebsd/target_os_ucontext.h b/bsd-user/freebsd/target_os_ucontext.h index 41b28b2c150..b196b1c629f 100644 --- a

[PULL 24/40] bsd-user/signal.c: host_to_target_siginfo_noswap

Implement conversion of host to target siginfo. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/signal.c | 113 ++ 1 file changed, 113 insertions(+) diff --git a/bsd-user/si

[PULL 38/40] MAINTAINERS: Add tests/vm/*bsd to the list to get reviews on

tests/vm/*bsd (especailly tests/vm/freebsd) are adjacent to the bsd-user stuff and we're keen on keeping them working as well. Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index e4b3a4bcdf

[PULL 23/40] bsd-user: Add trace events for bsd-user

Add the bsd-user specific events and infrastructure. Only include the linux-user trace events for linux-user, not bsd-user. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- bsd-user/signal.c | 1

[PULL 07/40] bsd-user/arm/target_arch_cpu.h: Move EXCP_ATOMIC to match linux-user

Move the EXCP_ATOMIC case to match linux-user/arm/cpu_loop.c:cpu_loop ordering. Signed-off-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_cpu.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bsd-user/arm/target_

[PULL 32/40] bsd-user/signal.c: handle_pending_signal

Handle a queued signal. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/qemu.h | 7 bsd-user/signal.c | 87 +++ 2 files changed, 94 insertions(+) diff --git a/bsd-us

[PULL 33/40] bsd-user/signal.c: tswap_siginfo

Convert siginfo from targer to host. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/signal.c | 53 +++ 1 file changed, 53 insertions(+) diff --git a/bsd-user/signal.c b/bsd

[PULL 31/40] bsd-user/signal.c: setup_frame

setup_frame sets up a signalled stack frame. Associated routines to extract the pointer to the stack frame and to support alternate stacks. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/main.c | 5 +++ bsd-user/qe

[PULL 22/40] bsd-user: Add host signals to the build

Start to add the host signal functionality to the build. Signed-off-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- bsd-user/signal.c | 1 + meson.build | 1 + 2 files changed, 2 insertions(+) diff --git a/bsd-user/signal.c b/bsd-user/signal.c index ad8437a

[PULL 00/40] Bsd user arm 2022q1 patches

The following changes since commit 7a1043cef91739ff4b59812d30f1ed2850d3d34e: Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging (2022-01-28 14:04:01 +) are available in the Git repository at: g...@gitlab.com:bsdimp/qemu.git tags/bsd-user-arm-2022q1-pull

[PULL 30/40] bsd-user/signal.c: sigset manipulation routines.

target_sigemptyset: resets a set to having no bits set target_sigaddset: adds a signal to a set target_sigismember: returns true when signal is a member host_to_target_sigset_internal: convert host sigset to target host_to_target_sigset: convert host sigset to target target_to_host_sigset_interna

[PULL 16/40] bsd-user/signal.c: implement abstract target / host signal translation

Implement host_to_target_signal and target_to_host_signal. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- bsd-user/signal-common.h | 2 ++ bsd-user/signal.c| 16 2 files ch

[PULL 02/40] bsd-user: Create setup_sigframe_arch to setup sigframe context

Define setup_sigframe_arch whose job it is to setup the mcontext for the sigframe. Implement for x86 to just call mcontext. Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/freebsd/target_os_signal.h | 3 +++ bsd-user/i386/signal.c | 13 + bsd-use

[PULL 08/40] bsd-user/signal.c: implement force_sig_fault

Start to implement the force_sig_fault code. This currently just calls queue_signal(). The bsd-user fork version of that will handle this the synchronous nature of this call. Add signal-common.h to hold signal helper functions like force_sig_fault. Signed-off-by: Stacey Son Signed-off-by: Kyle Ev

[PULL 36/40] bsd-user/signal.c: implement do_sigaction

Implement the meat of the sigaction(2) system call with do_sigaction and helper routiner block_signals (which is also used to implemement signal masking so it's global). Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/

[PULL 26/40] bsd-user/signal.c: Implement host_signal_handler

Implement host_signal_handler to handle signals generated by the host and to do safe system calls. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/signal.c | 105 ++ 1 file c

[PULL 20/40] bsd-user/host/i386/host-signal.h: Implement host_signal_*

Implement host_signal_pc, host_signal_set_pc and host_signal_write for i386. Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- bsd-user/host/i386/host-signal.h | 37 1 file changed, 37 insertions

[PULL 14/40] bsd-user/arm/target_arch_cpu.h: Use force_sig_fault for EXCP_UDEF

Use force_sig_fault to implement unknown opcode. This just uninlines that function, so simplify things by using it. Fold in EXCP_NOCP and EXCP_INVSTATE, as is done in linux-user. Make a note about slight differences with FreeBSD in case any of them turn out to be important later. Signed-off-by: Wa

[PULL 04/40] bsd-user/arm/signal.c: get_mcontext should zero vfp data

FreeBSD's get_mcontext doesn't return any vfp data. Instead, it zeros out the vfp feilds (and all the spare fields). Impelement this behavior. We're still missing the sysarch(ARM_GET_VFPCONTEXT) syscall, though. Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/arm/signal.c

[PULL 12/40] bsd-user/arm/arget_arch_cpu.h: Move EXCP_DEBUG and EXCP_BKPT together

Implement EXCP_DEBUG and EXCP_BKPT the same, as is done in linux-user. The prior adjustment of register 15 isn't needed, so remove that. Remove a redunant comment (that code in FreeBSD never handled break points). It's unclear why BKPT was an alias for system calls, but FreeBSD doesn't do that toda

[PULL 28/40] bsd-user/signal.c: Implement dump_core_and_abort

Force delivering a signal and generating a core file. It's a global function for the moment... Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/signal.c | 76 + bsd-user/sys

[PULL 35/40] bsd-user/signal.c: implement do_sigreturn

Implements the meat of a sigreturn(2) system call via do_sigreturn, and helper reset_signal_mask. Fix the prototype of do_sigreturn in qemu.h and remove do_rt_sigreturn since it's linux only. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Hen

[PATCH v3 1/3] qmp: Support for querying stats

Introduce QMP support for querying stats. Provide a framework for adding new stats and support for the following commands: - query-stats Returns a list of all stats per target type (only VM and VCPU for now), with additional options for specifying stat names, VCPU qom paths, and stat provider. -

[PULL 39/40] bsd-user: Rename arg name for target_cpu_reset to env

Rename the parameter name for target_cpu_reset's CPUArchState * arg from cpu to env. Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_cpu.h| 2 +- bsd-user/i386/target_arch_cpu.h | 4 ++-- bsd-user/x86_64/target_arch_cpu.h | 4 ++-- 3 files changed, 5

[PULL 15/40] bsd-user/arm/target_arch_cpu.h: Implement data faults

Update for the richer set of data faults that are now possible. Copied largely from linux-user/arm/cpu_loop.c, with minor typo fixes. Signed-off-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_cpu.h | 45 ++

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