Re: [PATCH] nvdimm: release the correct device list

On Fri, Sep 17, 2021 at 02:59:33PM +0200, Igor Mammedov wrote: > On Mon, 13 Sep 2021 06:40:01 + > "lizhij...@fujitsu.com" wrote: > > > ping again > > Michael, > > can you include this in your next pull req, please? ok > > > > > > > > On 30/08/2021 09:04, Li Zhijian wrote: > > > ping >

[PATCH 11/14] bsd-user/sysarch: Move to using do_freebsd_arch_sysarch interface

Convert the #ifdef'd i386 code to calling the i386 sysarch code we have living in i386,x86_64/target_arch_sysarch.h do_freebsd_arch_sysarch rather than having a separate copy. This is in preparation to remove it entirely. Signed-Off-By: Warner Losh --- bsd-user/syscall.c | 45 +--

[PATCH 10/14] bsd-user: Add stop_all_tasks

Similar to the same function in linux-user: this stops all the current tasks. Signed-off-by: Stacey Son Signed-off-by: Warner Losh --- bsd-user/main.c | 9 + bsd-user/qemu.h | 1 + 2 files changed, 10 insertions(+) diff --git a/bsd-user/main.c b/bsd-user/main.c index ee84554854..cb5ea4

[PATCH 14/14] bsd-user/signal: Create a dummy signal queueing function

Create dummy signal queueing function so we can start to integrate other architectures (at the cost of signals remaining broken) to tame the dependency graph a bit and to bring in signals in a more controlled fashion. Signed-off-by: Warner Losh --- bsd-user/qemu.h | 1 + bsd-user/signal.c | 8

[PATCH 09/14] bsd-user: Remove used from TaskState

The used field of TaskState is write only. Eliminate it. Signed-off-by: Warner Losh --- bsd-user/main.c | 1 - bsd-user/qemu.h | 1 - 2 files changed, 2 deletions(-) diff --git a/bsd-user/main.c b/bsd-user/main.c index 48643eeabc..ee84554854 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@

[PATCH 04/14] bsd-user: export get_errno and is_error from syscall.c

Make get_errno and is_error global so files other than syscall.c can use them. Signed-off-by: Warner Losh --- bsd-user/qemu.h| 4 bsd-user/syscall.c | 10 +- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index 522d6c4031..22fc3

[PATCH 08/14] bsd-user/target_os_elf: If ELF_HWCAP2 is defined, publish it

Some architecutres publish AT_HWCAP2 as well as AT_HWCAP. Those architectures will define this in their target_arch_elf.h files. If it is defined, then publish it. Signed-off-by: Warner Losh --- bsd-user/freebsd/target_os_elf.h | 4 1 file changed, 4 insertions(+) diff --git a/bsd-user/fr

Re: [PATCH v6 00/21] Add LoongArch linux-user emulation support

Hi, Richard. On 09/21/2021 05:17 AM, Richard Henderson wrote: > On 9/17/21 1:12 AM, Song Gao wrote: >> The 'o32' code has been deleted at the latest kernel [1]. This series only >> support >> linux-user emulation. > > I have now reviewed all but the linux-user/ portion. > Thank you! > I see tha

[PATCH 03/14] bsd-user: TARGET_RESET define is unused, remove it

Signed-off-by: Warner Losh --- bsd-user/i386/target_arch_cpu.h | 2 -- bsd-user/x86_64/target_arch_cpu.h | 2 -- 2 files changed, 4 deletions(-) diff --git a/bsd-user/i386/target_arch_cpu.h b/bsd-user/i386/target_arch_cpu.h index 978e8066af..b28602adbb 100644 --- a/bsd-user/i386/target_arch_cp

[PATCH 07/14] bsd-user/target_os_elf.h: Remove fallback ELF_HWCAP and reorder

All architectures have a ELF_HWCAP, so remove the fallback ifdef. Place ELF_HWCAP in the same order as on native FreeBSD. Signed-off-by: Warner Losh --- bsd-user/freebsd/target_os_elf.h | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/bsd-user/freebsd/target_os_elf.h b

[PATCH 06/14] bsd-user: move TARGET_MC_GET_CLEAR_RET to target_os_signal.h

Move TARGET_MC_GET_CLEAR_RET to freebsd/target_os_signal.h since it's FreeBSD-wide. Signed-off-by: Warner Losh --- bsd-user/freebsd/target_os_signal.h | 3 +++ bsd-user/i386/target_arch_signal.h | 2 -- bsd-user/x86_64/target_arch_signal.h | 2 -- 3 files changed, 3 insertions(+), 4 deletions

[PATCH 01/14] bsd-user/target_os-user.h: Remove support for FreeBSD older than 12.0

Signed-off-by: Warner Losh --- bsd-user/freebsd/target_os_user.h | 100 +- 1 file changed, 1 insertion(+), 99 deletions(-) diff --git a/bsd-user/freebsd/target_os_user.h b/bsd-user/freebsd/target_os_user.h index 95b1fa9f99..19892c5071 100644 --- a/bsd-user/freebsd/ta

[PATCH 13/14] bsd-user: Rename sigqueue to qemu_sigqueue

To avoid a name clash with FreeBSD's sigqueue data structure in signalvar.h, rename sigqueue to qemu_sigqueue. This sturcture is currently defined, but unused. Signed-off-by: Warner Losh --- bsd-user/qemu.h | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/bsd-us

[PATCH 05/14] bsd-user/errno_defs.h: Add internal error numbers

From: Stacey Son To emulate signals and interrupted system calls, we need to have the same mechanisms we have in the kernel, including these errno values. Signed-off-by: Stacey Son Signed-off-by: Warner Losh --- bsd-user/errno_defs.h | 14 +++--- 1 file changed, 11 insertions(+), 3 de

[PATCH 00/14] bsd-user: misc cleanup for aarch64 import

Prepare for aarch64 support (the next architecture to be upstreamed). As the aarch64 emulation is more complete, it relies on a number of different items. In some cases, I've pulled in the full support from bsd-user fork. In other cases I've created a simple stub (as is the case for signals, which

[PATCH 02/14] bsd-user/strace.list: Remove support for FreeBSD versions older than 12.0

Signed-off-by: Warner Losh --- bsd-user/freebsd/strace.list | 11 --- 1 file changed, 11 deletions(-) diff --git a/bsd-user/freebsd/strace.list b/bsd-user/freebsd/strace.list index b01b5f36e8..275d2dbe27 100644 --- a/bsd-user/freebsd/strace.list +++ b/bsd-user/freebsd/strace.list @@ -33,

[PATCH 12/14] bsd-user/sysarch: Provide a per-arch framework for sysarch syscall

Add the missing glue to pull in do_freebsd_sysarch to call do_freebsd_arch_sysarch. Put it in os-sys.c, which will be used for sysctl and sysarch system calls because they are mostly arch specific. Signed-off-by: Stacey Son Signed-off-by: Warner Losh --- bsd-user/freebsd/meson.build | 3 +++ b

[PATCH v2 2/3] QIOChannelSocket: Implement io_async_write & io_async_flush

Implement the new optional callbacks io_async_write and io_async_flush on QIOChannelSocket, but enables it only when MSG_ZEROCOPY feature is available in the host kernel, and TCP sockets are used. qio_channel_socket_writev() contents were moved to a helper function __qio_channel_socket_writev() wh

[PATCH v2 3/3] multifd: Send using asynchronous write on nocomp to send RAM pages.

Change multifd nocomp version to use asynchronous write for RAM pages, and benefit of MSG_ZEROCOPY when it's available. The asynchronous flush happens on cleanup only, before destroying the QIOChannel. This will work fine on RAM migration because the RAM pages are not usually freed, and there i

[PATCH v2 0/3] QIOChannel async_write & async_flush + MSG_ZEROCOPY + multifd

This patch series intends to enable MSG_ZEROCOPY in QIOChannel, and make use of it for multifd migration performance improvement. Patch #1 creates new callbacks for QIOChannel, allowing the implementation of asynchronous writing. Patch #2 implements async_write and async_flush on QIOChannelSocket

[PATCH v2 1/3] QIOCHannel: Add io_async_writev & io_async_flush callbacks

Adds io_async_writev and io_async_flush as optional callback to QIOChannelClass, allowing the implementation of asynchronous writes by subclasses. How to use them: - Write data using qio_channel_async_writev(), - Wait write completion with qio_channel_async_flush(). Notes: Some asynchronous imple

[PATCH v2 7/9] bsd-user/mmap.c: Don't mmap fd == -1 independently from MAP_ANON flag

From: Guy Yur Switch checks for !(flags & MAP_ANONYMOUS) with checks for fd != -1. MAP_STACK and MAP_GUARD both require fd == -1 and don't require mapping the fd either. Signed-off-by: Guy Yur [ partially merged before, finishing the job and documenting origin] Signed-off-by: Warner Losh ---

[PATCH v2 8/9] bsd-user/mmap.c: Implement MAP_EXCL, required by jemalloc in head

From: Kyle Evans jemalloc requires a working MAP_EXCL. Ensure that no page is double mapped when specified. Signed-off-by: Kyle Evans Signed-off-by: Warner Losh --- bsd-user/mmap.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/bsd-user/mmap.c b/bsd-user/mmap.c

[PATCH v2 5/9] bsd-user/mmap.c: mmap prefer MAP_ANON for BSD

MAP_ANON and MAP_ANONYMOUS are identical. Prefer MAP_ANON for BSD since the file is now a confusing mix of the two. Signed-off-by: Warner Losh Reviewed-by: Philippe Mathieu-Daudé --- bsd-user/mmap.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/bsd-user/mmap.c

[PATCH v2 6/9] bsd-user/mmap.c: line wrap change

Keep the shifted expression on one line. It's the same number of lines and easier to read like this. Signed-off-by: Warner Losh --- bsd-user/mmap.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bsd-user/mmap.c b/bsd-user/mmap.c index bafbdacd31..8b763fffc3 100644 --- a/

[PATCH v2 9/9] bsd-user/mmap.c: assert that target_mprotect cannot fail

Similar to the equivalent linux-user change 86abac06c14. All error conditions that target_mprotect checks are also checked by target_mmap. EACCESS cannot happen because we are just removing PROT_WRITE. ENOMEM should not happen because we are modifying a whole VMA (and we have bigger problems anywa

[PATCH v2 1/9] bsd-user/mmap.c: Always zero MAP_ANONYMOUS memory in mmap_frag()

From: Mikaël Urankar Similar to the equivalent linux-user commit e6deac9cf99 When mapping MAP_ANONYMOUS memory fragments, still need notice about to set it zero, or it will cause issues. Signed-off-by: Mikaël Urankar Signed-off-by: Warner Losh --- bsd-user/mmap.c | 4 +++- 1 file changed, 3

[PATCH v2 4/9] bsd-user/mmap.c: mmap return ENOMEM on overflow

mmap should return ENOMEM on len overflow rather than EINVAL. Return EINVAL when len == 0 and ENOMEM when the rounded to a page length is 0. Found by make check-tcg. Signed-off-by: Warner Losh --- bsd-user/mmap.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/bsd-use

[PATCH v2 2/9] bsd-user/mmap.c: check pread's return value to fix warnings with _FORTIFY_SOURCE

From: Mikaël Urankar Simmilar to the equivalent linux-user: commit fb7e378cf9c, which added checking to pread's return value. Signed-off-by: Mikaël Urankar Signed-off-by: Warner Losh --- bsd-user/mmap.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/bsd-user/mmap.c

[PATCH v2 0/9] bsd-user mmap fixes

This series synchronizes mmap.c with the bsd-user fork. This is a mix of old bug fixes pulled in from linux-user, as well as some newer fixes to adress bugs found in check-tcg and recent FreeBSD developments. There are also a couple of style commits. v2: do the cherry-picks from linux-user in qemu

[PATCH v2 3/9] bsd-user/mmap.c: MAP_ symbols are defined, so no need for ifdefs

All these MAP_ symbols are always defined on supported FreeBSD versions (12.2 and newer), so remove the #ifdefs since they aren't needed. Signed-off-by: Warner Losh Reviewed-by: Philippe Mathieu-Daudé --- bsd-user/mmap.c | 14 -- 1 file changed, 14 deletions(-) diff --git a/bsd-use

Re: ensuring a machine's buses have unique names

Peter Maydell writes: [...] > I'm not sure how best to sort this tangle out. We could: > * make controller devices pass in NULL as bus name; this >means that some bus names will change, which is an annoying >breakage but for these minor bus types we can probably >get away with it. T

Re: ensuring a machine's buses have unique names

BALATON Zoltan writes: > On Tue, 21 Sep 2021, Peter Maydell wrote: >> On Wed, 15 Sept 2021 at 05:28, Markus Armbruster wrote: >>> >>> Peter Maydell writes: I'm not sure how best to sort this tangle out. We could: * make controller devices pass in NULL as bus name; this means

Re: [PATCH v2 12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc/eqv ops

On 9/21/21 1:18 PM, WANG Xuerui wrote: +case INDEX_op_eqv_i32: +case INDEX_op_eqv_i64: +if (c2) { +/* guaranteed to fit due to constraint */ +tcg_out_opc_xori(s, a0, a1, ~a2); +} else { +tcg_out_opc_nor(s, a0, a2, TCG_REG_ZERO); +

Re: [PATCH v2 03/30] tcg/loongarch64: Add the tcg-target.h file

Hi Richard, On 9/22/21 11:55, Richard Henderson wrote: On 9/21/21 1:18 PM, WANG Xuerui wrote: Signed-off-by: WANG Xuerui ---   tcg/loongarch64/tcg-target.h | 180 +++   1 file changed, 180 insertions(+)   create mode 100644 tcg/loongarch64/tcg-target.h Reviewed-

Re: [PATCH v2 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi

On 9/21/21 1:18 PM, WANG Xuerui wrote: +/* Test for PC-relative values that can be loaded faster. */ +intptr_t pc_offset = val - (uintptr_t)s->code_ptr; This isn't quite right for split r^x code buffer. You should have seen this with --enable-debug-tcg... You need pc_offset = tcg_pcre

Re: [PATCH v2 07/30] tcg/loongarch64: Implement necessary relocation operations

On 9/21/21 1:18 PM, WANG Xuerui wrote: Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target.c.inc | 66 1 file changed, 66 insertions(+) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 08/30] tcg/loongarch64: Implement the memory barrier op

On 9/21/21 1:18 PM, WANG Xuerui wrote: Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target.c.inc | 32 1 file changed, 32 insertions(+) Reviewed-by: Richard Henderson r

Re: [PATCH] spapr/xive: Fix kvm_xive_source_reset trace event

On Tue, Sep 21, 2021 at 09:13:54AM +0200, Greg Kurz wrote: > On Tue, 21 Sep 2021 08:56:52 +0200 > Cédric Le Goater wrote: > > > Signed-off-by: Cédric Le Goater > > --- > > Maybe add ? > > Fixes: 4e960974d4ee ("xive: Add trace events") That would be helpful. and... this really needs at least

Re: [PATCH v2 06/30] tcg/loongarch64: Define the operand constraints

On 9/21/21 1:18 PM, WANG Xuerui wrote: Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target-con-str.h | 28 +++ tcg/loongarch64/tcg-target.c.inc | 52 2 files changed, 80 insertions(+) create mode 100644 tcg/loongarch64/tcg-target-con-str.h

Re: [PATCH] spapr_numa.c: fixes in spapr_numa_FORM2_write_rtas_tables()

On Tue, Sep 21, 2021 at 04:43:47PM -0300, Daniel Henrique Barboza wrote: > This patch has a handful of modifications for the recent added > FORM2 support: > > - there is no particular reason for both 'lookup_index_table' and > 'distance_table' to be allocated in the heap, since their sizes are > k

Re: [PATCH v2 03/30] tcg/loongarch64: Add the tcg-target.h file

On 9/21/21 1:18 PM, WANG Xuerui wrote: Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target.h | 180 +++ 1 file changed, 180 insertions(+) create mode 100644 tcg/loongarch64/tcg-target.h Reviewed-by: Richard Henderson However... +#define TCG_TARGET

Re: [PATCH 5/5] [RFC] target/arm: Advertise MVE to gdb when present

On 9/21/21 9:29 AM, Peter Maydell wrote: Cortex-M CPUs with MVE should advertise this fact to gdb, using the org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR register. Presence of this feature also tells gdb to create pseudo-registers Q0..Q7, so we do not need to tell gdb about t

Re: [PATCH 4/5] target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML

On 9/21/21 9:29 AM, Peter Maydell wrote: Currently we send VFP XML which includes D0..D15 or D0..D31, plus FPSID, FPSCR and FPEXC. The upstream GDB tolerates this, but its definition of this XML feature does not include FPSID or FPEXC. In particular, for M-profile cores there are no FPSID or FP

Re: [PATCH 3/5] target/arm: Move gdbstub related code out of helper.c

On 9/21/21 9:28 AM, Peter Maydell wrote: Currently helper.c includes some code which is part of the arm target's gdbstub support. This code has a better home: in gdbstub.c and gdbstub64.c. Move it there. Because aarch64_fpu_gdb_get_reg() and aarch64_fpu_gdb_set_reg() move into gdbstub64.c, thi

Re: [PATCH 2/5] target/arm: Fix coding style issues in gdbstub code in helper.c

On 9/21/21 9:28 AM, Peter Maydell wrote: We're going to move this code to a different file; fix the coding style first so checkpatch doesn't complain. This includes deleting the spurious 'break' statements after returns in the vfp_gdb_get_reg() function. Signed-off-by: Peter Maydell --- targe

Re: [PATCH 1/5] configs: Don't include 32-bit-only GDB XML in aarch64 linux configs

On 9/21/21 9:28 AM, Peter Maydell wrote: The aarch64-linux QEMU usermode binaries can never run 32-bit code, so they do not need to include the GDB XML for it. (arm_cpu_register_gdb_regs_for_features() will not use these XML files if the CPU has ARM_FEATURE_AARCH64, so we will not advertise to gd

[PULL 00/10] tcg patch queue, v3

Rebase and resolve minor conflict. r~ The following changes since commit 2c3e83f92d93fbab071b8a96b8ab769b01902475: Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-20210921' into staging (2021-09-21 10:57:48 -0700) are available in the Git repository at

unknown keycodes `empty+aliases(qwerty)'

MacOS Mojave Macbook Air, running a VM via ssh-ing into a linux kernel 4.15. My 'e' acts as delete, t as w, y as q, u as d in the login screen. Unfortunate.

[RFC v7] virtio/vsock: add two more queues for datagram types

Datagram sockets are connectionless and unreliable. The sender does not know the capacity of the receiver and may send more packets than the receiver can handle. Add two more dedicate virtqueues for datagram sockets, so that it will not unfairly steal resources from stream and future connection-or

Re: [PATCH] hw/loader: Remove unused rom_add_file_as() definition

On Sat, Sep 18, 2021 at 5:02 AM Philippe Mathieu-Daudé wrote: > > rom_add_file_as() is not used anywhere, remove it. > > Signed-off-by: Philippe Mathieu-Daudé Looks fine, although I'm not convinced removing this gets us anything. It might be used in the future and doesn't add too much cruft. Re

Re: [PATCH v3 05/15] target/ppc: PMU: add instruction counting

On 9/6/21 22:57, David Gibson wrote: On Fri, Sep 03, 2021 at 05:31:06PM -0300, Daniel Henrique Barboza wrote: The PMU is already counting cycles by calculating time elapsed in nanoseconds. Counting instructions is a different matter and requires another approach. This patch adds the capabili

Change TCG cache size?

Hello all, I just want to ask this one question: if I change the qemu tcg cache size ( TB_JMP_CACHE_SIZE), will that force any errors at run time?

[PATCH v2 27/30] tcg/loongarch64: Register the JIT

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 44 1 file changed, 44 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 240e40374a..d599de3b17 100644 --- a/tcg/l

[PATCH v2 30/30] configure, meson.build: Mark support for loongarch64 hosts

Signed-off-by: WANG Xuerui --- configure | 7 ++- meson.build | 4 +++- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/configure b/configure index 1043ccce4f..3a9035385d 100755 --- a/configure +++ b/configure @@ -659,6 +659,8 @@ elif check_define __arm__ ; then cpu="arm"

Re: [PULL v2 00/21] riscv-to-apply queue

in the Git repository at: g...@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20210921 for you to fetch changes up to ed481d9837250aa682f5156528bc923e1b214f76: hw/riscv: opentitan: Correct the USB Dev address (2021-09-21 12:1

Re: plugins: Missing Store Exclusive Memory Accesses

On Sep 17 12:05, Alex Bennée wrote: > Aaron Lindsay writes: > > I recently noticed that the plugin interface does not appear to be > > emitting callbacks to functions registered via > > `qemu_plugin_register_vcpu_mem_cb` for AArch64 store exclusives. This > > would include instructions like `stxp

[PATCH v2 17/30] tcg/loongarch64: Implement add/sub ops

The neg_i{32,64} ops is fully expressible with sub, so omitted for simplicity. Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target-con-set.h | 2 ++ tcg/loongarch64/tcg-target.c.inc | 38 2 files changed, 40 insertions(+) diff --git a/tcg/loongarch64/tcg-

Re: [PATCH v2 24/30] linux-user/openrisc: Use force_sig_fault, force_sigsegv_for_addr

On Sun, Sep 19, 2021 at 10:49:26AM -0700, Richard Henderson wrote: > On 8/24/21 10:17 AM, Peter Maydell wrote: > > I think that EXCP_RANGE should for us be unreachable in user-only > > mode (because it can only happen if the relevant bits in SR are > > set, and SR is writeable only in supervisor mo

[PATCH v2 15/30] tcg/loongarch64: Implement clz/ctz ops

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 42 2 files changed, 43 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-con-set.h index d958183020..2975e0

[PATCH v2 28/30] linux-user: Add safe syscall handling for loongarch64 hosts

Signed-off-by: WANG Xuerui --- linux-user/host/loongarch64/hostdep.h | 34 .../host/loongarch64/safe-syscall.inc.S | 80 +++ 2 files changed, 114 insertions(+) create mode 100644 linux-user/host/loongarch64/hostdep.h create mode 100644 linux-user/host/loon

[PATCH v2 29/30] accel/tcg/user-exec: Implement CPU-specific signal handler for loongarch64 hosts

Signed-off-by: WANG Xuerui --- accel/tcg/user-exec.c | 78 +++ 1 file changed, 78 insertions(+) diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 8fed542622..87660903b2 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -878,6

[PATCH v2 13/30] tcg/loongarch64: Implement deposit/extract ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 21 + 2 files changed, 22 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-con-set.h

[PATCH v2 26/30] tcg/loongarch64: Implement tcg_target_init

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 27 +++ 1 file changed, 27 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 9cdb283942..240e40374a 100644 --- a/tcg/loonga

[PATCH v2 24/30] tcg/loongarch64: Implement tcg_target_qemu_prologue

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 68 1 file changed, 68 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index bbb6b7f47d..0c413c4c95 100644 --- a/tcg/l

[PATCH v2 11/30] tcg/loongarch64: Implement sign-/zero-extension ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 82 2 files changed, 83 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-co

[PATCH v2 25/30] tcg/loongarch64: Implement exit_tb/goto_tb

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 19 +++ 1 file changed, 19 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 0c413c4c95..9cdb283942 100644 --- a/tcg/loongarch64/tc

[PATCH v2 20/30] tcg/loongarch64: Implement setcond ops

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target.c.inc | 74 1 file changed, 74 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index b0600a3dbd..08e6541dcf 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++

[PATCH v2 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target-con-set.h | 2 + tcg/loongarch64/tcg-target.c.inc | 332 +++ 2 files changed, 334 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-con-set.h index 3ab0416d9f..8fd3

[PATCH v2 19/30] tcg/loongarch64: Implement br/brcond ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 53 2 files changed, 54 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-co

[PATCH v2 10/30] tcg/loongarch64: Implement goto_ptr

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 17 + tcg/loongarch64/tcg-target.c.inc | 15 +++ 2 files changed, 32 insertions(+) create mode 100644 tcg/loongarch64/tcg-target-con-set.h diff --git a/tcg/loong

[PATCH v2 22/30] tcg/loongarch64: Implement simple load/store ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 131 +++ 2 files changed, 132 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-

[PATCH v2 21/30] tcg/loongarch64: Implement tcg_out_call

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target.c.inc | 34 1 file changed, 34 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 08e6541dcf..44532ee1e4 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++

[PATCH v2 08/30] tcg/loongarch64: Implement the memory barrier op

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target.c.inc | 32 1 file changed, 32 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 69e882ba5d..338b772732 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++

[PATCH v2 18/30] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 65 2 files changed, 66 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-co

[PATCH v2 12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc/eqv ops

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target-con-set.h | 2 + tcg/loongarch64/tcg-target.c.inc | 101 +++ 2 files changed, 103 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-con-set.h index 7e459490ea..9ac2

[PATCH v2 06/30] tcg/loongarch64: Define the operand constraints

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target-con-str.h | 28 +++ tcg/loongarch64/tcg-target.c.inc | 52 2 files changed, 80 insertions(+) create mode 100644 tcg/loongarch64/tcg-target-con-str.h diff --git a/tcg/loongarch64/tcg-target-con

[PATCH v2 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 91 2 files changed, 92 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-con-set.h index 2975e03127..42f8e2

[PATCH v2 14/30] tcg/loongarch64: Implement bswap32_i32/bswap32_i64/bswap64_i64

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target.c.inc | 20 1 file changed, 20 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 27066960cf..e7b5f2c5ab 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loonga

[PATCH v2 02/30] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer

I ported the initial code, so I should maintain it of course. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- MAINTAINERS | 5 + 1 file changed, 5 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6c20634d63..66d1a17ca3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -

[PATCH v2 05/30] tcg/loongarch64: Add register names, allocation order and input/output sets

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 118 +++ 1 file changed, 118 insertions(+) create mode 100644 tcg/loongarch64/tcg-target.c.inc diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target

[PATCH v2 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target.c.inc | 89 1 file changed, 89 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 338b772732..e4e7e5e903 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++

[PATCH v2 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers

Signed-off-by: WANG Xuerui Acked-by: Richard Henderson --- tcg/loongarch64/tcg-insn-defs.c.inc | 873 1 file changed, 873 insertions(+) create mode 100644 tcg/loongarch64/tcg-insn-defs.c.inc diff --git a/tcg/loongarch64/tcg-insn-defs.c.inc b/tcg/loongarch64/tcg-in

[PATCH v2 00/30] LoongArch64 port of QEMU TCG

Hi all, This is a port of QEMU TCG to the brand-new CPU architecture LoongArch, introduced by Loongson with their 3A5000 chips. Test suite all passed except one timeout that is test-crypto-tlssession, but this particular case runs well when relatively few targets are enabled, so it may be just a c

[PATCH v2 03/30] tcg/loongarch64: Add the tcg-target.h file

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target.h | 180 +++ 1 file changed, 180 insertions(+) create mode 100644 tcg/loongarch64/tcg-target.h diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h new file mode 100644 index 00

[PATCH v2 01/30] elf: Add machine type value for LoongArch

Signed-off-by: WANG Xuerui --- include/elf.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/elf.h b/include/elf.h index 811bf4a1cb..3a4bcb646a 100644 --- a/include/elf.h +++ b/include/elf.h @@ -182,6 +182,8 @@ typedef struct mips_elf_abiflags_v0 { #define EM_NANOMIPS 249

[PATCH v2 07/30] tcg/loongarch64: Implement necessary relocation operations

Signed-off-by: WANG Xuerui --- tcg/loongarch64/tcg-target.c.inc | 66 1 file changed, 66 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index f0930f77ef..69e882ba5d 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++

Re: [PATCH] nbd/client: Request larger block status by default

On Tue, Sep 21, 2021 at 10:12:02PM +0300, Vladimir Sementsov-Ogievskiy wrote: > 21.09.2021 21:08, Eric Blake wrote: > > On Tue, Sep 21, 2021 at 08:25:11PM +0300, Vladimir Sementsov-Ogievskiy > > wrote: > > > 21.09.2021 19:17, Eric Blake wrote: > > > > Now that commit 5a1cfd21 has clarified that a

[PATCH] spapr_numa.c: fixes in spapr_numa_FORM2_write_rtas_tables()

This patch has a handful of modifications for the recent added FORM2 support: - there is no particular reason for both 'lookup_index_table' and 'distance_table' to be allocated in the heap, since their sizes are known right at the start of the function. Use static allocation in them to spare a cou

Re: [PATCH] nbd/client: Request larger block status by default

21.09.2021 21:08, Eric Blake wrote: On Tue, Sep 21, 2021 at 08:25:11PM +0300, Vladimir Sementsov-Ogievskiy wrote: 21.09.2021 19:17, Eric Blake wrote: Now that commit 5a1cfd21 has clarified that a driver's block_status can report larger *pnum than in the original request, we can take advantage o

[PATCH] linux-user/syscall: add support for CLONE_PIDFD

Add basic support for CLONE_PIDFD, only fork-like clone without additional flags. This is enough to make Qt/forkfd working. Signed-off-by: Andreas Schwab --- linux-user/syscall.c | 52 ++-- 1 file changed, 50 insertions(+), 2 deletions(-) diff --git a/li

Re: [PATCH 3/5] target/arm: Move gdbstub related code out of helper.c

On 9/21/21 18:28, Peter Maydell wrote: Currently helper.c includes some code which is part of the arm target's gdbstub support. This code has a better home: in gdbstub.c and gdbstub64.c. Move it there. Because aarch64_fpu_gdb_get_reg() and aarch64_fpu_gdb_set_reg() move into gdbstub64.c, this

Re: [PATCH 2/5] target/arm: Fix coding style issues in gdbstub code in helper.c

On 9/21/21 18:28, Peter Maydell wrote: We're going to move this code to a different file; fix the coding style first so checkpatch doesn't complain. This includes deleting the spurious 'break' statements after returns in the vfp_gdb_get_reg() function. Signed-off-by: Peter Maydell --- target

Re: [PATCH] nbd/client: Request larger block status by default

On Tue, Sep 21, 2021 at 08:25:11PM +0300, Vladimir Sementsov-Ogievskiy wrote: > 21.09.2021 19:17, Eric Blake wrote: > > Now that commit 5a1cfd21 has clarified that a driver's block_status > > can report larger *pnum than in the original request, we can take > > advantage of that in the NBD driver.

Re: [PATCH] nbd/client: Request larger block status by default

21.09.2021 19:17, Eric Blake wrote: Now that commit 5a1cfd21 has clarified that a driver's block_status can report larger *pnum than in the original request, we can take advantage of that in the NBD driver. Rather that limiting our request to the server based on the maximum @bytes our caller men

Re: [PATCH 28/30] configure, meson.build: Mark support for 64-bit LoongArch hosts

On 9/21/21 9:09 AM, WANG Xuerui wrote: I think cpu=loongarch64 but ARCH=loongarch should be okay... Make it easier on yourself and keep them the same. r~

Re: [PATCH v4 04/20] nubus: use bitmap to manage available slots

On 20/09/2021 20:48, Laurent Vivier wrote: Le 17/09/2021 à 09:50, Mark Cave-Ayland a écrit : Convert nubus_device_realize() to use a bitmap to manage available slots to allow for future Nubus devices to be plugged into arbitrary slots from the command line. Update mac_nubus_bridge_init() to

Re: [PULL v2 00/27] target-arm queuea

' into staging > (2021-09-19 18:53:29 +0100) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20210921 > > for you to fetch changes up to 4b445c926add3fdec13958736e482e88857bcad8: > > t

Re: [PATCH v4 03/20] nubus-device: add device slot parameter

On 20/09/2021 18:31, Laurent Vivier wrote: Le 17/09/2021 à 09:50, Mark Cave-Ayland a écrit : This prepares for allowing Nubus devices to be placed in a specific slot instead of always being auto-allocated by the bus itself. Signed-off-by: Mark Cave-Ayland --- hw/nubus/nubus-device.c | 6 ++

Re: [PATCH v12 04/10] hvf: Add Apple Silicon support

On 21.09.21 17:30, Peter Maydell wrote: > On Thu, 16 Sept 2021 at 16:54, Alexander Graf wrote: >> With Apple Silicon available to the masses, it's a good time to add support >> for driving its virtualization extensions from QEMU. >> >> This patch adds all necessary architecture specific code to

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