On 9/20/21 11:53 PM, Alistair Francis wrote:
From: Alistair Francis <alistair.fran...@wdc.com>
The following changes since commit 326ff8dd09556fc2e257196c49f35009700794ac:
Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into
staging (2021-09-20 16:17:05 +0100)
are available in the Git repository at:
g...@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20210921
for you to fetch changes up to ed481d9837250aa682f5156528bc923e1b214f76:
hw/riscv: opentitan: Correct the USB Dev address (2021-09-21 12:10:47 +1000)
----------------------------------------------------------------
Second RISC-V PR for QEMU 6.2
- ePMP CSR address updates
- Convert internal interrupts to use QEMU GPIO lines
- SiFive PWM support
- Support for RISC-V ACLINT
- SiFive PDMA fixes
- Update to u-boot instructions for sifive_u
- mstatus.SD bug fix for hypervisor extensions
- OpenTitan fix for USB dev address
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/6.2
for any user-visible changes.
r~
