On 09/29/2016 04:40 AM, Peter Xu wrote:
On Tue, Sep 20, 2016 at 09:04:56AM +0200, Maxime Coquelin wrote:
This python script calls 'query-cpus' QMP command to retrieve
vCPUs thread IDs.
Thread IDs are then used by taskset to pin vCPUs to physical
CPUs passed in command line.
In case more vCPUs
On Wed, Sep 28, 2016 at 08:51:28PM +0200, Laurent Vivier wrote:
> Signed-off-by: Laurent Vivier
> ---
> tests/Makefile.include | 1 +
> tests/libqos/pci-pc.c| 22
> tests/libqos/pci-spapr.c | 280
> +++
> tests/libqos/pci-spapr.h | 17 ++
On Wed, Sep 28, 2016 at 08:51:27PM +0200, Laurent Vivier wrote:
> This series enables USB tests on PPC64, and for
> that implements libqos SPAPR PCI support.
These look good, except I still think the endianness is a bit
confused. A more detailed analysis in response to patch 1.
Also, I'm afraid
On Wed, Sep 28, 2016 at 08:51:29PM +0200, Laurent Vivier wrote:
> Signed-off-by: Laurent Vivier
> Reviewed-by: Greg Kurz
Reviewed-by: David Gibson
> ---
> tests/e1000e-test.c | 2 +-
> tests/i440fx-test.c | 2 +-
> tests/ide-test.c| 2 +-
> tests/ivshmem-test.c
On Wed, Sep 28, 2016 at 08:51:32PM +0200, Laurent Vivier wrote:
> Signed-off-by: Laurent Vivier
So, I think the right place to do the necessary endianness conversion
is the PCI accessor helpers, as noted elsewhere.
However, even ignoring that, I can't actually see anything in your
series that us
On Wed, Sep 28, 2016 at 09:00:51PM -0700, Richard Henderson wrote:
> On 09/28/2016 07:07 PM, David Gibson wrote:
> > > +tcg_gen_mulu2_i64(t0, t1, cpu_avrl[rA(ctx->opcode)], val); \
> >
> > Do you really want to be using an actual mul op, rather than (in << 3)
> > + (in << 1)? Obvious
On Wed, Sep 28, 2016 at 08:51:30PM +0200, Laurent Vivier wrote:
> Machine specific shutdown function can be registered by
> the machine specific qtest_XXX_boot() if needed.
>
> So we will not have to test twice the architecture (on boot and on
> shutdown) if the test can be run on several architec
On Wed, Sep 28, 2016 at 08:51:31PM +0200, Laurent Vivier wrote:
> This allows to store it and not have to rescan the list
> each time we need it.
>
> Signed-off-by: Laurent Vivier
> Reviewed-by: Greg Kurz
With the changes I've suggested to patch 1/6, I think this patch and
the next become unnec
qcow2 resize with snapshot, i modify the code of shrink size.
and some changes for stable and vm state l1 index. thanks for review.
Signed-off-by: zhangzhiming mailto:zhangzhimin...@meituan.com>>
---
block.c| 19
block/qcow2-cluster.c | 55 +++
On 29.09.2016 03:41, Jason Wang wrote:
>
>
> On 2016年09月26日 18:35, Thomas Huth wrote:
>> On 26.09.2016 03:58, Brad Smith wrote:
>>> Update the tap-bsd code now that OpenBSD uses tap(4).
>>>
>>> Signed-off-by: Brad Smith
>>>
>>>
>>> diff --git a/net/tap-bsd.c b/net/tap-bsd.c
>>> index c506ac3..8d
the bar index names are much similar to the bar memory regions,
distinguish them to improve the code readability.
Signed-off-by: Chen Fan
---
hw/display/virtio-vga.c | 4 ++--
hw/virtio/virtio-pci.c | 20 ++--
hw/virtio/virtio-pci.h | 8
3 files changed, 16 insertion
On Wed, Sep 28, 2016 at 09:54:14AM +0200, Laurent Vivier wrote:
>
>
> On 28/09/2016 04:45, David Gibson wrote:
> > On Tue, Sep 27, 2016 at 08:55:59PM +0200, Laurent Vivier wrote:
> >> Signed-off-by: Laurent Vivier
> >> ---
> >> tests/Makefile.include| 8 +++-
> >> tests/libqos/usb.c
On Wed, Sep 28, 2016 at 08:48:54PM -0700, Richard Henderson wrote:
> On 09/28/2016 08:41 PM, Nikunj A Dadhania wrote:
> > Without patch:
> > ==
> > [tcg_test]$ time ../qemu/ppc64le-linux-user/qemu-ppc64le -cpu POWER9
> > le_lxvw4x >/dev/null
> > real0m2.812s
> > user0
On Thu, Sep 29, 2016 at 09:11:10AM +0530, Nikunj A Dadhania wrote:
> David Gibson writes:
>
> > [ Unknown signature status ]
> > On Wed, Sep 28, 2016 at 11:01:22AM +0530, Nikunj A Dadhania wrote:
> >> Load 8byte at a time and manipulate.
> >>
> >> Big-Endian Storage
> >> +-+-
On Tue, Sep 27, 2016 at 09:58:02AM -0700, Peter Maydell wrote:
> On 27 September 2016 at 09:51, G 3 wrote:
> > The problem with your reasoning is you assume this instruction has to be
> > 100% correctly implemented. That every single "corner-case" has to be
> > accounted for.
>
> For upstream QEM
On Thu, Sep 29, 2016 at 09:22:17AM +0530, Nikunj A Dadhania wrote:
> From: Ravi Bangoria
>
> mtvsrws: Move To VSR Word & Splat
>
> Signed-off-by: Ravi Bangoria
> Signed-off-by: Nikunj A Dadhania
Looks ok to me, applied to ppc-for-2.8.
> ---
> target-ppc/translate/vsx-impl.inc.c | 19 +++
On 09/28/2016 08:52 PM, Nikunj A Dadhania wrote:
From: Ravi Bangoria
mtvsrws: Move To VSR Word & Splat
Signed-off-by: Ravi Bangoria
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate/vsx-impl.inc.c | 19 +++
target-ppc/translate/vsx-ops.inc.c | 1 +
2 files changed,
On 09/28/2016 07:19 PM, Nikunj A Dadhania wrote:
Richard Henderson writes:
On 09/28/2016 11:41 AM, Nikunj A Dadhania wrote:
+tcg_gen_mov_i64(t0, cpu_gpr[rA(ctx->opcode)]);
+tcg_gen_deposit_i64(cpu_vsrl(xT(ctx->opcode)), t0, t0, 32, 32);
Why are you using t0?
Thought about dropping
On 09/28/2016 06:53 PM, David Gibson wrote:
On Wed, Sep 28, 2016 at 01:21:00PM -0700, Richard Henderson wrote:
On 09/28/2016 11:41 AM, Nikunj A Dadhania wrote:
+tcg_gen_mov_i64(t0, cpu_gpr[rA(ctx->opcode)]);
+tcg_gen_deposit_i64(cpu_vsrl(xT(ctx->opcode)), t0, t0, 32, 32);
Why are you
On 09/28/2016 07:07 PM, David Gibson wrote:
+tcg_gen_mulu2_i64(t0, t1, cpu_avrl[rA(ctx->opcode)], val); \
Do you really want to be using an actual mul op, rather than (in << 3)
+ (in << 1)? Obviously working out al the carries correctly will be a
bit fiddly.
I think it's fine.
From: Ravi Bangoria
mtvsrws: Move To VSR Word & Splat
Signed-off-by: Ravi Bangoria
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate/vsx-impl.inc.c | 19 +++
target-ppc/translate/vsx-ops.inc.c | 1 +
2 files changed, 20 insertions(+)
diff --git a/target-ppc/translat
On 09/28/2016 08:41 PM, Nikunj A Dadhania wrote:
Without patch:
==
[tcg_test]$ time ../qemu/ppc64le-linux-user/qemu-ppc64le -cpu POWER9 le_lxvw4x
>/dev/null
real0m2.812s
user0m2.792s
sys 0m0.020s
[tcg_test]$
With patch:
===
[tcg_test]$ time ../qemu/ppc64le-linu
On Wed, 09/28 16:24, Alex Bennée wrote:
>
> Fam Zheng writes:
>
> > Currently we configure and build under "$QEMU_SRC/tests/docker" which is
> > dubious, create a fixed directory (to be friendly to ccache) and change
> > to there before calling build_qemu.
> >
> > Signed-off-by: Fam Zheng
> > -
On Wed, 09/28 15:47, Markus Armbruster wrote:
> Fam Zheng writes:
>
> > Currently we configure and build under "$QEMU_SRC/tests/docker" which is
> > dubious, create a fixed directory (to be friendly to ccache) and change
>
> Period instead of comma, to help the reader understand where the part
>
On Wed, 09/28 17:17, Laszlo Ersek wrote:
> On 09/28/16 16:38, Marc-André Lureau wrote:
> > Since 9c5ce8db, the uuid is wrongly copied, as QemuUUID 'in' argument is
> > already a pointer.
> >
> > Fixes ASAN complaining:
> > hw/smbios/smbios.c:489:5: runtime error: load of address 0x7fffcdb91b00
>
David Gibson writes:
> [ Unknown signature status ]
> On Wed, Sep 28, 2016 at 11:01:22AM +0530, Nikunj A Dadhania wrote:
>> Load 8byte at a time and manipulate.
>>
>> Big-Endian Storage
>> +-+-+-+-+
>> | 00 11 22 33 | 44 55 66 77 | 88 99 AA BB | CC
On Wed, 09/28 17:03, Stefano Stabellini wrote:
> On Tue, 27 Sep 2016, Eric Blake wrote:
> > On 09/27/2016 04:20 AM, Fam Zheng wrote:
> > > 9c5ce8db2 switched the type of qemu_uuid and this should have followed.
> > > Fix it.
> > >
> > > Signed-off-by: Fam Zheng
> > > ---
> > > hw/xenpv/xen_domai
David Gibson writes:
> [ Unknown signature status ]
> On Wed, Sep 28, 2016 at 11:01:20AM +0530, Nikunj A Dadhania wrote:
>> From: Ravi Bangoria
>>
>> mtvsrdd: Move To VSR Double Doubleword
>>
>> Signed-off-by: Ravi Bangoria
>> Signed-off-by: Nikunj A Dadhania
>> ---
>> target-ppc/translate/
On Wed, 09/28 18:37, Max Reitz wrote:
> On 27.09.2016 08:37, Fam Zheng wrote:
> > Similar to blockdev-backup, if the target was already moved to a
> > different AioContext, bad things can happen. This happens when the
> > target belongs to a data plane device. It's a very unlikely case, but
> > let
On Wed, 09/28 19:47, Max Reitz wrote:
> On 27.09.2016 08:37, Fam Zheng wrote:
> > From: Stefan Hajnoczi
> >
> > blk_get/set_aio_context() delegate to BlockDriverState without storing
> > the AioContext pointer in BlockBackend.
> >
> > There are two flaws:
> >
> > 1. BlockBackend falls back to t
Peter Maydell wrote:
> On 17 September 2016 at 18:20, Felix Janda wrote:
> > Signed-off-by: Felix Janda
> > ---
> > linux-user/mmap.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/linux-user/mmap.c b/linux-user/mmap.c
> > index c4371d9..4882816 100644
> > ---
On Mon, 09/26 17:28, Daniel P. Berrange wrote:
> On Mon, Sep 26, 2016 at 07:14:33PM +0530, prashanth sunder wrote:
> > Hi All,
> >
> > Summary of the discussion and different approaches we had on IRC
> > regarding a top(1) tool in qemu
> >
> > Implement unique naming for all event loop resources.
On Tue, Sep 20, 2016 at 09:04:56AM +0200, Maxime Coquelin wrote:
> This python script calls 'query-cpus' QMP command to retrieve
> vCPUs thread IDs.
> Thread IDs are then used by taskset to pin vCPUs to physical
> CPUs passed in command line.
>
> In case more vCPUs are present than the number of C
On Thu, Sep 29, 2016 at 12:11:51AM +0530, Nikunj A Dadhania wrote:
> This series contains 7 new instructions for POWER9 ISA3.0
> Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x.
>
> GCC was adding epilogue for every VSX instructions causing change in
> behaviour. For testing
David Gibson writes:
> [ Unknown signature status ]
> On Wed, Sep 28, 2016 at 11:01:22AM +0530, Nikunj A Dadhania wrote:
>> Load 8byte at a time and manipulate.
>>
>> Big-Endian Storage
>> +-+-+-+-+
>> | 00 11 22 33 | 44 55 66 77 | 88 99 AA BB | CC
On Wed, Sep 28, 2016 at 11:15:17AM +0530, Rajalakshmi Srinivasaraghavan wrote:
> The following vector compare not equal instructions are added from ISA 3.0.
>
> vcmpneb - Vector Compare Not Equal Byte
> vcmpneh - Vector Compare Not Equal Halfword
> vcmpnew - Vector Compare Not Equal Word
>
> Sign
On Wed, Sep 28, 2016 at 11:15:16AM +0530, Rajalakshmi Srinivasaraghavan wrote:
> From: Avinesh Kumar
>
> cmpl: invalid bit mask should be 0x0041
> bctar: invalid bit mask should be 0xE000
>
> Signed-off-by: Avinesh Kumar
> Signed-off-by: Rajalakshmi Srinivasaraghavan
>
Applied to ppc
On Wed, Sep 28, 2016 at 11:15:13AM +0530, Rajalakshmi Srinivasaraghavan wrote:
> From: Vasant Hegde
>
> vmul10uq : Vector Multiply-by-10 Unsigned Quadword VX-form
> vmul10euq : Vector Multiply-by-10 Extended Unsigned Quadword VX-form
> vmul10cuq : Vector Multiply-by-10 & write Carry Unsigned Qua
On Wed, Sep 28, 2016 at 11:15:18AM +0530, Rajalakshmi Srinivasaraghavan wrote:
> The following vector instructions are added from ISA 3.0.
>
> vclzlsbb - Vector Count Leading Zero Least-Significant Bits Byte
> vctzlsbb - Vector Count Trailing Zero Least-Significant Bits Byte
>
> Signed-off-by: Ra
On Wed, Sep 28, 2016 at 11:01:20AM +0530, Nikunj A Dadhania wrote:
> From: Ravi Bangoria
>
> mtvsrdd: Move To VSR Double Doubleword
>
> Signed-off-by: Ravi Bangoria
> Signed-off-by: Nikunj A Dadhania
> ---
> target-ppc/translate/vsx-impl.inc.c | 23 +++
> target-ppc/transl
On Wed, Sep 28, 2016 at 11:01:22AM +0530, Nikunj A Dadhania wrote:
> Load 8byte at a time and manipulate.
>
> Big-Endian Storage
> +-+-+-+-+
> | 00 11 22 33 | 44 55 66 77 | 88 99 AA BB | CC DD EE FF |
> +-+-+-+
On Wed, Sep 28, 2016 at 10:08:06AM -0700, Richard Henderson wrote:
> On 09/27/2016 10:45 PM, Rajalakshmi Srinivasaraghavan wrote:
> > +return count;
> > +}
> > +target_ulong helper_vctzlsbb(ppc_avr_t *r)
> > +{
>
> ...
>
> > +return count;
> > +}
> > void helper_vmhaddshs(CPUPPCState *en
On Wed, Sep 28, 2016 at 01:21:00PM -0700, Richard Henderson wrote:
> On 09/28/2016 11:41 AM, Nikunj A Dadhania wrote:
> > +tcg_gen_mov_i64(t0, cpu_gpr[rA(ctx->opcode)]);
> > +tcg_gen_deposit_i64(cpu_vsrl(xT(ctx->opcode)), t0, t0, 32, 32);
>
> Why are you using t0?
Richard, I don't quite u
On Wed, 09/28 18:11, Max Reitz wrote:
> On 28.09.2016 09:04, Fam Zheng wrote:
> > Handling this is similar to what is done to the L2 entry in the case of
> > compressed clusters.
> >
> > Signed-off-by: Fam Zheng
> > ---
> > block/qcow2-cluster.c | 9 +
> > block/qcow2.c | 3 ++-
>
+Guangrong
On 08/25/2016 11:53 AM, Kirti Wankhede wrote:
> VFIO IOMMU drivers are designed for the devices which are IOMMU capable.
> Mediated device only uses IOMMU APIs, the underlying hardware can be
> managed by an IOMMU domain.
>
> Aim of this change is:
> - To use most of the code of TYPE1
Richard Henderson writes:
> On 09/28/2016 11:41 AM, Nikunj A Dadhania wrote:
>> +tcg_gen_mov_i64(t0, cpu_gpr[rA(ctx->opcode)]);
>> +tcg_gen_deposit_i64(cpu_vsrl(xT(ctx->opcode)), t0, t0, 32, 32);
>
> Why are you using t0?
Thought about dropping it, but wasn't sure if deposit_i64 would ch
On Tue, Sep 27, 2016 at 09:09:49PM -0700, Ashish Mittal wrote:
> This patch adds support for a new block device type called "vxhs".
> Source code for the library that this code loads can be downloaded from:
> https://github.com/MittalAshish/libqnio.git
>
> Sample command line using JSON syntax:
>
On Tue, Sep 27, 2016 at 09:09:49PM -0700, Ashish Mittal wrote:
> This patch adds support for a new block device type called "vxhs".
> Source code for the library that this code loads can be downloaded from:
> https://github.com/MittalAshish/libqnio.git
>
> Sample command line using JSON syntax:
>
On 2016年09月26日 18:35, Thomas Huth wrote:
On 26.09.2016 03:58, Brad Smith wrote:
Update the tap-bsd code now that OpenBSD uses tap(4).
Signed-off-by: Brad Smith
diff --git a/net/tap-bsd.c b/net/tap-bsd.c
index c506ac3..8d0f049 100644
--- a/net/tap-bsd.c
+++ b/net/tap-bsd.c
@@ -55,11 +55,7 @
On Wed, Sep 28, 2016 at 01:16:30PM +0200, Thomas Huth wrote:
> KVM-PR currently does not support transactional memory, and the
> implementation in TCG is just a fake. We should not announce TM
> support in the ibm,pa-features property when running on such a
> system, so disable it by default and on
On Wed, Sep 28, 2016 at 03:07:31PM +0200, Cédric Le Goater wrote:
> On 09/28/2016 01:16 PM, Thomas Huth wrote:
> > The function spapr_populate_cpu_dt() has become quite big
> > already, and since we likely have to extend the pa-features
> > property for every new processor generation, it is nicer
>
hw/nios2/cpu_pic.c | 70 +++
Why is this in this patch?
target-nios2/instruction.c | 1427
target-nios2/instruction.h | 279 +
target-nios2/translate.c | 242
Why are these files separate?
+if (n < 32)
2016-09-29 1:05 GMT+08:00 Eduardo Habkost :
> On Wed, Sep 28, 2016 at 04:36:14PM +0800, Wanpeng Li wrote:
[...]
>
> We still need to report unknown xstate components as unmigratable
> (otherwise -cpu host will enable them automatically). See the fix
> I submitted:
> [PATCH] target-i386: Report kn
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Message-id: cover.1475102513.git.alistair.fran...@xilinx.com
Subject: [Qemu-devel] [PATCH v12 0/2] Add a generic
s390 is one of the very few users of QOM class properties (as opposed
to instance properties). In anticipation of removing support for
class properties, convert s390 to use instance properties instead.
Signed-off-by: David Gibson
---
target-s390x/cpu.c| 1 -
target-s390x/cpu_models.c |
QOM allows both object class properties as well as object instance
properties. object class properties were never much used, and provide
no real benefit. Note that it's only the *existence* of such
properties that's established on a per-class basis - the way the
accessors work, the property's *va
There are no-longer any users of QOM class properties (as opposed to
instance properties). In anticipation of removing support for them,
remove tests for them from the testsuite.
Signed-off-by: David Gibson
---
tests/check-qom-proplist.c | 30 ++
1 file changed, 10 i
qcrypto is one of the few users of QOM class properties, as opposed to
instance properties. In anticipation of removing class properties,
convert qcrypto to use instance properties instead.
Signed-off-by: David Gibson
---
crypto/secret.c | 58 +++---
QOM has the concept of both "object class" properties and "object
instance" properties.
The accessor functions installed for the rarely-used class properties
still take an Object *, so the *value* of such properties is still
per-instance; it's just the *existence* (and type) of the property
that i
On Tue, 27 Sep 2016, Eric Blake wrote:
> On 09/27/2016 04:20 AM, Fam Zheng wrote:
> > 9c5ce8db2 switched the type of qemu_uuid and this should have followed.
> > Fix it.
> >
> > Signed-off-by: Fam Zheng
> > ---
> > hw/xenpv/xen_domainbuild.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion
This adds one generated header, and a couple of testcase binaries to the
.gitignore files, which haven't yet been included.
Signed-off-by: David Gibson
---
.gitignore | 1 +
tests/.gitignore | 2 ++
2 files changed, 3 insertions(+)
diff --git a/.gitignore b/.gitignore
index c91d018..1babc
Seth K writes:
> I need to simulate 3 chips that are on one board and that talk to each
> other through UART, SPI and GPIO. The chips verify each other's work, and I
> need to be able to observe this communication for debugging. Can something
> like this be done in QEMU?
As Peter has mentioned
On 28 September 2016 at 12:43, Paolo Bonzini wrote:
> The following changes since commit 7cfdc02dae0d2ff58c897496cfdbbafc0eda0f3f:
>
> Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
> (2016-09-26 19:47:00 +0100)
>
> are available in the git repository at:
>
> git://
On 17 September 2016 at 18:20, Felix Janda wrote:
> Signed-off-by: Felix Janda
> ---
> linux-user/mmap.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/linux-user/mmap.c b/linux-user/mmap.c
> index c4371d9..4882816 100644
> --- a/linux-user/mmap.c
> +++ b/linux-user
On Tue, Sep 27, 2016 at 7:04 PM, Markus Armbruster wrote:
> Alistair Francis writes:
>
>> On Tue, Sep 27, 2016 at 8:40 AM, Markus Armbruster wrote:
>>> Paolo Bonzini writes:
>>>
It does whatever cpu_physical_memory_write_rom (and hence
cpu_memory_rw_debug, which has more callers) do.
Add a generic loader to QEMU which can be used to load images or set
memory values.
Internally inside QEMU this is a device. It is a strange device that
provides no hardware interface but allows QEMU to monkey patch memory
specified when it is created. To be able to do this it has a reset
callback
On Wed, 28 Sep 2016 12:59:59 -0700
Neo Jia wrote:
> On Wed, Sep 28, 2016 at 07:45:38PM +, Tian, Kevin wrote:
> > > From: Neo Jia [mailto:c...@nvidia.com]
> > > Sent: Thursday, September 29, 2016 3:23 AM
> > >
> > > On Thu, Sep 22, 2016 at 03:26:38PM +0100, Daniel P. Berrange wrote:
> > > >
This work is based on the original work by Li Guang with extra
features added by Peter C and myself.
The idea of this loader is to allow the user to load multiple images
or values into QEMU at startup.
Memory values can be loaded like this: -device
loader,addr=0xfd1a0104,data=0x800e,data-len
Signed-off-by: Alistair Francis
Reviewed-by: Peter Maydell
---
V11:
- Fix corrections
V10:
- Split the data loading and PC setting
V9:
- Clarify the image loading options
V8:
- Improve documentation
V6:
- Fixup documentation
V4:
- Re-write to be more comprehensive
docs/generic-loader.txt
On Wed, 28 Sep 2016 13:06:31 -0700
Neo Jia wrote:
> On Wed, Sep 28, 2016 at 01:55:47PM -0600, Alex Williamson wrote:
> > On Wed, 28 Sep 2016 12:22:35 -0700
> > Neo Jia wrote:
> >
> > > On Thu, Sep 22, 2016 at 03:26:38PM +0100, Daniel P. Berrange wrote:
> > > > On Thu, Sep 22, 2016 at 08:19:
Hello,
Dr. David Alan Gilbert, on Wed 28 Sep 2016 19:00:45 +0100, wrote:
> I can see that migrating a VM with slirp makes sense (actually more
> commonly saving a VM with slirp to a file); but when that happens
> aren't you likely to lose all the network connections anyway?
Yes.
> If that's the
On 28 September 2016 at 11:15, Stefan Hajnoczi wrote:
> The following changes since commit 25930ed60aad49f1fdd7de05272317c86ce1275b:
>
> Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into
> staging (2016-09-27 23:10:12 +0100)
>
> are available in the git repository at:
>
On 28 September 2016 at 14:31, Seth K wrote:
> I need to simulate 3 chips that are on one board and that talk to each
> other through UART, SPI and GPIO. The chips verify each other's work, and I
> need to be able to observe this communication for debugging. Can something
> like this be done in QE
On Tue, Sep 27, 2016 at 09:09:49PM -0700, Ashish Mittal wrote:
Review of .bdrv_open() and .bdrv_aio_writev() code paths.
The big issues I see in this driver and libqnio:
1. Showstoppers like broken .bdrv_open() and leaking memory on every
reply message.
2. Insecure due to missing input valida
From: Lluís Vilanova
Every time a vCPU is hot-plugged, it will "inherit" its tracing state
from the global state array. That is, if *any* existing vCPU has an
event enabled, new vCPUs will have too.
Signed-off-by: Lluís Vilanova
Message-id: 147428970768.15111.7664565956870423529.st...@fimbulvet
From: "Daniel P. Berrange"
The trace points for hw/virtio/virtio-balloon.c were mistakenly put
in the top level trace-events file, instead of util/trace-events in
commit 270ab88f7c1112389a02cee0e3e03b20fcc7547e
Author: Daniel P. Berrange
Date: Thu Jun 16 09:39:57 2016 +0100
trace:
From: "Daniel P. Berrange"
The trace points for hw/mem/pc-dimm.c were mistakenly put
in the hw/i386/trace-events file, instead of hw/mem/trace-events
in
commit 5eb76e480b42206d3640c1aab8a376ba350f70bb
Author: Daniel P. Berrange
Date: Thu Jun 16 09:40:10 2016 +0100
trace: split out
From: Lluís Vilanova
Signals the hot-plugging of a new virtual (guest) CPU.
Signed-off-by: Lluís Vilanova
Message-id: 147428971313.15111.18023030883528426840.st...@fimbulvetr.bsc.es
Signed-off-by: Stefan Hajnoczi
---
trace-events | 8
trace/control-target.c | 3 +++
2 files
From: Lluís Vilanova
Signals the reset of the state a virtual (guest) CPU.
Signed-off-by: Lluís Vilanova
Message-id: 147428971851.15111.8799439252178273840.st...@fimbulvetr.bsc.es
Signed-off-by: Stefan Hajnoczi
---
qom/cpu.c| 3 +++
trace-events | 5 +
2 files changed, 8 insertions(+)
From: Lluís Vilanova
Explicitly state in which execution mode (user, softmmu, all) are guest
events available for tracing.
Signed-off-by: Lluís Vilanova
Message-id: 147456962135.4.6146034359114598596.st...@fimbulvetr.bsc.es
Signed-off-by: Stefan Hajnoczi
---
trace-events | 3 +++
1 file c
From: "Daniel P. Berrange"
The trace points for util/buffer.c were mistakenly put
in the io/trace-events file, instead of util/trace-events
in
commit 892bd32ea38bbe9709ff0b6db3053bdf06eec9fb
Author: Daniel P. Berrange
Date: Thu Jun 16 09:39:50 2016 +0100
trace: split out trace even
From: "Daniel P. Berrange"
The trace points for util/qemu-coroutine*.c were mistakenly left
in the top level trace-events file, instead of util/trace-events
in
commit 492bb2dd651e780c0723580880acbedb5661e5ad
Author: Daniel P. Berrange
Date: Thu Jun 16 09:39:48 2016 +0100
trace: spl
The following changes since commit 25930ed60aad49f1fdd7de05272317c86ce1275b:
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into
staging (2016-09-27 23:10:12 +0100)
are available in the git repository at:
git://github.com/stefanha/qemu.git tags/tracing-pull-request
f
I need to simulate 3 chips that are on one board and that talk to each
other through UART, SPI and GPIO. The chips verify each other's work, and I
need to be able to observe this communication for debugging. Can something
like this be done in QEMU?
My first thought was to create the chip then crea
By adding an optional suffix to the files used for communication with a
VM, we can launch multiple VM instances concurrently.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/iotests.py | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/iotests.py b/tests
Drop the use of legacy options in favor of the SocketAddress
representation, even for internal use (i.e. for storing the result of
the filename parsing).
Signed-off-by: Max Reitz
---
block/nbd.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/bloc
Instead of inlining this nice macro (i.e. resorting to
qdict_put_obj(..., QOBJECT(...))), use it.
Signed-off-by: Max Reitz
---
block/nbd.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/block/nbd.c b/block/nbd.c
index c77a969..c539fb5 100644
--- a/block/nbd.c
+
Signed-off-by: Max Reitz
---
tests/qemu-iotests/147 | 201 +
tests/qemu-iotests/147.out | 5 ++
tests/qemu-iotests/group | 1 +
3 files changed, 207 insertions(+)
create mode 100755 tests/qemu-iotests/147
create mode 100644 tests/qemu-iotest
Instead of not emitting the port in nbd_refresh_filename(), just set it
to the default if the user did not specify it. This makes the logic a
bit simpler.
Signed-off-by: Max Reitz
---
block/nbd.c | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/block/nbd.c
Add a new option "address" to the NBD block driver which accepts a
SocketAddress.
"path", "host" and "port" are still supported as legacy options and are
mapped to their corresponding SocketAddress representation.
Signed-off-by: Max Reitz
---
block/nbd.c | 166
Signed-off-by: Max Reitz
---
qapi/block-core.json | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/qapi/block-core.json b/qapi/block-core.json
index 9d797b8..54e3a6a 100644
--- a/qapi/block-core.json
+++ b/qapi/block-core.json
@@ -1708,14 +1708,15 @@
This gives us more freedom about the fd that is passed to qemu, allowing
us to e.g. pass sockets.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/socket_scm_helper.c | 29 ++---
1 file changed, 18 insertions(+), 11 deletions(-)
diff --git a/tests/qemu-iotests/socket_scm_
This series adds blockdev-add support for NBD clients.
Good news in v4: The total diffstat changed from 443+/98- to 407+/106-.
Bad news in v4: 10/12 patches have functional differences from v3.
Patches 1, 2, 3, and 4 are minor patches with no functional relation to
this series, other than the f
Signed-off-by: Max Reitz
---
tests/qemu-iotests/iotests.py | 8
1 file changed, 8 insertions(+)
diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py
index 3329bc1..5a2678f 100644
--- a/tests/qemu-iotests/iotests.py
+++ b/tests/qemu-iotests/iotests.py
@@ -39,6 +39,1
Right now, we have four possible options that conflict with specifying
an NBD filename, and a future patch will add another one ("address").
This future option is a nested QDict that is flattened at this point,
requiring us to test each option whether its key has an "address."
prefix. Therefore, we
Currently, a port that is passed along with a UNIX socket path is
silently ignored. That is not exactly ideal, it should be an error
instead.
Signed-off-by: Max Reitz
---
block/nbd.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/block/nbd.c b/block/nbd.c
index ce7c14
Signed-off-by: Max Reitz
---
block/nbd.c | 4 ++--
tests/qemu-iotests/051.out| 4 ++--
tests/qemu-iotests/051.pc.out | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/block/nbd.c b/block/nbd.c
index 6bc06d6..ce7c14f 100644
--- a/block/nbd.c
+++ b/block
With qemu-nbd's new --fork option, we no longer need to launch it the
hacky way.
Suggested-by: Sascha Silbe
Signed-off-by: Max Reitz
---
tests/qemu-iotests/162 | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/162 b/tests/qemu-iotests/162
index 0b43ea3..c7
On Wed, Sep 28, 2016 at 04:31:25PM -0400, Laine Stump wrote:
> On 09/28/2016 03:59 PM, Neo Jia wrote:
> > On Wed, Sep 28, 2016 at 07:45:38PM +, Tian, Kevin wrote:
> > > > From: Neo Jia [mailto:c...@nvidia.com]
> > > > Sent: Thursday, September 29, 2016 3:23 AM
> > > >
> > > > On Thu, Sep 22, 2
Using the --fork option, one can make qemu-nbd fork the worker process.
The original process will exit on error of the worker or once the worker
enters the main loop.
Suggested-by: Sascha Silbe
Signed-off-by: Max Reitz
---
qemu-nbd.c| 17 -
qemu-nbd.texi | 2 ++
2 files cha
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