On 28 September 2016 at 14:31, Seth K <skint...@gmail.com> wrote: > I need to simulate 3 chips that are on one board and that talk to each > other through UART, SPI and GPIO. The chips verify each other's work, and I > need to be able to observe this communication for debugging. Can something > like this be done in QEMU?
Unfortunately not with current upstream. Each QEMU instance can only have one CPU (which might have several cores in it, but they all have to be the same). > My first thought was to create the chip then create a board/machine with 1 > chip, and run 3 instances of QEMU on the host and have them talk to each > other via the host (/dev/uart7 for example) but that doesn't seem to be > possible. It seems QEMU cannot output 8 UARTS (I can't get more than 1) or > any GPIOs. Is that correct? Not sure about SPIs either. There's no well defined way to expose any kind of QEMU internal construct like a GPIO line or SPI bus to the outside, in upstream. Obviously you could hack something together. thanks -- PMM
