On Thu, 06/25 13:12, Stefan Hajnoczi wrote:
> The BlockJobTxn unit test verifies that both single jobs and pairs of
> jobs behave as a transaction group. Either all jobs complete
> successfully or the group is cancelled.
>
> Signed-off-by: Stefan Hajnoczi
Reviewed-by: Fam Zheng
> ---
> tests
On Fri, Jun 26, 2015 at 03:38:41PM +1000, David Gibson wrote:
> > + */
> > +static void spapr_validate_node_memory(MachineState *machine)
> > +{
> > +int i;
> > +sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
> > +
> > +if (machine->maxram_size % SPAPR_MEMORY_BLOCK_SIZE ||
>
On 06/24/2015 11:56 PM, Thomas Huth wrote:
> So far it is not possible to dump network traffic with the "-netdev"
> option yet - this is only possible with the "-net" option and an
> internal "hub".
> This patch now fixes this ugliness by adding a proper, generic
> dumpfile parameter to the "-net
Hi Dave,
On 06/16/2015 06:26 PM, Dr. David Alan Gilbert (git) wrote:
From: "Dr. David Alan Gilbert"
[...]
+= Postcopy =
+'Postcopy' migration is a way to deal with migrations that refuse to converge;
+its plus side is that there is an upper bound on the amount of migration
traffic
+and time
On Thu, 06/25 13:12, Stefan Hajnoczi wrote:
> Join the transaction when the backup block job is in incremental backup
> mode.
>
> This ensures that the sync bitmap is not thrown away if another block
> job in the transaction is cancelled or fails. This is critical so
> incremental backup with mul
On Thu, 06/25 13:12, Stefan Hajnoczi wrote:
> Provide a BlockJobTxn to actions executed in a qmp 'transaction'
> command. This allows actions to make their block jobs either complete
> as a group or fail/cancel together.
>
> The next patch adds the first user.
>
> Signed-off-by: Stefan Hajnoczi
On Thu, 06/25 13:12, Stefan Hajnoczi wrote:
> Sometimes block jobs must execute as a transaction group. Finishing
> jobs wait until all other jobs are ready to complete successfully.
> Failure or cancellation of one job cancels the other jobs in the group.
>
> Signed-off-by: Stefan Hajnoczi
Rev
On Thu, Jun 25, 2015 at 11:44:09AM +0530, Bharata B Rao wrote:
> Hi,
>
> This is v5 of memory hotplug support patchset for PowerPC
> sPAPR guests.
>
> This patchset applies on spapr-next branch of David Gibson's tree with
> the other prerequisite patchset applied. Pre-requistes patchset was
> pos
On 06/24/2015 11:56 PM, Thomas Huth wrote:
> Adding a proper receive_iov function to the net dump module. This
> will make it easier to support the dump feature for the -netdev
> option in later patches.
> Also make the receive functions available to the other parts of the
> source code so we can
On 2015-6-23 19:57, Markus Armbruster wrote:
> Ting Wang writes:
>
>> Hi Luiz and Markus,
>>
>> Would you like to pick up this patch, which has
>> been reviewed by Stefan and Fam?
>
> Looks like this fell through the cracks back in March. You should've
> asked for merge much earlier. Pinging
On Thu, 06/25 13:12, Stefan Hajnoczi wrote:
> Reclaim the dirty bitmap if an incremental backup block job is
> cancelled. The ret variable may be 0 when the job is cancelled so it's
> not enough to check ret < 0.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> block/backup.c | 2 +-
> 1 file changed
On Fri, Jun 26, 2015 at 03:33:29PM +1000, David Gibson wrote:
> On Thu, Jun 25, 2015 at 11:44:15AM +0530, Bharata B Rao wrote:
> > Currently PowerPC kernel doesn't allow hot-adding memory to memory-less
> > node, but instead will silently add the memory to the first node that has
> > some memory. T
On Thu, Jun 25, 2015 at 11:44:10AM +0530, Bharata B Rao wrote:
> Initialize a hotplug memory region under which all the hotplugged
> memory is accommodated. Also enable memory hotplug by setting
> CONFIG_MEM_HOTPLUG.
>
> Modelled on i386 memory hotplug.
>
> Signed-off-by: Bharata B Rao
Reviewed
On Thu, Jun 25, 2015 at 11:44:11AM +0530, Bharata B Rao wrote:
> Enable memory hotplug for pseries 2.4 and add LMB DR connectors.
> With memory hotplug, enforce RAM size, NUMA node memory size and maxmem
> to be a multiple of SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the
> granularity in which LM
On Thu, Jun 25, 2015 at 11:44:14AM +0530, Bharata B Rao wrote:
> Make use of pc-dimm infrastructure to support memory hotplug
> for PowerPC.
>
> Signed-off-by: Bharata B Rao
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.
On Thu, Jun 25, 2015 at 11:44:15AM +0530, Bharata B Rao wrote:
> Currently PowerPC kernel doesn't allow hot-adding memory to memory-less
> node, but instead will silently add the memory to the first node that has
> some memory. This causes two unexpected behaviours for the user.
>
> Memory gets ho
On Fri, Jun 26, 2015 at 09:35:59AM +0530, Bharata B Rao wrote:
> Hi,
>
> Here is the v3 of the patchset that refactors pc_dimm_plug and adds
> an API to lookup NUMA node by address.
>
> - Refactoring pc_dimm_plug() helps other architectures like PowerPC
> to make use of common code.
> - API to
On Thu, Jun 25, 2015 at 11:44:12AM +0530, Bharata B Rao wrote:
> Parse ibm,architecture.vec table obtained from the guest and enable
> memory node configuration via ibm,dynamic-reconfiguration-memory if guest
> supports it. This is in preparation to support memory hotplug for
> sPAPR guests.
>
> T
On Fri, Jun 26, 2015 at 09:36:03AM +0530, Bharata B Rao wrote:
> Store memory address range information of boot memory in address
> range list of numa_info.
>
> This helps to have a common NUMA node lookup by address function that
> works for both boot time memory and hotplugged memory.
>
> Sign
On Fri, Jun 26, 2015 at 09:36:00AM +0530, Bharata B Rao wrote:
> Move hotplug_memory_base and hotplug_memory fields of PCMachineState
> into a separate structure so that the same can be made use of from
> other architectures supporing memory hotplug.
>
> Signed-off-by: Bharata B Rao
Reviewed-by:
On Fri, Jun 26, 2015 at 09:36:01AM +0530, Bharata B Rao wrote:
> pc_dimm_plug() has code that will be needed for memory plug handlers
> in other archs too. Extract code from pc_dimm_plug() into a generic
> routine pc_dimm_memory_plug() that resides in pc-dimm.c. Also
> correspondingly refactor re-u
From: Greg Ungerer
Create a common set of definitions of address and register values for
ethernet MII phys. A few of the current ethernet drivers have at least
a partial set of these definitions. Others just use hard coded raw
constant numbers.
This initial set is copied directly from the allwin
From: Greg Ungerer
The network mcf_fec driver emulated receive side method is returning a
result of 0 causing the network layer to disable receive for this emulated
device. This results in the guest only ever receiving one packet.
Fix the recieve side processing to return the number of bytes tha
From: Greg Ungerer
Add a base set of bit definitions for the standard MII phy "Auto-Negotiation
Link Partner Ability Register" (ANLPAR).
The original definitions moved into mii.h from the allwinner_emac driver
did not define these.
Signed-off-by: Greg Ungerer
---
include/hw/net/mii.h | 7
From: Greg Ungerer
The Linux fec driver needs at least basic phy support to probe and work.
The current qemu mcf_fec emulation has no support for the reading or
writing of the MDIO lines to access an attached phy.
This code adds a very simple set of register results for a fixed phy
setup - very
The following set of patches fixes the emulated ColdFire ethernet fec
driver. There is primarily two problems that need to be fixed.
1. The emulated driver needs to support probing of an attached phy.
It is strait forward to emulate an attached phy, but to avoid using
magic numbers I have f
On Fri, Jun 26, 2015 at 09:36:03AM +0530, Bharata B Rao wrote:
> Store memory address range information of boot memory in address
> range list of numa_info.
>
> This helps to have a common NUMA node lookup by address function that
> works for both boot time memory and hotplugged memory.
>
> Sign
On 06/25/2015 10:22 PM, Thibaut Collet wrote:
> On Thu, Jun 25, 2015 at 2:53 PM, Michael S. Tsirkin wrote:
>> On Thu, Jun 25, 2015 at 01:01:29PM +0200, Thibaut Collet wrote:
>>> On Thu, Jun 25, 2015 at 11:59 AM, Jason Wang wrote:
On 06/24/2015 07:05 PM, Michael S. Tsirkin wrote:
Introduce an API numa_get_node(ram_addr_t addr, Error **errp) that
returns the NUMA node to which the given address belongs to. This
API works uniformly for both boot time as well as hotplugged memory.
This API is needed by sPAPR PowerPC to support
ibm,dynamic-reconfiguration-memory device tree no
Store memory address range information of boot memory in address
range list of numa_info.
This helps to have a common NUMA node lookup by address function that
works for both boot time memory and hotplugged memory.
Signed-off-by: Bharata B Rao
---
numa.c | 17 +
1 file changed,
pc_dimm_plug() has code that will be needed for memory plug handlers
in other archs too. Extract code from pc_dimm_plug() into a generic
routine pc_dimm_memory_plug() that resides in pc-dimm.c. Also
correspondingly refactor re-usable unplug code into pc_dimm_memory_unplug().
Signed-off-by: Bharata
Start storing the (start_addr, size, nodeid) of the pc-dimm memory
in numa_info so that this information can be used to lookup
node by address.
Signed-off-by: Bharata B Rao
Reviewed-by: David Gibson
---
hw/mem/pc-dimm.c | 4
include/sysemu/numa.h | 10 ++
numa.c
Hi,
Here is the v3 of the patchset that refactors pc_dimm_plug and adds
an API to lookup NUMA node by address.
- Refactoring pc_dimm_plug() helps other architectures like PowerPC
to make use of common code.
- API to lookup NUMA node id by address is required to support memory
hotplug on Power
Move hotplug_memory_base and hotplug_memory fields of PCMachineState
into a separate structure so that the same can be made use of from
other architectures supporing memory hotplug.
Signed-off-by: Bharata B Rao
---
hw/i386/acpi-build.c | 2 +-
hw/i386/pc.c | 26 +
On 06/26/2015 12:54 AM, Marcel Apfelbaum wrote:
> On 06/24/2015 11:00 AM, Jason Wang wrote:
>>
>>
>> On 06/19/2015 02:05 AM, Marcel Apfelbaum wrote:
>>> Clear host multi-queue related features if the peer
>>> doesn't support it.
>>>
>>> Signed-off-by: Marcel Apfelbaum
>>> ---
>>> Notes:
>>> Th
Hi,
On 06/24/2015 09:28 PM, Eduardo Otubo wrote:
Hello Zhu,
Are you still working on this feature? Could you provide a rebased
version of this series?
Sorry for late reply.
Yes, we are still working on this feature.
I have updated my github, you can get the rebased version from it.
https://
Fix pba_offset initialization value for Chelsio T5 Virtual Function
device. The T5 hardware has a bug in it where it reports a Pending Interrupt
Bit Array Offset of 0x8000 for its SR-IOV Virtual Functions instead
of the 0x1000 that the hardware actually uses internally. As the hardware
doesn't retu
On 25 June 2015 at 18:01, Frederic Konrad wrote:
> I just tested this with vexpress, seems ATOMIC is not defined by default it
> uses:
Wow nice catch! Somehow between revision the define was no longer
propagated and ATOMIC was not defined at all.
Tested with 8 cores and no more errors. As you sa
It's nice to keep the config.log used to configure the build.
Signed-off-by: Marc-André Lureau
---
configure | 35 +++
1 file changed, 19 insertions(+), 16 deletions(-)
diff --git a/configure b/configure
index 1626c2e..dcd15a9 100755
--- a/configure
+++ b/configu
On 2015-06-25 00:24, Yongbok Kim wrote:
> 64-bit paired-single (PS) floating point data type is optional in the
> pre-Release 6.
> It has to raise RI exception when PS type is not implemented. (FIR.PS = 0)
> (The PS data type is removed in the Release 6.)
> Loongson-2E and Loongson-2F don't have an
On 2015-06-25 00:24, Yongbok Kim wrote:
> microMIPS32 Release 6 POOL16A/ POOL16C instructions
>
> Signed-off-by: Yongbok Kim
> Reviewed-by: Aurelien Jarno
> ---
> target-mips/translate.c | 133 +-
> 1 files changed, 118 insertions(+), 15 deletions(-)
| From: Alex Williamson [alex.william...@redhat.com]
| Sent: Thursday, June 25, 2015 1:57 PM
|
| We expose [the PBA Offset] to the guest VM, but the guest probably
| doesn't consume it, I don't know of any drivers that do.
Ah, okay. You're doing this for the Hypervisor traps of accesses
to the
Am 25.06.2015 um 23:08 schrieb Paolo Bonzini:
>
> On 16/06/2015 13:45, Peter Lieven wrote:
>> libiscsi starting with 1.15 will properly support timeout of iscsi
>> commands. The default will remain no timeout, but this can
>> be changed via cmdline parameters, e.g.:
>>
>> qemu -iscsi timeout=30 -dr
Hi Alex, the issue is that the T5 hardware has a bug in it where it reports a
Pending Interrupt Bit Array Offset of 0x8000 for its SR-IOV Virtual Functions
instead of the 0x1000 that the hardware actually uses internally. (There was a
mistaken <<3 used in the IP Glue Logic for the PCI Configu
Oh, and by the way, I've already asked Gabriel to respin the patch because
the quirk incorrectly trips for all T5 Functions instead of only for T5 Virtual
Functions. So you should reject the first patch regardless. Thanks!
Casey
From: Casey Leedom
Se
On 16/06/2015 13:45, Peter Lieven wrote:
> libiscsi starting with 1.15 will properly support timeout of iscsi
> commands. The default will remain no timeout, but this can
> be changed via cmdline parameters, e.g.:
>
> qemu -iscsi timeout=30 -drive file=iscsi://...
>
> If a timeout occurs a reco
On Thu, 2015-06-25 at 20:22 +, Casey Leedom wrote:
> Oh, and by the way, I've already asked Gabriel to respin the patch
> because the quirk incorrectly trips for all T5 Functions instead of
> only for T5 Virtual Functions. So you should reject the first patch
> regardless. Thanks!
>
> Case
On 25/06/2015 20:07, Programmingkid wrote:
> I honestly think it is in the right place. The function find_image_format()
> is doing just that - trying to find the format. The image part of the
> function's name
> does bother me. But we could ignore it. Since we know it is a real cdrom
> drive,
On Thu, 25 Jun 2015 18:41:31 +0200
Cornelia Huck wrote:
> On Thu, 25 Jun 2015 18:34:47 +0200
> Cornelia Huck wrote:
>
> > On Thu, 25 Jun 2015 17:26:21 +0200
> > Greg Kurz wrote:
> >
> > > This field comes either LE with virtio 1.0, either guest endian with
> > > legacy.
> > > It must only be
On Tue, Jun 23, 2015 at 02:13:21PM +0200, Piotr Rybicki wrote:
Hello.
Problem description:
When i start qemu via libvirt with vnc websocket defined, it is not
possible to live migrate to host where other qemu process is running
with the same display id.
migration error is:
error: internal err
On Thu, 2015-06-18 at 21:37 +1000, Alexey Kardashevskiy wrote:
> This enables multiple IOMMU groups in one VFIO container which means
> that multiple devices from different groups can share the same IOMMU
> table (or tables if DDW).
>
> This removes a group id from vfio_container_ioctl(). The kern
On Wed, 2015-06-24 at 20:52 +1000, Alexey Kardashevskiy wrote:
> On 06/23/2015 04:44 PM, David Gibson wrote:
> > On Thu, Jun 18, 2015 at 09:37:22PM +1000, Alexey Kardashevskiy wrote:
> >>
> >> (cut-n-paste from kernel patchset)
> >>
> >> Each Partitionable Endpoint (IOMMU group) has an address rang
Currently if qemu is connected to a curl source (eg. web server), and
the web server fails / times out / dies, you always see a bogus EIO
"Input/output error".
For example, choose a large file located on any local webserver which
you control:
$ qemu-img convert -p http://example.com/large.iso /
On Thu, 2015-06-25 at 19:00 +, Gabriel Laupre wrote:
> @Bandan
> > Is the array offset guaranteed to always be the same ?
> The returned value depends on the physical function and should be 0x1000 for
> the T5 series. Therefore this offset is guaranteed to always be the same.
>
> > What are t
current_number being shift left by more than 32 bits, we can't use a
simple int. Similarly use an int64_t type for the input binary value,
to not get the -2^31 case wrong. Finally don't initialize shift to 4,
it's already done in the for loop.
Signed-off-by: Aurelien Jarno
Cc: Alexander Graf
Cc:
@Bandan
> Is the array offset guaranteed to always be the same ?
The returned value depends on the physical function and should be 0x1000 for
the T5 series. Therefore this offset is guaranteed to always be the same.
> What are the chances of this getting fixed by a firmware update ? :)
It isn't a
On Sun, Jun 07, 2015 at 11:15:08AM +0200, Jan Kiszka wrote:
> From: Jan Kiszka
>
> ARAT signals that the APIC timer does not stop in power saving states.
> As our APICs are emulated, it's fine to expose this feature to guests,
> at least when asking for KVM host features or with CPU types that
>
On Jun 25, 2015, at 12:16 PM, Paolo Bonzini wrote:
>
>
> On 25/06/2015 18:12, Laurent Vivier wrote:
>>
>>
>> On 25/06/2015 17:48, Paolo Bonzini wrote:
>>>
>>> On 25/06/2015 17:32, Programmingkid wrote:
> I think we are going to have to agree to disagree. I have never
> used the /dev/
On 25 June 2015 at 18:56, Programmingkid wrote:
> Nice to hear from you again Laurent. The only way a solution in
> hdev_open() would work is if it could prevent find_image_format()
> from executing. Otherwise find_image_format() would just quit QEMU
> with an error.
The question you should be as
On 25/06/2015 19:56, Programmingkid wrote:
>> In fact, programmingkid, you should fix it in hdev_open() where
>> there is already a #if __APPLE__ .
>
> Nice to hear from you again Laurent. The only way a solution in
> hdev_open() would work is if it could prevent find_image_format()
> from execu
On Jun 25, 2015, at 11:48 AM, Paolo Bonzini wrote:
>
> On 25/06/2015 17:32, Programmingkid wrote:
>>> I think we are going to have to agree to disagree. I have never
>>> used the /dev/sr(0 | 1) devices and don't see how they would be
>>> effected by this patch. Are you trying to say the /dev/sr(
On Jun 25, 2015, at 12:12 PM, Laurent Vivier wrote:
>
>
> On 25/06/2015 17:48, Paolo Bonzini wrote:
>>
>> On 25/06/2015 17:32, Programmingkid wrote:
I think we are going to have to agree to disagree. I have never
used the /dev/sr(0 | 1) devices and don't see how they would be
ef
Remove traditional auto-converge static 30ms throttling code and replace it
with a dynamic throttling algorithm.
Additionally, be more aggressive when deciding when to start throttling.
Previously we waited until four unproductive memory passes. Now we begin
throttling after only two unproductive
Provide a method to throttle guest cpu execution. CPUState is augmented with
timeout controls and throttle start/stop functions. To throttle the guest cpu
the caller simply has to call the throttle set function and provide a percentage
of throttle time.
Signed-off-by: Jason J. Herne
Reviewed-by:
Report throttle percentage in info migrate and query-migrate responses when
cpu throttling is active.
Signed-off-by: Jason J. Herne
---
hmp.c | 5 +
migration/migration.c | 5 +
qapi-schema.json | 7 ++-
3 files changed, 16 insertions(+), 1 deletion(-)
diff --gi
This patch set provides a new method for throttling a vcpu and makes use of said
method to dynamically increase cpu throttling during an autoconverge
migration until the migration completes.
The method used here for throttling vcpus is likely not the best. However, I
believe that it is preferable
Migration has a define for MAX_THROTTLE. Update comment to clarify that this is
used for throttling transfer speed. Hopefully this will prevent it from being
confused with a guest cpu throttling entity.
Signed-off-by: Jason J. Herne
---
migration/migration.c | 2 +-
1 file changed, 1 insertion(+
Add migration parameters to allow the user to adjust the parameters
that control cpu throttling when auto-converge is in effect. The added
parameters are as follows:
x-cpu-throttle-initial : Initial percantage of time guest cpus are throttled
when migration auto-converge is activated.
x-cpu-throt
On Wed, Jun 24, 2015 at 02:11:27PM +0200, Paolo Bonzini wrote:
> The TSC frequency fits comfortably in an int when expressed in kHz,
> but it may overflow when converted to Hz. In this case,
> tsc-frequency returns a negative value because x86_cpuid_get_tsc_freq
> does a 32-bit multiplication befo
On 25/06/2015 19:32, Peter Maydell wrote:
> On 25 June 2015 at 18:27, Paolo Bonzini wrote:
>> On 25/06/2015 19:08, Andreas Färber wrote:
>>> And is installing a separate address space per CPU for KVM difficult due
>>> to kernel limitations, or is this just a few lines of QEMU code that Zhu
>>> o
On 25 June 2015 at 18:27, Paolo Bonzini wrote:
> On 25/06/2015 19:08, Andreas Färber wrote:
>> And is installing a separate address space per CPU for KVM difficult due
>> to kernel limitations, or is this just a few lines of QEMU code that Zhu
>> or someone would need to write? :)
>
> It's basical
Am 25.06.2015 um 19:00 schrieb Paolo Bonzini:
> On 25/06/2015 04:17, Zhu Guihua wrote:
>> Add a wrapper to specify reset order when registering reset handler,
>> instead of non-obvious initiazation code ordering.
>>
>> Signed-off-by: Zhu Guihua
>
> I'm sorry, this is not really acceptable. The i
On 25/06/2015 19:08, Andreas Färber wrote:
> > I said "I think this patch is incorrect, because you do not install a
> > separate address space for each CPU. Also, the CPU address space is
> > only used with TCG so it should be guarded by "if (tcg_enabled())"."
> >
> > By the way, now TCG _is_
On 25/06/2015 18:16, Paolo Bonzini wrote:
>
>
> On 25/06/2015 18:12, Laurent Vivier wrote:
>>
>>
>> On 25/06/2015 17:48, Paolo Bonzini wrote:
>>>
>>> On 25/06/2015 17:32, Programmingkid wrote:
> I think we are going to have to agree to disagree. I have never
> used the /dev/sr(0 | 1) de
On 06/23/2015 01:56 PM, Michael S. Tsirkin wrote:
On Tue, Jun 23, 2015 at 01:23:10PM +0300, Marcel Apfelbaum wrote:
On 06/23/2015 12:57 PM, Michael S. Tsirkin wrote:
On Thu, Jun 18, 2015 at 09:05:44PM +0300, Marcel Apfelbaum wrote:
Clear host multi-queue related features if the peer
doesn't su
On 23 June 2015 at 19:15, Peter Maydell wrote:
> On 23 June 2015 at 08:31, Frederic Konrad wrote:
>> The normal boot with "-smp 4" and a smp 4 guest is slow and become a lot
>> faster
>> when I enable the window (which have timer callbacks and refresh the screen
>> regularly)
>
> Is it just overa
Am 25.06.2015 um 19:02 schrieb Paolo Bonzini:
> On 25/06/2015 18:10, Andreas Färber wrote:
>> Am 25.06.2015 um 18:02 schrieb Paolo Bonzini:
>>> On 25/06/2015 18:00, Andreas Färber wrote:
> -if (!mmio_registered) {
> -ICCBus *b = ICC_BUS(qdev_get_parent_bus(dev));
> -
On Thu, 25 Jun 2015 18:34:47 +0200
Cornelia Huck wrote:
> On Thu, 25 Jun 2015 17:26:21 +0200
> Greg Kurz wrote:
>
> > This field comes either LE with virtio 1.0, either guest endian with legacy.
> > It must only be accessed with an accessor that knows about the appropriate
> > endianness.
> >
>
On 25/06/2015 18:10, Andreas Färber wrote:
> Am 25.06.2015 um 18:02 schrieb Paolo Bonzini:
>> On 25/06/2015 18:00, Andreas Färber wrote:
-if (!mmio_registered) {
-ICCBus *b = ICC_BUS(qdev_get_parent_bus(dev));
-memory_region_add_subregion(b->apic_address_space,
On 25/06/2015 04:17, Zhu Guihua wrote:
> Add a wrapper to specify reset order when registering reset handler,
> instead of non-obvious initiazation code ordering.
>
> Signed-off-by: Zhu Guihua
I'm sorry, this is not really acceptable. The initialization code
ordering is good because it should
Am 25.06.2015 um 04:17 schrieb Zhu Guihua:
> Add a wrapper to specify reset order when registering reset handler,
> instead of non-obvious initiazation code ordering.
"initialization", and this sentence is not really telling to me.
What issue is this solving or, more likely, working around?
In t
On 06/24/2015 11:00 AM, Jason Wang wrote:
On 06/19/2015 02:05 AM, Marcel Apfelbaum wrote:
Clear host multi-queue related features if the peer
doesn't support it.
Signed-off-by: Marcel Apfelbaum
---
Notes:
This fixes a guest CPU soft lock, however the virtio-net
device will not work corre
Am 25.06.2015 um 04:17 schrieb Zhu Guihua:
> From: Chen Fan
>
> After CPU hotplug has been converted to BUS-less hot-plug infrastructure,
> the only function ICC bus performs is to propagate reset to LAPICs. However
> LAPIC could be reset by registering its reset handler after all device are
> in
On Thu, 25 Jun 2015 18:34:47 +0200
Cornelia Huck wrote:
> On Thu, 25 Jun 2015 17:26:21 +0200
> Greg Kurz wrote:
>
> > This field comes either LE with virtio 1.0, either guest endian with legacy.
> > It must only be accessed with an accessor that knows about the appropriate
> > endianness.
> >
On Thu, 25 Jun 2015 17:26:21 +0200
Greg Kurz wrote:
> This field comes either LE with virtio 1.0, either guest endian with legacy.
> It must only be accessed with an accessor that knows about the appropriate
> endianness.
>
> Signed-off-by: Greg Kurz
> ---
> hw/virtio/dataplane/vring.c |2
On Thu, Jun 25, 2015 at 12:30:56PM -0400, John Snow wrote:
>
>
> On 06/25/2015 08:53 AM, Stefan Hajnoczi wrote:
> > Reclaim the dirty bitmap if an incremental backup block job is
> > cancelled. The ret variable may be 0 when the job is cancelled so it's
> > not enough to check ret < 0.
> >
> >
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Hash: SHA256
On 06/25/2015 08:38 AM, Stefan Hajnoczi wrote:
> On Tue, Jun 23, 2015 at 12:17:40PM -0400, John Snow wrote:
>> Hi Kevin, ping?
>>
>> Will probably need to respin to update the deps (for new tests)
>> by now, but are you willing to take this series
On 06/25/2015 08:53 AM, Stefan Hajnoczi wrote:
> Reclaim the dirty bitmap if an incremental backup block job is
> cancelled. The ret variable may be 0 when the job is cancelled so it's
> not enough to check ret < 0.
>
> Reviewed-by: John Snow
> Reviewed-by: Max Reitz
> Signed-off-by: Stefan H
Am 25.06.2015 um 13:21 schrieb Peter Maydell:
> On 25 June 2015 at 12:12, Andreas Färber wrote:
>> Am 24.06.2015 um 21:11 schrieb Peter Maydell:
>>> On 24 June 2015 at 19:09, Andreas Färber wrote:
+g_assert(cc->set_pc != NULL);
+cc->set_pc(cpu, addr);
}
>>>
>>> Do we need
On Thu, Jun 04, 2015 at 08:20:34PM -0400, John Snow wrote:
> If we wish to make differential backups a feature that's easy to access,
> it might be pertinent to rename the "dirty-bitmap" mode to "incremental"
> to make it clear what /type/ of backup the dirty-bitmap is helping us
> perform.
>
> Th
On 25/06/2015 18:12, Laurent Vivier wrote:
>
>
> On 25/06/2015 17:48, Paolo Bonzini wrote:
>>
>> On 25/06/2015 17:32, Programmingkid wrote:
I think we are going to have to agree to disagree. I have never
used the /dev/sr(0 | 1) devices and don't see how they would be
effected by
Am 24.06.2015 um 19:32 schrieb Andreas Färber:
> Am 24.06.2015 um 04:10 schrieb Peter Crosthwaite:
>> On Thu, Jun 18, 2015 at 10:24 AM, Peter Crosthwaite
>> wrote:
>>> diff --git a/bsd-user/main.c b/bsd-user/main.c
>>> index 45a1436..7196285 100644
>>> --- a/bsd-user/main.c
>>> +++ b/bsd-user/main
On 25/06/2015 17:48, Paolo Bonzini wrote:
>
> On 25/06/2015 17:32, Programmingkid wrote:
>>> I think we are going to have to agree to disagree. I have never
>>> used the /dev/sr(0 | 1) devices and don't see how they would be
>>> effected by this patch. Are you trying to say the /dev/sr(0 | 1)
>>
Am 25.06.2015 um 18:02 schrieb Paolo Bonzini:
> On 25/06/2015 18:00, Andreas Färber wrote:
>>> -if (!mmio_registered) {
>>> -ICCBus *b = ICC_BUS(qdev_get_parent_bus(dev));
>>> -memory_region_add_subregion(b->apic_address_space, 0,
>>> &s->io_memory);
>>> -mmio_registere
On 22/06/2015 12:54, Alexander Spyridakis wrote:
Hello all,
You can find the latest tcg atomic test payload in the following repo:
> git clone https://git.virtualopensystems.com/dev/tcg_baremetal_tests.git
You also need an arm baremetal cross-compiler like arm-none-gnueabi-
(arm) and the usual
On 25/06/2015 18:00, Andreas Färber wrote:
>> -if (!mmio_registered) {
>> -ICCBus *b = ICC_BUS(qdev_get_parent_bus(dev));
>> -memory_region_add_subregion(b->apic_address_space, 0,
>> &s->io_memory);
>> -mmio_registered = true;
>> -}
>> +
>> +root = address_spa
Am 25.06.2015 um 04:17 schrieb Zhu Guihua:
> From: Chen Fan
>
> Replace mapping APIC at global system address space with
> mapping it at per-CPU address spaces.
>
> Signed-off-by: Chen Fan
> Signed-off-by: Zhu Guihua
> ---
> exec.c| 5 +
> hw/i386/pc.c | 7 -
On 25/06/2015 17:32, Programmingkid wrote:
>> I think we are going to have to agree to disagree. I have never
>> used the /dev/sr(0 | 1) devices and don't see how they would be
>> effected by this patch. Are you trying to say the /dev/sr(0 | 1)
>> devices *should* be handled by this patch?
>
> Th
On Jun 25, 2015, at 11:32 AM, Programmingkid wrote:
>
> On Jun 25, 2015, at 11:14 AM, Programmingkid wrote:
>
>>
>> On Jun 25, 2015, at 2:53 AM, Markus Armbruster wrote:
>>
>>> Programmingkid writes:
>>>
On Jun 23, 2015, at 2:06 PM, John Snow wrote:
>
>
> On 06/23/2
On Wed, Jun 24, 2015 at 08:12:52PM +0100, Peter Maydell wrote:
> On 24 June 2015 at 18:18, Alex Bennée wrote:
> >
> > Paolo Bonzini writes:
> >
> >> On 24/06/2015 17:34, Alex Bennée wrote:
> >>> Testing with Alexander's bare metal syncronisation tests fails in MTTCG
> >>> leaving one CPU spinning
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