[Qemu-devel] [PATCH 29/32] spapr_pci: enable basic hotplug operations

2015-04-30 Thread David Gibson
From: Michael Roth This enables hotplug of PCI devices to a PHB. Upon hotplug we generate the OF-nodes required by PAPR specification and IEEE 1275-1994 "PCI Bus Binding to Open Firmware" for the device. We associate the corresponding FDT for these nodes with the DRC corresponding to the slot, w

[Qemu-devel] [PATCH 15/32] hw/ppc/spapr: Use error_report() instead of hw_error()

2015-04-30 Thread David Gibson
From: Thomas Huth hw_error() is designed for printing CPU-related error messages (e.g. it also prints a full CPU register dump). For error messages that are not directly related to CPU problems, a function like error_report() should be used instead. Signed-off-by: Thomas Huth Signed-off-by: Dav

[Qemu-devel] [PATCH 23/32] spapr_events: re-use EPOW event infrastructure for hotplug events

2015-04-30 Thread David Gibson
From: Nathan Fontenot This extends the data structures currently used to report EPOW events to guests via the check-exception RTAS interfaces to also include event types for hotplug/unplug events. This is currently undocumented and being finalized for inclusion in PAPR specification, but we impl

[Qemu-devel] [PATCH 16/32] docs: add sPAPR hotplug/dynamic-reconfiguration documentation

2015-04-30 Thread David Gibson
From: Michael Roth This adds a general overview of hotplug/dynamic-reconfiguration for sPAPR/pSeries guest. As specified in PAPR+ v2.7. Signed-off-by: Michael Roth Reviewed-by: David Gibson Signed-off-by: David Gibson --- docs/specs/ppc-spapr-hotplug.txt | 287 ++

[Qemu-devel] [PATCH 10/32] spapr_pci: Rework device-tree rendering

2015-04-30 Thread David Gibson
From: Alexey Kardashevskiy This replaces object_child_foreach() and callback with existing SPAPR_PCI_LIOBN() and spapr_tce_find_by_liobn() to make the code easier to read. This is a mechanical patch so no behaviour change is expected. Signed-off-by: Alexey Kardashevskiy Signed-off-by: David Gi

[Qemu-devel] [PATCH 32/32] spapr: override default ram size to 512MB

2015-04-30 Thread David Gibson
From: Nikunj A Dadhania Signed-off-by: Nikunj A Dadhania Reviewed-by: Igor Mammedov Reviewed-by: Thomas Huth Acked-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/spapr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 4d66eef..3f67df8 10064

[Qemu-devel] [PATCH 08/32] spapr_pci: Make find_phb()/find_dev() public

2015-04-30 Thread David Gibson
From: Alexey Kardashevskiy This makes find_phb()/find_dev() public and changed its names to spapr_pci_find_phb()/spapr_pci_find_dev() as they are going to be used from other parts of QEMU such as VFIO DDW (dynamic DMA window) or VFIO PCI error injection or VFIO EEH handling - in all these cases t

[Qemu-devel] [PATCH 01/32] spapr_pci: Fix unsafe signed/unsigned comparisons

2015-04-30 Thread David Gibson
spapr_pci.c contains a number of expressions of the form (uval == -1) or (uval != -1), where 'uval' is an unsigned value. This mostly works in practice, because as long as the width of uval is greater or equal than that of (int), the -1 will be promoted to the unsigned type, which is the expected

[Qemu-devel] [PATCH 31/32] machine: add default_ram_size to machine class

2015-04-30 Thread David Gibson
From: Nikunj A Dadhania Machines types can have different requirement for default ram size. Introduce a member in the machine class and set the current default_ram_size to 128MB. For QEMUMachine types override the value during the registration of the machine and for MachineClass introduce the ge

[Qemu-devel] [PATCH 22/32] spapr_rtas: add ibm, configure-connector RTAS interface

2015-04-30 Thread David Gibson
From: Michael Roth This interface is used to fetch an OF device-tree nodes that describes a newly-attached device to guest. It is called multiple times to walk the device-tree node and fetch individual properties into a 'workarea'/buffer provided by the guest. The device-tree is generated by QEM

[Qemu-devel] [PATCH 25/32] spapr_drc: add spapr_drc_populate_dt()

2015-04-30 Thread David Gibson
From: Michael Roth This function handles generation of ibm,drc-* array device tree properties to describe DRC topology to guests. This will by used by the guest to direct RTAS calls to manage any dynamic resources we associate with a particular DR Connector as part of hotplug/unplug. Since gener

[Qemu-devel] [PATCH 30/32] spapr_pci: emit hotplug add/remove events during hotplug

2015-04-30 Thread David Gibson
From: Tyrel Datwyler This uses extension of existing EPOW interrupt/event mechanism to notify userspace tools like librtas/drmgr to handle in-guest configuration/cleanup operations in response to device_add/device_del. Userspace tools that don't implement this extension will need to be run manua

[Qemu-devel] [PATCH 06/32] spapr_pci: Define default DMA window size as a macro

2015-04-30 Thread David Gibson
From: Alexey Kardashevskiy This gets rid of a magic constant describing the default DMA window size for an emulated PHB. Signed-off-by: Alexey Kardashevskiy Signed-off-by: David Gibson --- hw/ppc/spapr_pci.c | 6 +++--- include/hw/pci-host/spapr.h | 2 ++ 2 files changed, 5 insertion

[Qemu-devel] [PATCH 13/32] pseries: Add pseries-2.4 machine type

2015-04-30 Thread David Gibson
Now that 2.4 development has opened, create a new pseries machine type variant. For now it is identical to the pseries-2.3 machine type, but a number of new features are coming that will need to set backwards compatibility options. Signed-off-by: David Gibson --- hw/ppc/spapr.c | 24 +++

[Qemu-devel] [PATCH 07/32] spapr_iommu: Add separate trace points for PCI DMA operations

2015-04-30 Thread David Gibson
From: Alexey Kardashevskiy This is to reduce VIO noise while debugging PCI DMA. Signed-off-by: Alexey Kardashevskiy Signed-off-by: David Gibson --- hw/ppc/spapr_iommu.c | 27 --- include/hw/ppc/spapr.h | 1 + trace-events | 4 3 files changed, 25 ins

[Qemu-devel] [PATCH 28/32] pci: make pci_bar useable outside pci.c

2015-04-30 Thread David Gibson
From: Michael Roth We need to work with PCI BARs to generate OF properties during PCI hotplug for sPAPR guests. Signed-off-by: Michael Roth Reviewed-by: David Gibson Acked-by: Michael S. Tsirkin Signed-off-by: David Gibson --- hw/pci/pci.c | 2 +- include/hw/pci/pci.h | 6 ++ 2

[Qemu-devel] [PATCH 04/32] spapr_pci: Introduce a liobn number generating macros

2015-04-30 Thread David Gibson
From: Alexey Kardashevskiy We are going to have multiple DMA windows per PHB and we want them to migrate so we need a predictable way of assigning LIOBNs. This introduces a macro which makes up a LIOBN from fixed prefix, PHB index (unique PHB id) and window number. This introduces a SPAPR_PCI_D

[Qemu-devel] [PATCH 21/32] spapr: add rtas_st_buffer_direct() helper

2015-04-30 Thread David Gibson
From: Michael Roth This is similar to the existing rtas_st_buffer(), but for cases where the guest is not expecting a length-encoded byte array. Namely, for calls where a "work area" buffer is used to pass around arbitrary fields/data. Signed-off-by: Michael Roth Reviewed-by: David Gibson Sign

[Qemu-devel] [PATCH 19/32] spapr_rtas: add set-indicator RTAS interface

2015-04-30 Thread David Gibson
From: Mike Day This interface allows a guest to control various platform/device sensors. Initially, we only implement support necessary to control sensors that are required for hotplug: DR connector indicators/LEDs, resource allocation state, and resource isolation state. See docs/specs/ppc-spap

[Qemu-devel] [PATCH 02/32] spapr_iommu: Disable in-kernel IOMMU tables for >4GB windows

2015-04-30 Thread David Gibson
From: Alexey Kardashevskiy The existing KVM_CREATE_SPAPR_TCE ioctl only support 4G windows max as the window size parameter to the kernel ioctl() is 32-bit so there's no way of expressing a TCE window > 4GB. We are going to add huge DMA windows support so this will create small window and unexpe

[Qemu-devel] [PATCH 20/32] spapr_rtas: add get-sensor-state RTAS interface

2015-04-30 Thread David Gibson
From: Mike Day This interface allows a guest to read various platform/device sensors. initially, we only implement support necessary to support hotplug: reading of the dr-entity-sense sensor, which communicates the state of a hotplugged resource/device to the guest (EMPTY/PRESENT/UNUSABLE). See

[Qemu-devel] [PATCH 18/32] spapr_rtas: add get/set-power-level RTAS interfaces

2015-04-30 Thread David Gibson
From: Nathan Fontenot These interfaces manage the power domains that guest devices are assigned to and are used to power on/off devices. Currently we only utilize 1 power domain, the 'live-insertion' domain, which automates power management of plugged/unplugged devices, essentially making these c

[Qemu-devel] [PATCH 24/32] spapr_events: event-scan RTAS interface

2015-04-30 Thread David Gibson
From: Tyrel Datwyler We don't actually rely on this interface to surface hotplug events, and instead rely on the similar-but-interrupt-driven check-exception RTAS interface used for EPOW events. However, the existence of this interface is needed to ensure guest kernels initialize the event-report

[Qemu-devel] [PATCH 03/32] spapr_iommu: Make H_PUT_TCE_INDIRECT endian-safe

2015-04-30 Thread David Gibson
From: Alexey Kardashevskiy PAPR is defined as big endian so TCEs need an adjustment so does this patch. This changes code to have ldq_be_phys() in one place. Signed-off-by: Alexey Kardashevskiy Reviewed-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/spapr_iommu.c | 7 +++ 1 fil

[Qemu-devel] [PATCH 26/32] spapr_pci: add dynamic-reconfiguration option for spapr-pci-host-bridge

2015-04-30 Thread David Gibson
From: Michael Roth This option enables/disables PCI hotplug for a particular PHB. Also add machine compatibility code to disable it by default for machine types prior to pseries-2.4. Signed-off-by: Michael Roth Reviewed-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/spapr.c

[Qemu-devel] [PATCH 05/32] spapr_vio: Introduce a liobn number generating macros

2015-04-30 Thread David Gibson
From: Alexey Kardashevskiy This introduces a macro which makes up a LIOBN from fixed prefix and VIO device address (@reg property). This is to keep LIOBN macros rendering consistent - the same macro for PCI has been added by the previous patch. Signed-off-by: Alexey Kardashevskiy Reviewed-by:

[Qemu-devel] [PATCH 09/32] spapr_iommu: Make spapr_tce_find_by_liobn() public

2015-04-30 Thread David Gibson
From: Alexey Kardashevskiy At the moment spapr_tce_find_by_liobn() is used by H_PUT_TCE/... handlers to find an IOMMU by LIOBN. We are going to implement Dynamic DMA windows (DDW), new code will go to a new file and we will use spapr_tce_find_by_liobn() there too so let's make it public. Signed

[Qemu-devel] [PATCH 14/32] hw/ppc/spapr: Fix error message when firmware could not be loaded

2015-04-30 Thread David Gibson
From: Thomas Huth When specifying a non-existing file with the "-bios" parameter, QEMU complained that it "could not find LPAR rtas". That's obviously a copy-n-paste bug from the code which loads the spapr-rtas.bin, it should complain about a missing firmware file instead. Additionally the error

[Qemu-devel] [PATCH 12/32] hw/ppc/spapr_iommu: Fix the check for invalid upper bits in liobn

2015-04-30 Thread David Gibson
From: Thomas Huth The check "liobn & 0xULL" in spapr_tce_find_by_liobn() is completely useless since liobn is only declared as an uint32_t parameter. Fix this by using target_ulong instead (this is what most of the callers of this function are using, too). Signed-off-by: Thomas H

[Qemu-devel] [PATCH 11/32] spapr_iommu: Give unique QOM name to TCE table

2015-04-30 Thread David Gibson
From: Alexey Kardashevskiy Useful for debugging. Signed-off-by: Alexey Kardashevskiy Signed-off-by: David Gibson --- hw/ppc/spapr_iommu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index c17e831..a14cdc4 100644 --- a/hw/p

[Qemu-devel] [PATCH 00/32] Accumulated -machine pseries patches 2015/05/01

2015-04-30 Thread David Gibson
Now that qemu-2.4 has opened, here's the first patch of patches related to -machine pseries. Main things here are: * Support for PCI hotplug from Michael Roth and others * Preliminary cleanups for dynamic DMA windows with VFIO * Some small cleanups and fixes from Thomas Huth * Creates

[Qemu-devel] [PATCH 27/32] spapr_pci: create DRConnectors for each PCI slot during PHB realize

2015-04-30 Thread David Gibson
From: Michael Roth These will be used to support hotplug/unplug of PCI devices to the PCI bus associated with a particular PHB. We also set up device-tree properties in each PHBs initial FDT to describe the DRCs associated with them. This advertises to guests that each PHB is DR-capable device w

Re: [Qemu-devel] [PATCH v8 00/16] spapr: add support for pci hotplug

2015-04-30 Thread David Gibson
On Thu, Apr 30, 2015 at 04:04:49PM -0500, Michael Roth wrote: > Quoting David Gibson (2015-04-29 23:13:04) > > On Wed, Apr 22, 2015 at 01:28:04AM -0500, Michael Roth wrote: > > > These patches are based on spapr-next, and can also be obtained > > > from: > > > > Thanks Michael. > > > > I've made

Re: [Qemu-devel] [PATCH 2/2] hw/ppc/spapr: Use error_report() instead of hw_error()

2015-04-30 Thread David Gibson
On Thu, Apr 30, 2015 at 07:03:20PM +0200, Thomas Huth wrote: > On Thu, 30 Apr 2015 13:32:05 +1000 > Alexey Kardashevskiy wrote: > > > On 04/30/2015 05:01 AM, Thomas Huth wrote: > > > hw_error() is designed for printing CPU-related error messages > > > (e.g. it also prints a full CPU register dump

Re: [Qemu-devel] qemu-ga and logging domain

2015-04-30 Thread Michael Roth
Quoting David Gibson (2015-04-30 20:29:23) > Michael, > > I was just looking at some of the logging stuff in qemu-ga, and it > seems to be doing something very odd with the "domain". > > static void ga_log(const gchar *domain, GLogLevelFlags level, >const gchar *msg, gpointer

Re: [Qemu-devel] PCI on ARM virt machine - status ?

2015-04-30 Thread Peter Crosthwaite
On Wed, Apr 29, 2015 at 5:38 AM, Pavel Fedin wrote: > Hello! > I would like to ask, what is the status of > http://www.spinics.net/lists/kvm-arm/msg14466.html and > http://www.spinics.net/lists/kvm-arm/msg14284.html ? > I do not see this committed, but i would like to say that i have tested > t

[Qemu-devel] [PATCH v2 3/3] TPM2 ACPI table support

2015-04-30 Thread Stefan Berger
Add a TPM2 ACPI table if a TPM 2 is used in the backend. Rename tpm_find() to tpm_get_version() and have this function return the version of the TPM found, TPMVersion_Unspec if no TPM is found. Use the version number to build version specific ACPI tables. Signed-off-by: Stefan Berger --- hw/i38

[Qemu-devel] [PATCH v2 1/3] Extend TPM TIS interface to support TPM 2

2015-04-30 Thread Stefan Berger
Following the recent upgrade to version 1.3, extend the TPM TIS interface with capabilities introduced for support of a TPM 2. TPM TIS for TPM 2 introduced the following extensions beyond the TPM TIS 1.3 (used for TPM 1.2): - A new 32bit interface Id register was introduced. - New flags for the s

[Qemu-devel] [PATCH v2 2/3] tpm: Probe for connected TPM 1.2 or TPM 2

2015-04-30 Thread Stefan Berger
In the TPM passthrough backend driver, modify the probing code so that we can check whether a TPM 1.2 or TPM 2 is being used and adapt the behavior of the TPM TIS accordingly. Move the code that tested for a TPM 1.2 into tpm_utils.c and extend it with test for probing for TPM 2. Have the function

[Qemu-devel] [PATCH v2 0/3] tpm: Upgrade TPM TIS for support of a TPM 2

2015-04-30 Thread Stefan Berger
After the previous upgrade of the TPM TIS to version 1.3, we now upgrade it to support a TPM 2 in the backend. Stefan Berger (3): Extend TPM TIS interface to support TPM 2 tpm: Probe for connected TPM 1.2 or TPM 2 TPM2 ACPI table support backends/tpm.c | 14 + hw/i386/ac

[Qemu-devel] qemu-ga and logging domain

2015-04-30 Thread David Gibson
Michael, I was just looking at some of the logging stuff in qemu-ga, and it seems to be doing something very odd with the "domain". static void ga_log(const gchar *domain, GLogLevelFlags level, const gchar *msg, gpointer opaque) { GAState *s = opaque; GTimeVal time;

Re: [Qemu-devel] [PATCH] cpu: Register QOM links at /machine/cpus/

2015-04-30 Thread Peter Crosthwaite
On Thu, Apr 30, 2015 at 2:47 PM, Paolo Bonzini wrote: > > > On 30/04/2015 22:21, Andreas Färber wrote: >>>+cpu->self = cobj; >>>+object_property_add_link(cpu_container, path, TYPE_CPU, &cpu->self, >>>NULL, >>>+ OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); > >

Re: [Qemu-devel] [PATCH] cpu: Register QOM links at /machine/cpus/

2015-04-30 Thread Peter Crosthwaite
On Thu, Apr 30, 2015 at 12:19 PM, Eduardo Habkost wrote: > This will provide a predictable path for the CPU objects, and a more > powerful alternative for the query-cpus QMP command, as now every QOM > property on CPU objects can be easily queried. > > Signed-off-by: Eduardo Habkost > --- > Note

Re: [Qemu-devel] [RFC PATCH 00/15] spapr: add support for PHB hotplug

2015-04-30 Thread Michael Roth
Quoting Paolo Bonzini (2015-04-30 09:10:30) > > > On 29/04/2015 21:20, Michael Roth wrote: > > These patches are based on latest spapr-hotplug-pci patches, and > > can also be obtained from: > > > > https://github.com/mdroth/qemu/commits/spapr-hotplug-phb > > > > These patches implement suppo

Re: [Qemu-devel] [RFC PATCH 08/15] spapr: create DR connectors for PHBs and register reset hooks

2015-04-30 Thread Michael Roth
Quoting Paolo Bonzini (2015-04-30 09:08:10) > > > On 29/04/2015 21:20, Michael Roth wrote: > > +if (spapr->dr_phb_enabled) { > > +for (i = 0; i < SPAPR_DRC_MAX_PHB; i++) { > > +sPAPRDRConnector *drc = > > +spapr_dr_connector_new(OBJECT(machine), > > +

Re: [Qemu-devel] [RFC 5/5] arm: Simplify cycle counter

2015-04-30 Thread Peter Crosthwaite
On Thu, Apr 30, 2015 at 11:14 AM, Christopher Covington wrote: > Present a system with an instructions per cycle of exactly one. > This makes it less likely a user will mistake the cycle counter > values as meaningful and makes calculations involving cycles > trivial while preserving the necessary

Re: [Qemu-devel] [RFC PATCH 05/15] spapr_pci: add PHB unrealize

2015-04-30 Thread Michael Roth
Quoting Paolo Bonzini (2015-04-30 09:05:17) > > > On 29/04/2015 21:20, Michael Roth wrote: > > To support PHB hotplug we need to clean up lingering references, > > memory, child properties, etc. prior to the PHB object being > > finalized. Generally this will be called as a result of calling > >

Re: [Qemu-devel] [PATCH 1/1] vl.c: Since the help says that 'disk_image' is a raw hard disk image, pass format=raw

2015-04-30 Thread Don Slutz
On 04/30/15 16:15, Kevin Wolf wrote: > Am 30.04.2015 um 21:15 hat Eric Blake geschrieben: >> [adding qemu-block] >> >> On 04/30/2015 12:23 PM, Don Slutz wrote: >>> ~/qemu/out/master/x86_64-softmmu/qemu-system-x86_64 -h | head >>> QEMU emulator version 2.3.50, Copyright (c) 2003-2008 Fabrice >>> B

Re: [Qemu-devel] [RFC PATCH 02/15] qdev: store DeviceState's canonical path to use when unparenting

2015-04-30 Thread Michael Roth
Quoting Paolo Bonzini (2015-04-30 08:35:13) > > > On 29/04/2015 21:20, Michael Roth wrote: > > If the parent is finalized as a result of object_unparent(), it > > will still be attached to the composition tree at the time any > > children are unparented as a result of that same call to > > object

Re: [Qemu-devel] [PATCH v2 3/4] qapi: Correctly handle downstream extensions in more locations

2015-04-30 Thread Eric Blake
On 04/29/2015 09:30 AM, Eric Blake wrote: > On 04/29/2015 05:29 AM, Markus Armbruster wrote: >> Eric Blake writes: >> >>> Now that c_var() handles '.' in downstream extension names, fix >>> the generator to support such names as additional types, enums, >>> members within an enum, branches of a un

[Qemu-devel] [PATCH] tests: consolidate common includes under libqtest.h

2015-04-30 Thread Emilio G. Cota
On Thu, Apr 30, 2015 at 23:14:06 +0300, Michael Tokarev wrote: > 30.04.2015 22:16, Emilio G. Cota wrote: > > ARRAY_SIZE is defined in osdep.h so having an unconditional > > definition here is fragile. > > Fragile in what sense? Nothing in that file includes osdep.h. Fragile in that future, unrela

Re: [Qemu-devel] [RFC 5/5] arm: Simplify cycle counter

2015-04-30 Thread Peter Maydell
On 30 April 2015 at 22:33, Christopher Covington wrote: > On Apr 30, 2015 2:28 PM, "Peter Maydell" wrote: >> Are you really really sure the _raw function is the correct one? >> Nowhere else in the codebase calls it except the other wrappers >> in cpu.c which provide a sane view of the instruction

[Qemu-devel] [PATCH v3 2/4] apic: Set and pass in RH bit for MSI interrupts

2015-04-30 Thread James Sullivan
In apic_send_msi(), set msi_redir_hint to 0x1 when RH=1 in the MSI Address Register. Added an argument for msi_redir_hint to apic_deliver_irq(), and changed calls to the function accordingly (using 0 as a default value for non-MSI interrupts). Signed-off-by: James Sullivan --- Changes in v2:

[Qemu-devel] [PATCH v3 4/4] apic: Handle RH=1 and lowpri delivery mode in apic_get_delivery_bitmask()

2015-04-30 Thread James Sullivan
Added arguments to apic_get_delivery_bitmask() for msi_redir_hint and for delivery_mode, changing calls to the function accordingly (using 0 as a default value for msi_redir_hint for non-MSI interrupts). Modified the implementation of apic_get_delivery_bitmask() such that if msi_redir_hint == 1 or

[Qemu-devel] [PATCH v3 3/4] apic: Add helper functions apic_match_dest, apic_match_[physical, logical]_dest

2015-04-30 Thread James Sullivan
Added three helper functions apic_match_dest(), apic_match_physical_dest(), and apic_match_logical_dest() which can be used to determine if a logical or physical APIC ID match a given LAPIC under a given dest_mode. This does not account for shorthand. Signed-off-by: James Sullivan --- hw/intc/ap

[Qemu-devel] [PATCH v3 1/4] apic: Implement LAPIC low priority arbitration functions

2015-04-30 Thread James Sullivan
Currently, apic_get_arb_pri() is unimplemented and returns 0. Implemented apic_get_arb_pri() and added helper function apic_compare_prio() to be used for LAPIC arbitration. Signed-off-by: James Sullivan --- Changes in v3: * Fixed apic_get_arb_pri to use AMD's algorithm vs. Intel's (incor

[Qemu-devel] [PATCH v3 0/4] apic: Implement MSI RH bit handling, lowpri IRQ delivery

2015-04-30 Thread James Sullivan
Changes in v2: * Merged in low priority IRQ delivery implementation to RH bit handling implementation, since both rely on the same helper functions for priority arbitration. * Corrected use of MSI data register => addr register when setting msi_redir_hint in apic_send_msi(). Cha

Re: [Qemu-devel] [PATCH] cpu: Register QOM links at /machine/cpus/

2015-04-30 Thread Paolo Bonzini
On 30/04/2015 22:21, Andreas Färber wrote: >>+cpu->self = cobj; >>+object_property_add_link(cpu_container, path, TYPE_CPU, &cpu->self, NULL, >>+ OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); Doesn't this leak the CPU object? I have a patch to add "." and "..

Re: [Qemu-devel] [PATCH v8 00/16] spapr: add support for pci hotplug

2015-04-30 Thread Michael Roth
Quoting Michael Roth (2015-04-30 16:04:49) > Quoting David Gibson (2015-04-29 23:13:04) > > On Wed, Apr 22, 2015 at 01:28:04AM -0500, Michael Roth wrote: > > > These patches are based on spapr-next, and can also be obtained > > > from: > > > > Thanks Michael. > > > > I've made a few small conflic

Re: [Qemu-devel] [RFC 5/5] arm: Simplify cycle counter

2015-04-30 Thread Christopher Covington
Hi Peter, Thanks for taking a look. On Apr 30, 2015 2:28 PM, "Peter Maydell" wrote: > > On 30 April 2015 at 19:14, Christopher Covington > wrote: > > Present a system with an instructions per cycle of exactly one. > > This makes it less likely a user will mistake the cycle counter > > values as

Re: [Qemu-devel] [PATCH v8 00/16] spapr: add support for pci hotplug

2015-04-30 Thread Michael Roth
Quoting David Gibson (2015-04-29 23:13:04) > On Wed, Apr 22, 2015 at 01:28:04AM -0500, Michael Roth wrote: > > These patches are based on spapr-next, and can also be obtained > > from: > > Thanks Michael. > > I've made a few small conflict fixes and merged this into spapr-next. Great, thanks! >

Re: [Qemu-devel] [PATCH] cpu: Register QOM links at /machine/cpus/

2015-04-30 Thread Andreas Färber
First I did not participate in that discussion, second nack to that self pointer. Please hold off on this until I'm back. Andreas Eduardo Habkost schrieb: >This will provide a predictable path for the CPU objects, and a more >powerful alternative for the query-cpus QMP command, as now every QOM

Re: [Qemu-devel] [PATCH 1/1] vl.c: Since the help says that 'disk_image' is a raw hard disk image, pass format=raw

2015-04-30 Thread Kevin Wolf
Am 30.04.2015 um 21:15 hat Eric Blake geschrieben: > [adding qemu-block] > > On 04/30/2015 12:23 PM, Don Slutz wrote: > > ~/qemu/out/master/x86_64-softmmu/qemu-system-x86_64 -h | head > > QEMU emulator version 2.3.50, Copyright (c) 2003-2008 Fabrice Bellard > > usage: qemu-system-x86_64 [options]

Re: [Qemu-devel] [PATCH] i440fx-test: guard ARRAY_SIZE definition with #ifndef

2015-04-30 Thread Michael Tokarev
30.04.2015 22:16, Emilio G. Cota wrote: > ARRAY_SIZE is defined in osdep.h so having an unconditional > definition here is fragile. Fragile in what sense? Nothing in that file includes osdep.h. At the maximum, compiler will issue a warning about redefinition (it should really be redefinition, not

Re: [Qemu-devel] [PATCH] i440fx-test: guard ARRAY_SIZE definition with #ifndef

2015-04-30 Thread Peter Maydell
On 30 April 2015 at 20:28, Stefan Weil wrote: > Am 30.04.2015 um 21:16 schrieb Emilio G. Cota: >> >> ARRAY_SIZE is defined in osdep.h so having an unconditional >> definition here is fragile. FWIW, the original patch of this failed to build on x86 too, so I don't think we currently include osdep.

Re: [Qemu-devel] [PATCH 1/1] vl.c: Since the help says that 'disk_image' is a raw hard disk image, pass format=raw

2015-04-30 Thread Eric Blake
[adding qemu-block] On 04/30/2015 12:23 PM, Don Slutz wrote: > ~/qemu/out/master/x86_64-softmmu/qemu-system-x86_64 -h | head > QEMU emulator version 2.3.50, Copyright (c) 2003-2008 Fabrice Bellard > usage: qemu-system-x86_64 [options] [disk_image] > > 'disk_image' is a raw hard disk image for IDE

Re: [Qemu-devel] [PATCH] i440fx-test: guard ARRAY_SIZE definition with #ifndef

2015-04-30 Thread Stefan Weil
Am 30.04.2015 um 21:16 schrieb Emilio G. Cota: ARRAY_SIZE is defined in osdep.h so having an unconditional definition here is fragile. Signed-off-by: Emilio G. Cota --- tests/i440fx-test.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/i440fx-test.c b/tests/i440fx-test.c index d

[Qemu-devel] [PULL 6/7] MAINTAINERS: Add qemu-block list where missing

2015-04-30 Thread Kevin Wolf
Signed-off-by: Kevin Wolf --- MAINTAINERS | 6 ++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 25fd2b5..0b67c48 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -735,12 +735,14 @@ F: backends/rng*.c nvme M: Keith Busch +L: qemu-bl...@nongnu.org S: Supported

[Qemu-devel] [PULL 4/7] MAINTAINERS: make image fuzzer Stefan Hajnoczi's responsibility

2015-04-30 Thread Kevin Wolf
From: Stefan Hajnoczi Signed-off-by: Stefan Hajnoczi Signed-off-by: Kevin Wolf --- MAINTAINERS | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 9e1413e..65a5cc5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -779,7 +779,6 @@ F: block/ F:

[Qemu-devel] [PATCH] cpu: Register QOM links at /machine/cpus/

2015-04-30 Thread Eduardo Habkost
This will provide a predictable path for the CPU objects, and a more powerful alternative for the query-cpus QMP command, as now every QOM property on CPU objects can be easily queried. Signed-off-by: Eduardo Habkost --- Note that this doesn't replace any future topology enumeration mechanisms we

[Qemu-devel] [PULL 5/7] MAINTAINERS: make block layer core Kevin Wolf's responsibility

2015-04-30 Thread Kevin Wolf
From: Stefan Hajnoczi Kevin is now sole maintainer of the core block layer, including BlockDriverState graphs and monitor commands. Signed-off-by: Stefan Hajnoczi Signed-off-by: Kevin Wolf --- MAINTAINERS | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/MAINTAINERS b/MAI

[Qemu-devel] [PULL 2/7] MAINTAINERS: split out image formats

2015-04-30 Thread Kevin Wolf
From: Stefan Hajnoczi Block driver submaintainers has proven to be a good model. Kevin and Stefan are splitting up the unclaimed block drivers so each has a dedicated maintainer. Signed-off-by: Stefan Hajnoczi Signed-off-by: Kevin Wolf --- MAINTAINERS | 77 +++

[Qemu-devel] [PULL 7/7] Enable NVMe start controller for Windows guest.

2015-04-30 Thread Kevin Wolf
From: Daniel Stekloff Windows seems to send two separate calls to NVMe controller configuration. The first sends configuration info and the second the enable bit. I couldn't enable the Windows 8.1 in-box NVMe driver with base Qemu. I made the following change to store the configuration data and t

Re: [Qemu-devel] [PATCH 1/1] vl.c: Since the help says that 'disk_image' is a raw hard disk image, pass format=raw

2015-04-30 Thread Eric Blake
On 04/30/2015 01:15 PM, Eric Blake wrote: > [adding qemu-block] > > On 04/30/2015 12:23 PM, Don Slutz wrote: >> ~/qemu/out/master/x86_64-softmmu/qemu-system-x86_64 -h | head >> QEMU emulator version 2.3.50, Copyright (c) 2003-2008 Fabrice Bellard >> usage: qemu-system-x86_64 [options] [disk_image]

[Qemu-devel] [PATCH] i440fx-test: guard ARRAY_SIZE definition with #ifndef

2015-04-30 Thread Emilio G. Cota
ARRAY_SIZE is defined in osdep.h so having an unconditional definition here is fragile. Signed-off-by: Emilio G. Cota --- tests/i440fx-test.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/i440fx-test.c b/tests/i440fx-test.c index d0bc8de..d610e66 100644 --- a/tests/i440fx-test.c ++

[Qemu-devel] [PULL 3/7] MAINTAINERS: make block I/O path Stefan Hajnoczi's responsibility

2015-04-30 Thread Kevin Wolf
From: Stefan Hajnoczi The block I/O path includes the asynchronous I/O machinery and read/write/flush/discard processing. It somewhat arbitrarily also includes block migration, which I've found myself reviewing patches for over the years. Signed-off-by: Stefan Hajnoczi Signed-off-by: Kevin Wol

[Qemu-devel] [PULL 1/7] MAINTAINERS: make virtio-blk Stefan Hajnoczi's responsibility

2015-04-30 Thread Kevin Wolf
From: Stefan Hajnoczi Cc: Kevin Wolf Signed-off-by: Stefan Hajnoczi Signed-off-by: Kevin Wolf --- MAINTAINERS | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index b5ab755..0c14de1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -704,10 +704,13

[Qemu-devel] [PULL 0/7] Block patches

2015-04-30 Thread Kevin Wolf
The following changes since commit 06feaacfb4cfef10cc0c93d97df7bfc8a71dbc7e: Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2015-04-30 12:04:11 +0100) are available in the git repository at: git://repo.or.cz/qemu/kevin.git tags/for-upstream for you to fetch

Re: [Qemu-devel] [RFC 5/5] arm: Simplify cycle counter

2015-04-30 Thread Peter Maydell
On 30 April 2015 at 19:14, Christopher Covington wrote: > Present a system with an instructions per cycle of exactly one. > This makes it less likely a user will mistake the cycle counter > values as meaningful and makes calculations involving cycles > trivial while preserving the necessary proper

[Qemu-devel] [PATCH 1/1] xen-hvm: Add trace to ioreq

2015-04-30 Thread Don Slutz
Signed-off-by: Don Slutz (cherry picked from commit b72adbe7510d0a30053d32334665ee887bec9e43) --- trace-events | 7 +++ xen-hvm.c| 21 + 2 files changed, 28 insertions(+) diff --git a/trace-events b/trace-events index 30eba92..4666dad 100644 --- a/trace-events +++ b/

[Qemu-devel] [PATCH 1/1] vl.c: Since the help says that 'disk_image' is a raw hard disk image, pass format=raw

2015-04-30 Thread Don Slutz
~/qemu/out/master/x86_64-softmmu/qemu-system-x86_64 -h | head QEMU emulator version 2.3.50, Copyright (c) 2003-2008 Fabrice Bellard usage: qemu-system-x86_64 [options] [disk_image] 'disk_image' is a raw hard disk image for IDE hard disk 0 Standard options: ... Signed-off-by: Don Slutz --- vl.c

[Qemu-devel] [PATCH v5 7/7] MAINTAINERS: add VMware port

2015-04-30 Thread Don Slutz
Signed-off-by: Don Slutz --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index b5ab755..4bbda42 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -755,6 +755,13 @@ S: Maintained F: hw/net/vmxnet* F: hw/scsi/vmw_pvscsi* +VMware port +M: Don Slut

[Qemu-devel] [PATCH v5 3/7] vmport_rpc: Add limited support of VMware's hyper-call rpc

2015-04-30 Thread Don Slutz
The support included is enough to allow VMware tools to install in a guest and provide guestinfo support. guestinfo support is provided by what is known as VMware RPC support. If the guest is running VMware tools, then the "build version" of the tools is also available via the property build-numb

[Qemu-devel] [PATCH v5 4/7] vmport_rpc: Add QMP access to vmport_rpc object.

2015-04-30 Thread Don Slutz
This adds one new inject command: inject-vmport-action And three guest info commands: vmport-guestinfo-set vmport-guestinfo-get query-vmport-guestinfo More details in qmp-commands.hx Signed-off-by: Don Slutz --- hw/misc/vmport_rpc.c | 265 +++

[Qemu-devel] [PATCH v5 5/7] vmport_rpc: Add migration

2015-04-30 Thread Don Slutz
Signed-off-by: Don Slutz --- hw/misc/vmport_rpc.c | 250 +++ trace-events | 8 +- 2 files changed, 255 insertions(+), 3 deletions(-) diff --git a/hw/misc/vmport_rpc.c b/hw/misc/vmport_rpc.c index 2403f52..caa82ef 100644 --- a/hw/misc/vmpo

[Qemu-devel] [PATCH v5 2/7] vmport_rpc: Add the object vmport_rpc

2015-04-30 Thread Don Slutz
This is the 1st part of "Add limited support of VMware's hyper-call rpc". This patch uses existing infrastructure used by vmmouse.c (provided by vmport.c) to handle the VMware backdoor command 30. One of the better on-line references is: https://sites.google.com/site/chitchatvmback/backdoor Mor

[Qemu-devel] [PATCH v5 6/7] vmport: Add VMware all ring hack

2015-04-30 Thread Don Slutz
This is done by adding a new machine property vmware-port-ring3 that needs to be enabled to have any effect. It only effects accel=tcg mode. It is needed if you want to use VMware tools in accel=tcg mode. Signed-off-by: Don Slutz (cherry picked from commit 6d99c91fc9ae27b476e89a8cc880b4a46e2375

[Qemu-devel] [PATCH v5 1/7] vmport.c: Fix vmport_cmd_ram_size

2015-04-30 Thread Don Slutz
Based on https://sites.google.com/site/chitchatvmback/backdoor and testing on ESXi, this should be in MB not bytes. Signed-off-by: Don Slutz --- hw/misc/vmport.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/vmport.c b/hw/misc/vmport.c index 7fcc00d..6b350ce 10064

[Qemu-devel] [PATCH v5 0/7] Add limited support of VMware's hyper-call rpc

2015-04-30 Thread Don Slutz
Changes v4 to v5: Paolo Bonzini What is VMPORT_SHORT about? Dropped this. Why not use a bool in CPUX86State? Took his sugestion and moved to a bool in X86CPU. Changes v3 to v4: Paolo Bonzini on "vmort_rpc: Add QMP access to vmport_rpc" Does this compile on non-x86 tar

[Qemu-devel] [RFC 4/5] arm64: Unmask PMU bits in debug feature register

2015-04-30 Thread Christopher Covington
The previously missing registers are now present in QEMU. Signed-off-by: Christopher Covington --- target-arm/helper.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 863cfd0..3e6fb0b 100644 --- a/target-arm/helper.c +++ b

[Qemu-devel] [RFC 5/5] arm: Simplify cycle counter

2015-04-30 Thread Christopher Covington
Present a system with an instructions per cycle of exactly one. This makes it less likely a user will mistake the cycle counter values as meaningful and makes calculations involving cycles trivial while preserving the necessary property of the cycle counter register as monotonically increasing. Si

[Qemu-devel] [RFC 3/5] arm64: Add PMUSERENR_EL0 register

2015-04-30 Thread Christopher Covington
The Linux kernel accesses this register early in its setup. Signed-off-by: Christopher Covington --- target-arm/helper.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index c9463cb..863cfd0 100644 --- a/target-arm/helper.c +++ b/target-arm/he

[Qemu-devel] [RFC 2/5] arm64: Add PMOVSCLR_EL0 register

2015-04-30 Thread Christopher Covington
The Linux kernel accesses this register early in its setup. Signed-off-by: Christopher Covington --- target-arm/helper.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 6aeb77c..c9463cb 100644 --- a/target-arm/helper.c +++ b/target-arm/he

[Qemu-devel] [RFC 1/5] arm64: Add PMINTENCLR_EL1

2015-04-30 Thread Christopher Covington
The Linux kernel accesses this register early in its setup. Signed-off-by: Christopher Covington --- target-arm/helper.c | 5 + 1 file changed, 5 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index d77c6de..6aeb77c 100644 --- a/target-arm/helper.c +++ b/target-arm/hel

[Qemu-devel] [PATCH v3 6/9] qtest/ahci: add migrate dma test

2015-04-30 Thread John Snow
Write to one guest, migrate, and then read from the other. adjust ahci_io to clear any buffers it creates, so that we can use ahci_io safely on both guests knowing we are using empty buffers and not accidentally re-using data. Signed-off-by: John Snow --- tests/ahci-test.c | 45 +++

[Qemu-devel] [PATCH v3 8/9] qtest/ahci: add halted dma test

2015-04-30 Thread John Snow
If we're going to test the migration of halted DMA jobs, we should probably check to make sure we can resume them locally as a first step. Signed-off-by: John Snow --- tests/ahci-test.c | 60 +++ 1 file changed, 60 insertions(+) diff --git a/t

[Qemu-devel] [PATCH v3 5/9] qtest/ahci: Add migration test

2015-04-30 Thread John Snow
Notes: * The migration is performed on QOSState objects. * The migration is performed in such a way that it does not assume consistency between the allocators attached to each. That is to say, you can use each QOSState object completely independently and then at an arbitrary point deci

Re: [Qemu-devel] [PATCH v4 6/7] vmport: Add VMware all ring hack

2015-04-30 Thread Don Slutz
On 04/30/15 11:23, Paolo Bonzini wrote: > > > On 30/04/2015 17:15, Don Slutz wrote: >> That is a possibility. It did not look simple to access CPUX86State >> where I needed to check HF2_VMPORT_HACK_MASK. Instead of the >> save/restore I could add it both places. > > Why not? This: > > @@ -25

[Qemu-devel] [PATCH v3 7/9] qtest/ahci: add flush migrate test

2015-04-30 Thread John Snow
Use blkdebug to inject an error on first flush, then attempt to flush on the first guest. When the error halts the VM, migrate to the second VM, and attempt to resume the command. Signed-off-by: John Snow --- tests/ahci-test.c | 52 +++- 1 file cha

[Qemu-devel] [PATCH v3 1/9] libqos/ahci: Add halted command helpers

2015-04-30 Thread John Snow
Sometimes we want a command to halt the VM instead of complete successfully, so it'd be nice to let the libqos/ahci functions cope with such scenarios. Signed-off-by: John Snow --- tests/libqos/ahci.c | 27 +++ tests/libqos/ahci.h | 3 +++ 2 files changed, 30 insertions(

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