On 05/27/2014 08:37 PM, Alexey Kardashevskiy wrote:
> Started as POWER7/8 SPRs patchset, this became a rework of book3s/970 CPU
> classes initialization.
>
> The aim is to boot little endian guests in TCG mode with -cpu POWER8
> (ironically, POWER8 emulation still fails, debugging it now but most
Peter Lieven writes:
> Am 27.05.2014 um 21:24 schrieb Eric Blake :
>
>> On 05/27/2014 02:22 AM, Chen Fan wrote:
>>> From: Hu Tao
>>>
>>> This patch adds a new option preallocation for raw format, and implements
>>> full preallocation by writing zeros to disk.
>>>
>>> The metadata option is cha
On 05/27/2014 08:37 PM, Alexey Kardashevskiy wrote:
> This enabled PMU SPRs migration by hooking hypv privileged versions with
> "KVM one reg" IDs.
>
> Signed-off-by: Alexey Kardashevskiy
> ---
> target-ppc/translate_init.c | 104
> ++--
> 1 file changed,
On Wed, May 28, 2014 at 12:41:37AM +0200, Alexander Graf wrote:
>On 28.05.14 00:27, Benjamin Herrenschmidt wrote:
>>On Wed, 2014-05-28 at 00:22 +0200, Alexander Graf wrote:
.../...
>>In any case, the above isn't the problem, we register rtas functions
>>called rtas_ibm_*, that's fine.
>
>They're
On 05/07/2014 03:58 AM, Chunyan Liu wrote:
> vvfat shares create options of qcow driver. To avoid vvfat breaking when
> qcow driver changes from QEMUOptionParameter to QemuOpts, let it able
> to handle both cases.
>
> Signed-off-by: Chunyan Liu
> ---
> Change:
> * Fix memory free:
> - qemu_
On 05/07/2014 03:58 AM, Chunyan Liu wrote:
> Change block layer to support both QemuOpts and QEMUOptionParameter.
> After this patch, it will change backend drivers one by one. At the end,
> QEMUOptionParameter will be removed and only QemuOpts is kept.
>
> Signed-off-by: Dong Xu Wang
> Signed-of
In vmdk_create and vmdk_create_extent, initialize local_err before using
it, and don't leak it on error.
Reported-by: Markus Armbruster
Signed-off-by: Fam Zheng
---
block/vmdk.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/block/vmdk.c b/block/vmdk.c
index 480ea37
On 05/07/2014 03:58 AM, Chunyan Liu wrote:
> For later merge .create_opts of drv and proto_drv in qemu-img commands.
>
> Signed-off-by: Chunyan Liu
> ---
> Changes:
> * fix memory free:
> if (param) {
>- g_free(list);
>+ qemu_opts_free(list); //free allocated memory too
>
On 05/07/2014 03:58 AM, Chunyan Liu wrote:
> Add def_value_str (default value) to QemuOptDesc, to replace function of the
> default value in QEMUOptionParameter.
>
> Improve qemu_opts_get_* functions: if find opt, return opt->str; otherwise,
> if desc->def_value_str is set, return desc->def_value_
On 05/07/2014 03:58 AM, Chunyan Liu wrote:
> Currently this function is not used anywhere. In later patches, it will
> replace print_option_parameters. To avoid print info changes, change
> qemu_opts_print from fprintf stderr to printf, and remove last printf.
>
> Signed-off-by: Chunyan Liu
> ---
>>> On 5/20/2014 at 05:11 AM, in message
<20140519211122.GA2051@dorilex-lnv.MultilaserAP>, Leandro Dorileo
wrote:
> On Sun, May 18, 2014 at 09:02:45PM -0600, Chun Yan Liu wrote:
> >
> >
> > >>> On 5/6/2014 at 09:26 PM, in message
> > <20140506132615.gv15...@stefanha-thinkpad.redhat.com>,
On 05/28/2014 10:03 AM, Alexander Graf wrote:
>
> On 27.05.14 12:37, Alexey Kardashevskiy wrote:
>> This adds spr_write_ureg() helper and uses it for UPMCx and MMCR0 SPRs.
>>
>> Signed-off-by: Alexey Kardashevskiy
>> ---
>> target-ppc/translate_init.c | 25 +++--
>> 1 file
> -Original Message-
> From: qemu-devel-bounces+tiejun.chen=intel@nongnu.org
> [mailto:qemu-devel-bounces+tiejun.chen=intel@nongnu.org] On Behalf Of
> Stefano Stabellini
> Sent: Wednesday, May 28, 2014 2:05 AM
> To: Chen, Tiejun
> Cc: peter.mayd...@linaro.org; xen-de...@lists.xensou
On Tue, May 27, 2014 at 12:55:01PM -0300, Eduardo Habkost wrote:
> On Tue, May 27, 2014 at 11:39:20AM -0300, Marcelo Tosatti wrote:
> >
> > Migration blocker is redudant: blocking savevm is sufficient.
> >
>
> Removing the redundancy looks welcome, but at the same time the
> migrate_add_blocker(
> -Original Message-
> From: Stefano Stabellini [mailto:stefano.stabell...@eu.citrix.com]
> Sent: Wednesday, May 28, 2014 2:02 AM
> To: Chen, Tiejun
> Cc: anthony.per...@citrix.com; stefano.stabell...@eu.citrix.com;
> m...@redhat.com; kelly.zyta...@amd.com; qemu-devel@nongnu.org;
> xen-de..
> -Original Message-
> From: Stefano Stabellini [mailto:stefano.stabell...@eu.citrix.com]
> Sent: Wednesday, May 28, 2014 1:52 AM
> To: Konrad Rzeszutek Wilk
> Cc: Chen, Tiejun; anthony.per...@citrix.com; stefano.stabell...@eu.citrix.com;
> m...@redhat.com; kelly.zyta...@amd.com; peter.mayd
> -Original Message-
> From: Stefano Stabellini [mailto:stefano.stabell...@eu.citrix.com]
> Sent: Wednesday, May 28, 2014 1:48 AM
> To: Chen, Tiejun
> Cc: anthony.per...@citrix.com; stefano.stabell...@eu.citrix.com;
> m...@redhat.com; kelly.zyta...@amd.com; qemu-devel@nongnu.org;
> xen-de..
> -Original Message-
> From: Stefano Stabellini [mailto:stefano.stabell...@eu.citrix.com]
> Sent: Wednesday, May 28, 2014 1:36 AM
> To: Chen, Tiejun
> Cc: anthony.per...@citrix.com; stefano.stabell...@eu.citrix.com;
> m...@redhat.com; kelly.zyta...@amd.com; qemu-devel@nongnu.org;
> xen-de..
On 05/28/2014 10:37 AM, Alexander Graf wrote:
>
> On 27.05.14 12:37, Alexey Kardashevskiy wrote:
>> Started as POWER7/8 SPRs patchset, this became a rework of book3s/970 CPU
>> classes initialization.
>>
>> The aim is to boot little endian guests in TCG mode with -cpu POWER8
>> (ironically, POWER8
On 05/28/2014 10:36 AM, Alexander Graf wrote:
>
> On 28.05.14 02:20, Alexey Kardashevskiy wrote:
>> On 05/28/2014 10:07 AM, Alexander Graf wrote:
>>> On 27.05.14 12:37, Alexey Kardashevskiy wrote:
At the moment every POWER CPU family has its own init_proc_POWERX
function.
E500 alrea
> -Original Message-
> From: Konrad Rzeszutek Wilk [mailto:konrad.w...@oracle.com]
> Sent: Tuesday, May 27, 2014 10:56 PM
> To: Chen, Tiejun
> Cc: anthony.per...@citrix.com; stefano.stabell...@eu.citrix.com;
> m...@redhat.com; kelly.zyta...@amd.com; peter.mayd...@linaro.org;
> xen-de...@lis
On 05/28/2014 10:41 AM, Alexander Graf wrote:
>
> On 28.05.14 02:34, Alexey Kardashevskiy wrote:
>> On 05/28/2014 09:55 AM, Alexander Graf wrote:
>>> On 27.05.14 06:51, Alexey Kardashevskiy wrote:
On 05/23/2014 12:25 AM, Alexey Kardashevskiy wrote:
> On 05/22/2014 08:57 PM, Alexander Graf
> -Original Message-
> From: Konrad Rzeszutek Wilk [mailto:konrad.w...@oracle.com]
> Sent: Tuesday, May 27, 2014 10:55 PM
> To: Chen, Tiejun
> Cc: anthony.per...@citrix.com; stefano.stabell...@eu.citrix.com;
> m...@redhat.com; kelly.zyta...@amd.com; peter.mayd...@linaro.org;
> xen-de...@lis
On 05/27/2014 06:11 PM, Fam Zheng wrote:
> On Tue, 05/27 16:54, chai wen wrote:
>> If we want to track dirty blocks using dirty_maps on a BlockDriverState
>> when doing live block-migration, its correspoding 'BlkMigDevState' should be
>> add to block_mig_state.bmds_list firstly for subsequent proc
This reworks vfio_connect_container() and vfio_get_group() to have
common exit path at the end of the function bodies.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v6.5:
* do not move error_report to vfio_listener_release label
---
hw/misc/vfio.c | 58 ---
> -Original Message-
> From: Konrad Rzeszutek Wilk [mailto:konrad.w...@oracle.com]
> Sent: Tuesday, May 27, 2014 10:48 PM
> To: Chen, Tiejun
> Cc: anthony.per...@citrix.com; stefano.stabell...@eu.citrix.com;
> m...@redhat.com; kelly.zyta...@amd.com; peter.mayd...@linaro.org;
> xen-de...@lis
On Tue, May 27, 2014 at 08:59:20AM -0600, Eric Blake wrote:
> On 05/27/2014 04:41 AM, Benoît Canet wrote:
>
> >> -fprintf(stderr, "%s: can't open device %s: %s\n", progname,
> >> name,
> >> +fprintf(stderr, "%s: can't open%s%s: %s\n", progname,
> >> +na
> -Original Message-
> From: Paolo Bonzini [mailto:paolo.bonz...@gmail.com] On Behalf Of Paolo
> Bonzini
> Sent: Tuesday, May 27, 2014 9:36 PM
> To: Gonglei (Arei); qemu-devel@nongnu.org
> Cc: kw...@redhat.com; peter.crosthwa...@xilinx.com; Huangweidong (C);
> aligu...@amazon.com; m...@redh
On 28.05.14 02:34, Alexey Kardashevskiy wrote:
On 05/28/2014 09:55 AM, Alexander Graf wrote:
On 27.05.14 06:51, Alexey Kardashevskiy wrote:
On 05/23/2014 12:25 AM, Alexey Kardashevskiy wrote:
On 05/22/2014 08:57 PM, Alexander Graf wrote:
On 22.05.14 12:53, Alexey Kardashevskiy wrote:
On 05/
On 27.05.14 12:37, Alexey Kardashevskiy wrote:
Started as POWER7/8 SPRs patchset, this became a rework of book3s/970 CPU
classes initialization.
The aim is to boot little endian guests in TCG mode with -cpu POWER8
(ironically, POWER8 emulation still fails, debugging it now but most of the set
i
On 28.05.14 02:20, Alexey Kardashevskiy wrote:
On 05/28/2014 10:07 AM, Alexander Graf wrote:
On 27.05.14 12:37, Alexey Kardashevskiy wrote:
At the moment every POWER CPU family has its own init_proc_POWERX function.
E500 already has common init function so we try to do the same thing.
This in
On 05/28/2014 09:55 AM, Alexander Graf wrote:
>
> On 27.05.14 06:51, Alexey Kardashevskiy wrote:
>> On 05/23/2014 12:25 AM, Alexey Kardashevskiy wrote:
>>> On 05/22/2014 08:57 PM, Alexander Graf wrote:
On 22.05.14 12:53, Alexey Kardashevskiy wrote:
> On 05/22/2014 05:16 PM, Alexander Graf
On 27.05.14 12:37, Alexey Kardashevskiy wrote:
POWER8 supports Event-Based Branch Facility (EBB) and Target Address
Register (TAR). They are controlled via set of SPRs access to which
should generate an "Facility Unavailable" interrupt if the facilities
are not enabled in FSCR for problem state.
On 27.05.14 12:37, Alexey Kardashevskiy wrote:
This adds TM (Transactional Memory) SPRs.
Since TEXASRU is an upper half of TEXASR, special handling is needed here.
This adds two helpers: spr_read_prev_upper32()/spr_write_prev_upper32().
They read/write upper half of a previous 64bit SPR. Since
On 05/28/2014 10:07 AM, Alexander Graf wrote:
>
> On 27.05.14 12:37, Alexey Kardashevskiy wrote:
>> At the moment every POWER CPU family has its own init_proc_POWERX function.
>> E500 already has common init function so we try to do the same thing.
>>
>> This introduces BOOK3S_CPU_TYPE enum with 2
On 27.05.14 12:37, Alexey Kardashevskiy wrote:
This adds an FSCR (Facility Status and Control Register) SPR.
Signed-off-by: Alexey Kardashevskiy
---
target-ppc/cpu.h| 1 +
target-ppc/translate_init.c | 9 +
2 files changed, 10 insertions(+)
diff --git a/target-ppc/cpu.
On 27.05.14 12:37, Alexey Kardashevskiy wrote:
This adds TIR (Thread Identification Register) SPR first defined in
PowerISA 2.05.
Signed-off-by: Alexey Kardashevskiy
---
target-ppc/cpu.h| 1 +
target-ppc/translate_init.c | 5 +
2 files changed, 6 insertions(+)
diff --git a
On 27.05.14 12:37, Alexey Kardashevskiy wrote:
This extends init_proc_POWER to support POWER7 and POWER8.
Signed-off-by: Alexey Kardashevskiy
---
target-ppc/translate_init.c | 96 -
1 file changed, 59 insertions(+), 37 deletions(-)
diff --git a/t
On 27.05.14 12:37, Alexey Kardashevskiy wrote:
At the moment every POWER CPU family has its own init_proc_POWERX function.
E500 already has common init function so we try to do the same thing.
This introduces BOOK3S_CPU_TYPE enum with 2 values - 970 and POWER5+.
This introduces generalized ini
On 27.05.14 12:37, Alexey Kardashevskiy wrote:
This adds spr_write_ureg() helper and uses it for UPMCx and MMCR0 SPRs.
Signed-off-by: Alexey Kardashevskiy
---
target-ppc/translate_init.c | 25 +++--
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/target-p
On 27.05.14 06:51, Alexey Kardashevskiy wrote:
On 05/23/2014 12:25 AM, Alexey Kardashevskiy wrote:
On 05/22/2014 08:57 PM, Alexander Graf wrote:
On 22.05.14 12:53, Alexey Kardashevskiy wrote:
On 05/22/2014 05:16 PM, Alexander Graf wrote:>
Am 22.05.2014 um 08:53 schrieb Alexey Kardashevskiy :
Am 28.05.2014 01:22, schrieb Alexander Graf:
>
> On 23.04.14 23:19, Hervé Poussineau wrote:
>> Note that offsets are PReP ones, so this breaks compatibility with
>> hardware which has different values.
>
> So that means that this patch breaks non-PReP? I don't think we want
> that ;).
Please not
On Tue, May 27, 2014 at 04:46:46PM +0200, Paolo Bonzini wrote:
> Il 25/05/2014 11:50, Hani Benhabiles ha scritto:
> >@@ -236,9 +236,10 @@ static int nbd_receive_options(NBDClient *client)
> > LOG("read failed");
> > goto fail;
> > }
> >-TRACE("Checking reserved");
> >-if
Export chr_is_ringbuf() function. Also remove left-over function prototypes
while at it.
Signed-off-by: Hani Benhabiles
---
hmp-commands.hx | 2 ++
hmp.h | 2 ++
include/sysemu/char.h | 3 +--
monitor.c | 39 +++
qemu-char.
On 28.05.14 01:21, Alexander Graf wrote:
On 27.05.14 20:57, Hervé Poussineau wrote:
Ping.
Le 20/05/2014 07:34, Hervé Poussineau a écrit :
Ping.
Le 23/04/2014 23:19, Hervé Poussineau a écrit :
Hi,
These two patches remove some bugs for a PReP firmware. Note that
first patch is very
PReP-o
On 23.04.14 23:19, Hervé Poussineau wrote:
Note that offsets are PReP ones, so this breaks compatibility with hardware
which has different values.
So that means that this patch breaks non-PReP? I don't think we want
that ;).
Alex
On 27.05.14 20:57, Hervé Poussineau wrote:
Ping.
Le 20/05/2014 07:34, Hervé Poussineau a écrit :
Ping.
Le 23/04/2014 23:19, Hervé Poussineau a écrit :
Hi,
These two patches remove some bugs for a PReP firmware. Note that
first patch is very
PReP-oriented, and breaks OHW compatibility with
Signed-off-by: Hani Benhabiles
---
hmp-commands.hx | 1 +
hmp.h | 2 ++
monitor.c | 14 ++
3 files changed, 17 insertions(+)
diff --git a/hmp-commands.hx b/hmp-commands.hx
index dcec5ef..45e1763 100644
--- a/hmp-commands.hx
+++ b/hmp-commands.hx
@@ -1359,6 +1359,7 @
On Wed, May 14, 2014 at 01:22:25AM +, Edgar E. Iglesias wrote:
> On Wed, May 14, 2014 at 03:13:09AM +0200, Samuel Thibault wrote:
> > Do not special-case addresses with zero host part, as we do not
> > necessarily know how big it is, and the guest can fake them anyway.
> > Silently avoid having
On Wed, 2014-05-28 at 06:36 +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2014-05-27 at 12:27 -0600, Alex Williamson wrote:
>
> > Ugh, the patches are flying too fast, I can't even keep track that this
> > is a QEMU patch. I'm not as concerned about the "get" in QEMU, but do
> > we really want t
Using more appropriate _PTR or _REG where possible.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 23 +--
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index c90ddcd..2f60924 100644
--- a/tcg/pp
On 28.05.14 00:27, Benjamin Herrenschmidt wrote:
On Wed, 2014-05-28 at 00:22 +0200, Alexander Graf wrote:
+void spapr_eeh_rtas_init(sPAPREnvironment *spapr)
+{
+spapr_rtas_register("ibm,set-eeh-option",
+rtas_ibm_set_eeh_option);
+spapr_rtas_register("ibm,get-con
Look at ELF header to determine ABI version on PPC64. This is required
for executing the first instruction correctly. Also print correct machine
name in uname() system call.
Signed-off-by: Doug Kwan
Signed-off-by: Tom Musta
---
V3: Addressing Peter Maydell's comments regarding how and where t
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 5 +
tcg/ppc64/tcg-target.h | 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index a5ad140..02ee8e2 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target
On 27 May 2014 22:34, Tom Musta wrote:
> This allows running PPC64 little-endian in user mode if target is configured
> that way. In PPC64 LE user mode we set MSR.LE during initialization.
>
> Signed-off-by: Doug Kwan
> Signed-off-by: Tom Musta
>
> ---
> V2: Overhaul handling of byteswapping in
Relies on readline unique completion strings patch to make the added vlan/hub
completion values unique, instead of using something like a hash table.
Signed-off-by: Hani Benhabiles
---
hmp-commands.hx | 1 +
hmp.h | 2 ++
monitor.c | 38 ++
3
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 538ca2a..e40301c 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -2077,8 +2077,7
Also fix the parameters documentation.
Signed-off-by: Hani Benhabiles
---
hmp-commands.hx | 3 ++-
hmp.h | 1 +
monitor.c | 16
3 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/hmp-commands.hx b/hmp-commands.hx
index 919af6e..aab9cf5 100644
--- a/
Rather than special casing them, use the standard mechanisms
for tcg helper generation.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
include/exec/helper-gen.h | 1 +
include/exec/helper-head.h | 12
include/exec/helper-proto.h | 1 +
include/exec/helper-tcg.h
Signed-off-by: Hani Benhabiles
---
include/net/net.h | 1 +
net/net.c | 34 --
2 files changed, 21 insertions(+), 14 deletions(-)
diff --git a/include/net/net.h b/include/net/net.h
index 8166345..8b189da 100644
--- a/include/net/net.h
+++ b/include/net/ne
A set of patches adding completion support for various hmp commands. Following
other series that were merged earlier.
Compared to v1:
* patch 04/08: New.
* patch 05/08: Use exported list of host network devices.
Hani Benhabiles (8):
monitor: Add ringbuf_write and ringbuf_read argument completio
Signed-off-by: Hani Benhabiles
---
hmp-commands.hx | 1 +
hmp.h | 2 ++
monitor.c | 21 +
3 files changed, 24 insertions(+)
diff --git a/hmp-commands.hx b/hmp-commands.hx
index 45e1763..919af6e 100644
--- a/hmp-commands.hx
+++ b/hmp-commands.hx
@@ -975,6 +97
There is no need to clutter the user's choices with repeating the same value
multiple times.
Signed-off-by: Hani Benhabiles
---
util/readline.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/util/readline.c b/util/readline.c
index 8baec55..7214e84 100644
--- a/util/readline.c
+++ b/ut
The correct test uses the _CALL_AIX macro, not a host-specific macro.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index a198a70..31c3a7a 100644
--- a/tcg/ppc6
I'm seeing this test failure intermittently on 'make check':
ERROR:/root/qemu/tests/acpi-test.c:618:test_acpi_one: assertion failed
(signature == SIGNATURE): (0x == 0xdead)
GTester: last random seed: R02S8d0d60963e4442ce284a81d20ce32053
(32 bit ARM host, in case that makes a differenc
Signed-off-by: Hani Benhabiles
---
hmp-commands.hx | 2 ++
hmp.h | 2 ++
monitor.c | 48
3 files changed, 52 insertions(+)
diff --git a/hmp-commands.hx b/hmp-commands.hx
index f99da0e..5f1a677 100644
--- a/hmp-commands.hx
+++ b/h
This allows running PPC64 little-endian in user mode if target is configured
that way. In PPC64 LE user mode we set MSR.LE during initialization.
Signed-off-by: Doug Kwan
Signed-off-by: Tom Musta
---
V2: Overhaul handling of byteswapping in code generation and mem helpers.
V3: Eliminating MSR[
Signed-off-by: Doug Kwan
Signed-off-by: Tom Musta
---
V3: Addressing comment from Peter Maydell. Adding libdecnumber enable.
configure |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/configure b/configure
index 605a0ec..9014711 100755
--- a/configure
+++ b/config
Am 26.08.2013 23:00, schrieb Richard Henderson:
> Discontinue the jump-around-jump-to-jump scheme, trading it for a single
> immediate move instruction. The two extra jumps always consume 7 bytes,
> whereas the immediate move is either 5 or 7 bytes depending on where the
> code_gen_buffer gets loc
On 5/27/2014 4:26 PM, Richard Henderson wrote:
> Please review, and if you've got an ELFv2 system (nudge nudge), please
> give it a try and make sure it works.
Tested-by: Tom Musta
On 26 May 2014 08:19, Michael Tokarev wrote:
> Here's another trivial patches pull request.
>
> This time it accumulated 23 patches, in many areas, with a focus,
> for some reason, on libcacard, which received quite some cleanups
> and a fix for a fun bug.
>
> More interesting changes this time ar
cpu64.c contains a reginfo list for the impdef registers on
the Cortex-A57; however we forgot to actually call define_arm_cp_regs(),
so it was sitting there doing nothing. Remedy this omission.
Signed-off-by: Peter Maydell
---
target-arm/cpu64.c | 1 +
1 file changed, 1 insertion(+)
Oops. clang
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 2 +-
tcg/ppc/tcg-target.c| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 8bc2eb6..fc55525 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec
The goal is to sleep qemu whenever the guest clock
is in advance compared to the host clock (we use
the monotonic clocks). The amount of time to sleep
is calculated in the execution loop in cpu_exec.
Basically, using QEMU_CLOCK_REALTIME, we calculate
the real time duration of the execution (meanin
On Wed, 2014-05-28 at 00:22 +0200, Alexander Graf wrote:
> > +void spapr_eeh_rtas_init(sPAPREnvironment *spapr)
> > +{
> > +spapr_rtas_register("ibm,set-eeh-option",
> > +rtas_ibm_set_eeh_option);
> > +spapr_rtas_register("ibm,get-config-addr-info2",
> > +
If either the high or low pair can be resolved, we can
simplify to either a constant or to a 32-bit comparison.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 94 ++
1 file changed, 94 insertions(+)
diff --git a/tcg/optimize.c b/tcg
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 4
1 file changed, 4 insertions(+)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 31c3a7a..d3cc237 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -1414,6 +1414,10 @@ static void tcg_out_qe
On 27.05.14 10:51, Gavin Shan wrote:
The patch introduces EEH RTAS servers on sPAPR platform and handle
them there. Each sPAPRPHBVFIOState is binding with only one IOMMU
group, so it can be regarded as PE in nature. The PE address is
maintained in sPAPRPHBState, which has default value 0xfff
On 27.05.14 21:37, Alex Williamson wrote:
On Sun, 2014-05-25 at 23:36 +1000, David Gibson wrote:
On Sun, May 25, 2014 at 12:16:20PM +0200, Alexander Graf wrote:
On 24.05.14 05:12, Alexey Kardashevskiy wrote:
On 05/24/2014 07:15 AM, Alexander Graf wrote:
On 23.05.14 18:16, Alexey Kardashevski
On Tue, May 27, 2014 at 02:30:02PM -0600, Eric Blake wrote:
> On 05/27/2014 08:28 AM, Jeff Cody wrote:
> > On some image chains, QEMU may not always be able to resolve the
> > filenames properly, when updating the backing file of an image
> > after a block job.
> >
> > For instance, certain relati
On Tue, May 27, 2014 at 10:30:59PM +0100, Peter Maydell wrote:
> cpu64.c contains a reginfo list for the impdef registers on
> the Cortex-A57; however we forgot to actually call define_arm_cp_regs(),
> so it was sitting there doing nothing. Remedy this omission.
>
> Signed-off-by: Peter Maydell
The calling convention reserves space for the 8 register parameters on
the stack, so using only 6*8=48 as the offset was wrong. We never saw
this bug because we don't have any helpers with more than 5 parameters.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 2 +-
1 file changed
Now passes tcg_add_target_add_op_defs assertions, but
not complete enough to function.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 96 +-
tcg/ppc64/tcg-target.h | 2 +-
2 files changed, 96 insertions(+), 2 deletions(-)
diff --gi
On 20.05.2014 [12:44:15 +1000], Alexey Kardashevskiy wrote:
> On 05/20/2014 10:06 AM, Nishanth Aravamudan wrote:
> > On 19.05.2014 [15:37:52 -0700], Nishanth Aravamudan wrote:
> >> Hi Alexey,
> >>
> >> I've been looking at hw/ppc/spapr.c::spapr_populate_memory() and ran
> >> into a few questions:
>
On 24 May 2014 18:57, Michael Walle wrote:
> Hi Peter,
>
> Please pull.
>
> As suggested by you, system calls are now intercepted in
> lm32_cpu_do_interrupt(). Apart from that i've rebased the submitted
> patches to the latest master.
>
>
> The following changes since commit 178ac111bca16c08a79b26
On Tue, 2014-05-27 at 15:32 -0600, Alex Williamson wrote:
> We could also make a single wrapper
>
> int vfio_pci_container_ioctl(int iommu_group_id, int request, ...);
>
> I think that would make it's usage harder to get wrong than exposing a
> data element and trusting the consumer not to use it
On 05/27/2014 08:28 AM, Jeff Cody wrote:
> This allows a user to change the backing file live, of an open
> image.
Grammar; maybe:
This allows a user to make a live change to the backing file recorded in
an open image.
>
> The image file to modify can be specified 2 ways:
>
> 1) 'device' strin
On Fri, 2014-05-23 at 14:59 +1000, Alexey Kardashevskiy wrote:
> Yet another try with VFIO on SPAPR (server PPC64).
>
> After a previous try, the series was split into few smaller ones,
> first one was "spapr_pci: Prepare for VFIO" which prepares spapr_pci.
> This one is the second one and prepare
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 39 ---
1 file changed, 32 insertions(+), 7 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 635ff98..8d932eb 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-t
Some modern tool chains use VSX instructions. Therefore attempt to enable the
VSX MSR
bit by default, just like similar bits (FP, VEC, SPE, etc.).
Signed-off-by: Tom Musta
---
V3: new patch
target-ppc/translate_init.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/t
As a "utility", it only supported ppc, and in a way that other
tcg backends provided directly in tcg-target.h. Removing this
disparity is easier now that the two ppc backends are merged.
Signed-off-by: Richard Henderson
---
exec.c | 1 -
include/qemu/cache-utils.h | 44
This is a follow up to the patch series initiated by Doug Kwan
http://lists.nongnu.org/archive/html/qemu-devel/2014-05/msg01936.html
Tom Musta (5):
target-ppc: Support little-endian PPC64 in user mode.
target-ppc: Allow little-endian user mode.
target-ppc: Add a new user mode target for lit
This can significantly reduce code size for generation of (some)
64-bit constants. With the side effect that we know for a fact
that exit_tb can use the register to good effect.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.c | 105 +--
The other tcg backends that support 32- and 64-bit modes
use the 32-bit name for the port. Follow suit.
Signed-off-by: Richard Henderson
---
configure | 4 ++--
tcg/{ppc64 => ppc}/tcg-target.c | 0
tcg/{ppc64 => ppc}/tcg-target.h | 0
3 files changed, 2 insertions(+), 2 de
Instead of getting backup auxv data from the env pointer given to main,
read it from /proc/self/auxv. We can do this at any time, so we're not
tied to any ordering wrt a call to qemu_init_auxval from main.
Signed-off-by: Richard Henderson
---
include/qemu/osdep.h | 12
linux-user/m
With the TCG_REG_RA base, we can form any 2G displacement for 64-bit,
which means we only need 4 insns for the 64-bit target instead of 7.
Generate the mtctr and brctr insns once during translation and not
part of ppc_tb_set_jmp_target. This means we can update only 2 insns,
and we can arrange to
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.h | 46 +++---
1 file changed, 11 insertions(+), 35 deletions(-)
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index 29f479a..2c1cfc1 100644
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc
Good enough to run some instructions before things go awry.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 61 --
1 file changed, 39 insertions(+), 22 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index c
In preparation for supporting other ABIs.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 64 --
1 file changed, 36 insertions(+), 28 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 44abf7b..a198a70 10
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 40
1 file changed, 32 insertions(+), 8 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 02ee8e2..46d5c4c 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-
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