On 05/27/2014 08:37 PM, Alexey Kardashevskiy wrote: > Started as POWER7/8 SPRs patchset, this became a rework of book3s/970 CPU > classes initialization. > > The aim is to boot little endian guests in TCG mode with -cpu POWER8 > (ironically, POWER8 emulation still fails, debugging it now but most of the > set > is still valid). > > Please comment.
Uff. v4 is coming and it is going to be about 30 patches or so. So there is no point in spending much time on this :) > > Alexey Kardashevskiy (24): > target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs > target-ppc: Merge 970FX and 970MP into a single 970 class > target-ppc: Refactor PPC970 > target-ppc: Copy and split gen_spr_7xx() for 970 > target-ppc: Add "POWER" prefix to MMCRA PMU registers > target-ppc: Enable writes to user-privileged PMU registers > target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family > target-ppc: Add PMC7/8 to 970 class > target-ppc: Add HID4 SPR for PPC970 > target-ppc: Introduce and reuse generalized init_proc_POWER() > target-ppc: Remove check_pow_970FX > target-ppc: Enable Hypervisor State bit in MSR for POWER5+ > target-ppc: Enable PMU SPRs migration > target-ppc: Move POWER7/8 SPR registration to helpers > target-ppc: Refactor class init for POWER7/8 > target-ppc: Add POWER7's TIR SPR > target-ppc: Add POWER8's MMCR2/MMCRS SPRs > target-ppc: Add POWER8's FSCR SPR > target-ppc: Add POWER8's TM SPRs > target-ppc: Add more POWER8's branch control SPRs > target-ppc: Enable PPR and VRSAVE SPRs migration > KVM: target-ppc: Enable transactional state migration > spapr_hcall: Split h_set_mode() > spapr_hcall: Add address-translation-mode-on-interrupt resource in > H_SET_MODE > > hw/ppc/spapr_hcall.c | 114 +++-- > include/hw/ppc/spapr.h | 5 + > target-ppc/cpu-models.c | 14 +- > target-ppc/cpu.h | 112 ++++- > target-ppc/excp_helper.c | 12 +- > target-ppc/kvm.c | 38 ++ > target-ppc/machine.c | 35 ++ > target-ppc/translate_init.c | 997 > +++++++++++++++++++++++++------------------- > 8 files changed, 839 insertions(+), 488 deletions(-) > -- Alexey
