On 09/04/2011 05:52 PM, Blue Swirl wrote:
Avoid this warning by clang analyzer by defining a default case:
/src/qemu/hw/openpic.c:477:5: warning: Undefined or garbage value
returned to caller
return retval;
Signed-off-by: Blue Swirl
---
hw/openpic.c |1 +
1 files changed, 1 insertion
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B
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if qxl_send_events was called from spice server context, and then
migration had completed before a call to pipe_read, the target
guest qxl driver didn't get the interrupt. In addition,
qxl_send_events ignored further interrupts of the same kind, since
ram->int_pending was set. As a result, the gues
Signed-off-by: Yonit Halperin
---
hw/qxl.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/qxl.c b/hw/qxl.c
index de65a40..f00b5d3 100644
--- a/hw/qxl.c
+++ b/hw/qxl.c
@@ -808,7 +808,7 @@ static void qxl_exit_vga_mode(PCIQXLDevice *d)
qxl_destroy_primar
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Bui
This patch adds functions to pci.[ch] to perform PCI DMA operations. At
present, these are just stubs which perform directly cpu physical memory
accesses.
Using these stubs, however, distinguishes PCI device DMA transactions from
other accesses to physical memory, which will allow PCI IOMMU suppo
From: Eduard - Gabriel Munteanu
This updates the es1370 device emulation to use the explicit PCI DMA
functions, instead of directly calling physical memory access functions.
Signed-off-by: Eduard - Gabriel Munteanu
Signed-off-by: David Gibson
---
hw/es1370.c |5 +++--
1 files changed, 3 i
From: Eduard - Gabriel Munteanu
This updates the lsi53c895a device emulation to use the explicit PCI DMA
functions, instead of directly calling physical memory access functions.
Signed-off-by: Eduard - Gabriel Munteanu
Signed-off-by: David Gibson
---
hw/lsi53c895a.c | 30 ++-
On 09/04/2011 08:03 PM, Michael S. Tsirkin wrote:
On Sun, Sep 04, 2011 at 07:22:54PM +0300, Avi Kivity wrote:
> On 09/04/2011 07:19 PM, Michael S. Tsirkin wrote:
> >> But isn't it needed? Otherwise why don't vga accesses
> >> alias with a virtio device at 0xc3c0?
> >
> >It really depend
On 09/04/2011 07:27 PM, Blue Swirl wrote:
>> to be really necessary). So let's simply clear all queued
>> commands for the current device: */
>> -id = current_tag&0xff00;
>> -QTAILQ_FOREACH_SAFE(p,&s->queue, next, p_next) {
>>
From: Eduard - Gabriel Munteanu
This updates the eepro100 device emulation to use the explicit PCI DMA
functions, instead of directly calling physical memory access functions.
Signed-off-by: Eduard - Gabriel Munteanu
Signed-off-by: David Gibson
---
hw/eepro100.c | 113 +--
From: Eduard - Gabriel Munteanu
This updates the e1000 device emulation to use the explicit PCI DMA
functions, instead of directly calling physical memory access functions.
Signed-off-by: Eduard - Gabriel Munteanu
Signed-off-by: David Gibson
---
hw/e1000.c | 29 +++--
From: Eduard - Gabriel Munteanu
This updates the pcnet-pci device emulation to use the explicit PCI DMA
functions, instead of directly calling physical memory access functions.
Signed-off-by: Eduard - Gabriel Munteanu
Signed-off-by: David Gibson
---
hw/pcnet-pci.c |6 --
1 files chang
From: Eduard - Gabriel Munteanu
This updates the ac97 device emulation to use the explicit PCI DMA
functions, instead of directly calling physical memory access functions.
Signed-off-by: Eduard - Gabriel Munteanu
Signed-off-by: David Gibson
---
hw/ac97.c |7 ---
1 files changed, 4 ins
From: Eduard - Gabriel Munteanu
This updates the rtl8139 device emulation to use the explicit PCI DMA
functions, instead of directly calling physical memory access functions.
Signed-off-by: Eduard - Gabriel Munteanu
Signed-off-by: David Gibson
---
hw/rtl8139.c | 98 +
A while back, Eduard - Gabriel Munteanu send a series of patches
implementing support for emulating the AMD IOMMU in conjunction with
qemu emulated PCI devices. A revised patch series added support for
the Intel IOMMU, and I also send a revised version of this series
which added support for the hy
This updates the intel-hda device emulation to use the explicit PCI DMA
functions, instead of directly calling physical memory access functions.
Signed-off-by: David Gibson
---
hw/intel-hda.c | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/intel-hda.c b/h
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On Sun, Sep 04, 2011 at 12:16:43PM +0300, Michael S. Tsirkin wrote:
> On Sun, Sep 04, 2011 at 12:46:35AM +1000, David Gibson wrote:
> > On Fri, Sep 02, 2011 at 06:45:50PM +0300, Michael S. Tsirkin wrote:
> > > On Thu, Sep 01, 2011 at 04:31:09PM -0400, Paolo Bonzini wrote:
> > > > > > > Why not limi
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The Buildbot has detected a new failure on builder qmp_x86_64_debian_6_0 while
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The Buildbot has detected a new failure on builder qmp_i386_debian_6_0 while
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Build Reason:
Compile g364fb in hwlib. Two compilations less for the full build.
Signed-off-by: Blue Swirl
---
Makefile.objs|1 +
Makefile.target |2 +-
default-configs/mips-softmmu.mak |1 +
default-configs/mips64-softmmu.mak |1 +
default-co
Signed-off-by: Hervé Poussineau
---
hw/mipsnet.c | 26 ++
trace-events |7 +++
2 files changed, 13 insertions(+), 20 deletions(-)
diff --git a/hw/mipsnet.c b/hw/mipsnet.c
index 9a29ffe..605367b 100644
--- a/hw/mipsnet.c
+++ b/hw/mipsnet.c
@@ -1,12 +1,8 @@
#inc
Move mipsnet_init() function to mipssim machine
Signed-off-by: Hervé Poussineau
---
hw/mips.h |3 --
hw/mips_mipssim.c | 18
hw/mipsnet.c | 80 +++--
3 files changed, 65 insertions(+), 36 deletions(-)
diff --git a
On Thu, Sep 01, 2011 at 09:53:40PM -0400, Stefan Berger wrote:
> >Generally, what all other devices do is perform validation
> >as the last step in migration when device state
> >is restored. On failure, management can decide what to do:
> >retry migration or restart on source.
> >
> >Why is TPM sp
On 4 September 2011 18:42, Antti P Miettinen wrote:
> The emulation
> speed depends on how core intensive vs memory intensive your workload
> is. Workloads that are memory bound in the target (e.g. gzip ASCII
> compression) can me emulated much faster (e.g. factor of two) than core
> bound workloa
Allow to use ADB in non-ppc macintosh
Signed-off-by: Laurent Vivier
---
hw/adb.c |2 +-
hw/adb.h | 67 +
hw/cuda.c |1 +
hw/ppc_mac.h | 42 -
hw/ppc_newworld.c |1 +
On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote:
> This series adds support for Tensilica Xtensa target.
> Port status: Linux for DC232B works in the qemu.
> Not implemented xtensa options: MAC16, floating point coprocessor,
> boolean option, cache option, debug option.
I had minor comments
On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote:
> This is Diamond 232L Standard Core Rev.B (LE).
>
> Signed-off-by: Max Filippov
> ---
> Makefile.target | 1 +
> hw/xtensa_dc232b.c | 112
> target-xtensa/gdb-config-dc232b.c | 261
>
On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote:
> - TLB opcode group;
> - region protection option (ISA, 4.6.3);
> - region translation option (ISA, 4.6.4);
> - MMU option (ISA, 4.6.5).
>
> Cache control attribute bits are not used by this implementation.
>
> Signed-off-by: Max Filippov
> ---
On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote:
> See ISA, 4.4.4 for details.
>
> Correct (aligned as per ISA) address for unaligned access is generated
> in case this option is not enabled.
>
> Signed-off-by: Max Filippov
> ---
> target-xtensa/helper.c | 4 ++-
> target-xtensa/op_help
On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote:
> See ISA, 4.7.1 for details.
>
> Physical registers and currently visible window are separate fields in
> CPUEnv. Only current window is accessible to TCG. On operations that
> change window base helpers copy current window to and from physical
On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote:
> - mark privileged opcodes with ring check;
> - make debug exception on exception handler entry.
>
> Signed-off-by: Max Filippov
> ---
> cpu-exec.c | 6 +++
> target-xtensa/cpu.h | 67
> t
On Sun, Sep 4, 2011 at 5:19 PM, Sage Weil wrote:
> Fix leak of s->snap in failure path. Simplify error paths for the whole
> function.
>
> Reported-by: Stefan Hajnoczi
> Signed-off-by: Sage Weil
> ---
> block/rbd.c | 28 +---
> 1 files changed, 13 insertions(+), 15 de
On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote:
> Special Registers hold the majority of the state added to the processor
> by the options. See ISA, 5.3 for details.
>
> User Registers hold state added in support of designer's TIE and in some
> cases of options that Tensilica provides. See ISA
On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote:
> Sample board and sample CPU core are used for debug and may be used for
> development of custom SoC emulators.
>
> This board has two fixed size memory regions for DTCM and ITCM and
> variable length SRAM region.
>
> Signed-off-by: Max Filippov
On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote:
> Signed-off-by: Max Filippov
> ---
> Makefile.target | 2 +
> arch_init.c | 2 +
> arch_init.h | 1 +
> cpu-exec.c | 2 +
> elf.h | 2 +
> hw/xtensa_pic.c
Support bridge filtering on top of the memory
API as suggested by Avi Kivity:
Create a memory region for the bridge's address space. This region is
not directly added to system_memory or its descendants. Devices under
the bridge see this region as its pci_address_space(). The region is
as large
Julien Heyman writes:
> Hi,
>
> I was wondering if anyone had some data regarding the relative performance of
> any given ARM board emulated in QEMU versus the real thing. Yes, I do know
> this depends a lot on the host PC running qemu, but some ballpark/example
> figures would help. Say, I emulat
On Mon, Jul 04, 2011 at 12:43:58PM +0300, Michael S. Tsirkin wrote:
> This adds support for a standard pci to pci bridge,
> enabling support for more than 32 PCI devices in the system.
> To use, specify the device id as a 'bus' option.
> Example:
> -device pci-bridge,id=bridge1 \
> -net
On 4 September 2011 17:20, Avi Kivity wrote:
> Why not keep id declared in the outer scope? This extra indentation is
> annoying.
Personally I find that in a 125 line long function, declaring
a variable at function scope when it's actually used only in
a very small section of the code makes for
On Sun, Sep 04, 2011 at 07:22:54PM +0300, Avi Kivity wrote:
> On 09/04/2011 07:19 PM, Michael S. Tsirkin wrote:
> >> But isn't it needed? Otherwise why don't vga accesses
> >> alias with a virtio device at 0xc3c0?
> >
> >It really depends on the device I think.
> >
>
> It's probably the bus. I
On Thu, Sep 01, 2011 at 10:23:51PM -0400, Stefan Berger wrote:
> >>Checks are added that test
> >>- whether encryption is supported follwing the revision of the directory
> >> structure (rev>= 2)
> >You never generate rev 1 code, right?
> I did this in the previous patch that implemented rev 1 th
On Thu, Sep 01, 2011 at 09:01:32PM -0400, Stefan Berger wrote:
> >>Monitor support for 'info tpm' has been added. It for example prints the
> >>following:
> >>
> >>TPM devices:
> >> builtin: model=tpm-tis,id=tpm0
> >This mixes frontend and backend properties.
> >
> There's currently only one fron
On Thu, Sep 01, 2011 at 10:41:04PM -0400, Stefan Berger wrote:
> On 09/01/2011 01:40 PM, Michael S. Tsirkin wrote:
> >On Wed, Aug 31, 2011 at 10:36:04AM -0400, Stefan Berger wrote:
> >>This patch adds a TPM null driver implementation acting as a backend for
> >>the TIS hardware emulation. The NULL
On Thu, Sep 01, 2011 at 11:00:56PM -0400, Stefan Berger wrote:
> >Do we really have to hand-craft file reading?
> >How large is TPMPROP_TPM_MAX_NV_SPACE?
> >If not too large, we can just allocate that
> >and do a single fread call?
> Yes, I could do that, too.
> >Or, we rely on glib now - can we us
This patch removes redundant shell code and cleans it a little bit.
Shell macro compile_prog takes two arguments:
local_cflags and local ldflags.
$QEMU_CFLAGS is added automatically to the cflags, so there is no need
to pass it as an argument.
It is also unnecessary to pass -Werror twice.
$flag
On Thu, Sep 01, 2011 at 09:01:32PM -0400, Stefan Berger wrote:
> On 09/01/2011 01:14 PM, Michael S. Tsirkin wrote:
> >On Wed, Aug 31, 2011 at 10:35:52AM -0400, Stefan Berger wrote:
> >>This patch adds support for TPM command line options.
> >>The command line supported here (considering the libtpms
On Sun, Sep 4, 2011 at 4:20 PM, Avi Kivity wrote:
> On 09/04/2011 06:53 PM, Blue Swirl wrote:
>>
>> Avoid this warning from clang analyzer by adjusting the scope
>> of the variable:
>> /src/qemu/hw/lsi53c895a.c:895:5: warning: Value stored to 'id' is never
>> read
>> id = (current_tag>> 8)&
On Thu, Sep 01, 2011 at 09:24:26PM -0400, Stefan Berger wrote:
> In patch 6 I am adding a skeleton backend driver that I am
> transforming into the libtpms-based backend in patch 7. I didn't
> name the file tpm_skeleton.c but already tpm_builtin.c and all
> functions already start with the prefix t
On 09/04/2011 07:19 PM, Michael S. Tsirkin wrote:
> But isn't it needed? Otherwise why don't vga accesses
> alias with a virtio device at 0xc3c0?
It really depends on the device I think.
It's probably the bus. ISA may not decode A10-15, but if the pci/isa
bridge does, then it doesn't mat
On 09/04/2011 06:53 PM, Blue Swirl wrote:
Avoid this warning from clang analyzer by adjusting the scope
of the variable:
/src/qemu/hw/lsi53c895a.c:895:5: warning: Value stored to 'id' is never read
id = (current_tag>> 8)& 0xf;
Signed-off-by: Blue Swirl
---
hw/lsi53c895a.c | 14 +++
On Sun, Sep 04, 2011 at 06:49:34PM +0300, Avi Kivity wrote:
> On 09/04/2011 06:46 PM, Michael S. Tsirkin wrote:
> >>
> >> Why pointers? Regular fields require less upkeep.
> >
> >Good point. Why does PIIX use pointers? I just copied that ...
> >
>
> It doesn't, at least not completely:
>
>
> s
On Sun, Sep 04, 2011 at 06:46:46PM +0300, Avi Kivity wrote:
> On 09/04/2011 06:45 PM, Michael S. Tsirkin wrote:
> >On Sun, Sep 04, 2011 at 06:37:08PM +0300, Avi Kivity wrote:
> >> On 09/04/2011 06:24 PM, Michael S. Tsirkin wrote:
> >> >>
> >> >> Of course it doesn't ignore it. See the 440fx i
Fix leak of s->snap in failure path. Simplify error paths for the whole
function.
Reported-by: Stefan Hajnoczi
Signed-off-by: Sage Weil
---
block/rbd.c | 28 +---
1 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/block/rbd.c b/block/rbd.c
index 2763092.
On Sun, 4 Sep 2011, Stefan Hajnoczi wrote:
> On Sat, Sep 3, 2011 at 11:04 PM, Sage Weil wrote:
> > +failed_shutdown:
> > rados_shutdown(s->cluster);
> > + qemu_free(s->snap);
>
> Sorry for being a pain here. This patch is against an old qemu.git
> tree. All memory allocation is now using
Remove a useless variable, spotted by clang analyzer:
/src/qemu/target-sparc/op_helper.c:3904:18: warning: unused variable
'tmp' [-Wunused-variable]
target_ulong tmp = val;
The error message is actually incorrect since the variable is used.
Signed-off-by: Blue Swirl
---
target-sparc/op_helpe
Avoid this warning from clang analyzer by adjusting the scope
of the variable:
/src/qemu/hw/lsi53c895a.c:895:5: warning: Value stored to 'id' is never read
id = (current_tag >> 8) & 0xf;
Signed-off-by: Blue Swirl
---
hw/lsi53c895a.c | 14 --
1 files changed, 8 insertions(+), 6
Avoid this warning by clang analyzer by defining a default case:
/src/qemu/hw/openpic.c:477:5: warning: Undefined or garbage value
returned to caller
return retval;
Signed-off-by: Blue Swirl
---
hw/openpic.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/hw/openpic.
Avoid this warning from clang analyzer:
/src/qemu/cpu-exec.c:97:5: warning: Value stored to 'phys_page2' is never read
phys_page2 = -1;
Adjust the scope of the variable while at it.
Signed-off-by: Blue Swirl
---
cpu-exec.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff
Avoid these warnings from clang analyzer:
/src/qemu/target-i386/kvm.c:772:5: warning: Value stored to 'cwd' is never read
cwd = swd = twd = 0;
/src/qemu/target-i386/kvm.c:772:11: warning: Although the value stored
to 'swd' is used in the enclosing expression, the value is never
actually read fr
The code does not have any effect as is, fix it.
Spotted by clang analyzer:
/src/qemu/hw/hid.c:99:13: warning: Value stored to 'x1' is never read
x1 = 1;
Signed-off-by: Blue Swirl
---
hw/hid.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/hid.c b/hw/hi
On 09/04/2011 06:46 PM, Michael S. Tsirkin wrote:
>
> Why pointers? Regular fields require less upkeep.
Good point. Why does PIIX use pointers? I just copied that ...
It doesn't, at least not completely:
struct PCII440FXState {
PCIDevice dev;
MemoryRegion *system_memory;
Memor
Remove duplicate entries from SCSI command table, spotted by
clang analyzer:
/src/qemu/hw/scsi-bus.c:979:40: warning: initializer overrides prior
initialization of this subobject
[ ERASE_16 ] = "ERASE_16",
/src/qemu/hw/scsi-bus.c:978:40: note: previous initialization is here
Remove an unnecessary assignment, spotted by clang analyzer:
/src/qemu/qemu-io.c:995:9: warning: Value stored to 'offset' is never read
offset += reqs[i].qiov->size;
Signed-off-by: Blue Swirl
---
qemu-io.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/qemu-io.c
Actually, version.rc doesn't need config-host.mak but config-host.h, fix it.
Signed-off-by: Blue Swirl
---
Makefile |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/Makefile b/Makefile
index e0cf51a..7e9382f 100644
--- a/Makefile
+++ b/Makefile
@@ -116,7 +116,7 @@ ui/vnc
I run the sources through clang analyzer again and made patches for
some of the issues.
Blue Swirl (9):
win32: improve version.o dependency
qemu-io: remove unnecessary assignment
scsi-bus: remove duplicate table entries
hid: fix misassignment
kvm: remove unnecessary assignments
cpu-exe
On 09/04/2011 06:45 PM, Michael S. Tsirkin wrote:
On Sun, Sep 04, 2011 at 06:37:08PM +0300, Avi Kivity wrote:
> On 09/04/2011 06:24 PM, Michael S. Tsirkin wrote:
> >>
> >> Of course it doesn't ignore it. See the 440fx implementation, if
> >> you disable VGA access (via the SMRAM register
On Sun, Sep 04, 2011 at 06:42:42PM +0300, Avi Kivity wrote:
> On 09/04/2011 06:26 PM, Michael S. Tsirkin wrote:
> >On Sun, Sep 04, 2011 at 05:36:56PM +0300, Avi Kivity wrote:
> >> So long as we're nitpicking ...
> >
> >+static void pci_bridge_init_alias(PCIBridge *bridge, MemoryRegion *alias,
> >+
On Sun, Sep 4, 2011 at 3:31 PM, Anthony Liguori wrote:
> On 09/04/2011 10:20 AM, Blue Swirl wrote:
>>
>> On Sun, Sep 4, 2011 at 2:37 PM, Anthony Liguori
>> wrote:
>>>
>>> On 09/04/2011 08:57 AM, Anthony Liguori wrote:
On 09/04/2011 08:49 AM, Jan Kiszka wrote:
>
> On 2011-09-04 1
On Sun, Sep 04, 2011 at 06:37:08PM +0300, Avi Kivity wrote:
> On 09/04/2011 06:24 PM, Michael S. Tsirkin wrote:
> >>
> >> Of course it doesn't ignore it. See the 440fx implementation, if
> >> you disable VGA access (via the SMRAM register), vga goes away.
> >
> >Yes but that's for VGA RAM, right
On 09/04/2011 06:26 PM, Michael S. Tsirkin wrote:
On Sun, Sep 04, 2011 at 05:36:56PM +0300, Avi Kivity wrote:
> So long as we're nitpicking ...
+static void pci_bridge_init_alias(PCIBridge *bridge, MemoryRegion *alias,
+ uint8_t type, const char *name,
+
On 09/04/2011 06:24 PM, Michael S. Tsirkin wrote:
>
> Of course it doesn't ignore it. See the 440fx implementation, if
> you disable VGA access (via the SMRAM register), vga goes away.
Yes but that's for VGA RAM, right? I'm talking about the IO addresses:
are tons of aliases created as you su
On 09/04/2011 06:19 PM, Anthony Liguori wrote:
Yes, and the memory API is complicated and invasive :-) But it's worth
it at the end of the day (although I think it could be simplified at
the expensive of not allowing as much flattening).
(we should have spent a few hours at kf2011 to convince y
On 09/04/2011 10:20 AM, Blue Swirl wrote:
On Sun, Sep 4, 2011 at 2:37 PM, Anthony Liguori wrote:
On 09/04/2011 08:57 AM, Anthony Liguori wrote:
On 09/04/2011 08:49 AM, Jan Kiszka wrote:
On 2011-09-04 15:41, Anthony Liguori wrote:
On 09/04/2011 08:36 AM, Jan Kiszka wrote:
Having some sort
Please pull from
git://github.com/avikivity/qemu.git memory/batch
v2: just a rebase to make sure bisects see the rom_device fix.
Avi Kivity (22):
mips_fulong2e: convert to memory API
stellaris_enet: convert to memory API
sysbus: add helpers to add and delete memory regions t
On Sun, Sep 04, 2011 at 03:29:32PM +0200, Stefan Weil wrote:
> Commit 12d4536f7d911b6d87a766ad7300482ea663cea2 removed
> configure option --enable-io-thread.
>
> Remove help message which is now no longer valid.
>
> Cc: Anthony Liguori
> Signed-off-by: Stefan Weil
> ---
> configure |1 -
>
On Sun, Sep 04, 2011 at 03:17:46PM +0200, Stefan Weil wrote:
> Signed-off-by: Stefan Weil
> ---
> vl.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
Thanks, applied to the trivial patches -next tree:
http://repo.or.cz/w/qemu/stefanha.git/shortlog/refs/heads/trivial-patches-next
On Sun, Sep 4, 2011 at 2:43 PM, Anthony Liguori wrote:
> On 09/04/2011 09:12 AM, Avi Kivity wrote:
>>
>> On 09/04/2011 04:41 PM, Anthony Liguori wrote:
See it as you like, but we need the support, not only for device
assigment. And I do not see any gain it hacking this instead of
>>
On Sun, Sep 04, 2011 at 05:36:56PM +0300, Avi Kivity wrote:
> So long as we're nitpicking ...
OK, this should do it then.
diff --git a/hw/pci.c b/hw/pci.c
index 57ff7b1..56dfa18 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -889,7 +889,6 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
On Sun, Sep 04, 2011 at 06:14:22PM +0300, Avi Kivity wrote:
> On 09/04/2011 05:54 PM, Michael S. Tsirkin wrote:
> >> Way too late. And also won't work, since often the offset is
> >> determined by one party and the size by another.
> >
> >For things like BARs, yes - but these don't need to be
>
On Sun, Sep 4, 2011 at 2:37 PM, Anthony Liguori wrote:
> On 09/04/2011 08:57 AM, Anthony Liguori wrote:
>>
>> On 09/04/2011 08:49 AM, Jan Kiszka wrote:
>>>
>>> On 2011-09-04 15:41, Anthony Liguori wrote:
On 09/04/2011 08:36 AM, Jan Kiszka wrote:
Having some sort of global interrupt
On 09/04/2011 10:03 AM, Avi Kivity wrote:
On 09/04/2011 05:43 PM, Anthony Liguori wrote:
In fact it's exactly what we do with the memory API. Memory routing is
part of device state, yet we expose it to the memory API and let it do
its thing instead of going through the hierarchy on every single
On 09/04/2011 05:54 PM, Michael S. Tsirkin wrote:
> Way too late. And also won't work, since often the offset is
> determined by one party and the size by another.
For things like BARs, yes - but these don't need to be
that big normally. We could add an additinal API
that gets first/last para
On 09/04/2011 05:43 PM, Anthony Liguori wrote:
Pet peeve - saying something is "by definition" a hack is just rhetoric
unless the definition of device state is "something that cannot be
extracted and externalized". Let's avoid this.
Likewise, I would prefer to avoid stating that something is a
On 09/04/2011 09:03 AM, Avi Kivity wrote:
On 08/22/2011 04:12 PM, Anthony Liguori wrote:
This patch changes qemu_set_fd_handler to be implemented in terms of
g_io_add_watch(). The semantics are a bit different so some glue is
required.
qemu_set_fd_handler2 is much harder to convert because of i
On Sun, Sep 04, 2011 at 05:36:56PM +0300, Avi Kivity wrote:
> On 09/04/2011 05:21 PM, Michael S. Tsirkin wrote:
> >> >
> >> >+static pcibus_t pci_bridge_get_size(const PCIDevice *bridge, uint8_t
> >> type)
> >> >+{
> >> >+return pci_bridge_get_limit(bridge, type)>=
> >> >+pci_brid
On 09/04/2011 09:03 AM, Avi Kivity wrote:
On 08/22/2011 04:12 PM, Anthony Liguori wrote:
This patch changes qemu_set_fd_handler to be implemented in terms of
g_io_add_watch(). The semantics are a bit different so some glue is
required.
qemu_set_fd_handler2 is much harder to convert because of i
On 09/03/2011 04:01 PM, Blue Swirl wrote:
On Sat, Sep 3, 2011 at 7:53 PM, Anthony Liguori wrote:
On 08/31/2011 11:59 AM, Blue Swirl wrote:
On Wed, Aug 31, 2011 at 8:28 AM, Avi Kivitywrote:
On 08/30/2011 10:19 PM, Blue Swirl wrote:
We need some kind of two phase restore. In the fir
On 09/04/2011 09:12 AM, Avi Kivity wrote:
On 09/04/2011 04:41 PM, Anthony Liguori wrote:
See it as you like, but we need the support, not only for device
assigment. And I do not see any gain it hacking this instead of
designing it.
You can design a hack but it's still a hack.
Device state be
On 09/04/2011 08:57 AM, Anthony Liguori wrote:
On 09/04/2011 08:49 AM, Jan Kiszka wrote:
On 2011-09-04 15:41, Anthony Liguori wrote:
On 09/04/2011 08:36 AM, Jan Kiszka wrote:
Having some sort of global interrupt routing table is just going to add
a layer of complexity for very little obvious ga
On 09/04/2011 05:21 PM, Michael S. Tsirkin wrote:
> >
> >+static pcibus_t pci_bridge_get_size(const PCIDevice *bridge, uint8_t type)
> >+{
> >+return pci_bridge_get_limit(bridge, type)>=
> >+pci_bridge_get_base(bridge, type) ?
> >+pci_bridge_get_limit(bridge, type) -
>
On Sun, Sep 04, 2011 at 04:55:33PM +0300, Avi Kivity wrote:
> On 09/04/2011 04:41 PM, Michael S. Tsirkin wrote:
> >On Sun, Sep 04, 2011 at 04:05:14PM +0300, Avi Kivity wrote:
> >> It follows naturally:
> >
> >OK, so it seems the following is more or less what you suggest?
> >I'm not sure I create/
On 09/04/2011 04:41 PM, Anthony Liguori wrote:
See it as you like, but we need the support, not only for device
assigment. And I do not see any gain it hacking this instead of
designing it.
You can design a hack but it's still a hack.
Device state belongs in devices. Trying to extract device
On 08/22/2011 04:12 PM, Anthony Liguori wrote:
This patch changes qemu_set_fd_handler to be implemented in terms of
g_io_add_watch(). The semantics are a bit different so some glue is required.
qemu_set_fd_handler2 is much harder to convert because of its use of polling.
The glib main loop has
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