[Qemu-devel] The reason behind block linking constraint?

Hi, all I am trying to figure out why QEMU put some constraints on block linking (chaining). Take x86 as an example, there are two places put constraints on block linking, gen_goto_tb and cpu_exec. - gen_goto_tb (target-i386/translate.c) --- /* NOTE: we handle the

Re: [Qemu-devel] Get execution trace and tcg fatal error!

On Thu, Aug 18, 2011 at 12:14, shbi shb wrote: > Hi, > > I am new to QEMU and I need to get guest Windows instructions traceon Qemu. > I added the following codes to Qemu but I got tcg fatal error : > > 1- I added a helper function in helper.h : DEF_HELPER_1(get_trace, void, > i32) > 2- I added a

Re: [Qemu-devel] [PATCH] Fix gcc-4.6 compiler error

On 18 August 2011 05:16, Zhi Yong Wu wrote: > I have also met this problem on fedora 15 today. Currently i disable > werror option to build successfully. How to completely this problem > regardless of gcc>=4.6? Hmm, this should have been fixed by commit 257a73755. Can you tell us which git revisi

Re: [Qemu-devel] [PATCH] Fix gcc-4.6 compiler error

On Mon, Aug 1, 2011 at 8:30 AM, Anthony Liguori wrote: > On 07/29/2011 07:18 PM, Peter Maydell wrote: >> >> On 29 July 2011 20:30, Stefan Weil  wrote: >>> >>> Commit 3d3b8303c6f83b9b245bc774af530a6403cc4ce6 >>> breaks builds with gcc-4.6: >>> >>> hw/fw_cfg.c: In function ‘probe_splashfile’: >>> hw

[Qemu-devel] Get execution trace and tcg fatal error!

Hi, I am new to QEMU and I need to get guest Windows instructions traceon Qemu. I added the following codes to Qemu but I got tcg fatal error : 1- I added a helper function in helper.h : DEF_HELPER_1(get_trace, void, i32) 2- I added a function gen_helper_get_trace(pc_start) in disas_insn function

Re: [Qemu-devel] Compilation error of coroutine-win32.c with gcc version 3.4.5 (mingw-vista special r3)

2011/8/18 Blue Swirl : > On Tue, Aug 16, 2011 at 6:50 PM, Paolo Bonzini wrote: >> On 08/16/2011 05:45 AM, Stefan Hajnoczi wrote: >>> >>> Roy, >>> This stack trace does not reveal much. >>> >>> Is there any MinGW gcc user that has successfully built and run >>> qemu.git? >> >> I would be surprised

Re: [Qemu-devel] [PATCH] pci: add standard bridge device

At 08/17/2011 04:37 PM, Wen Congyang Write: > At 07/04/2011 05:43 PM, Michael S. Tsirkin Write: >> This adds support for a standard pci to pci bridge, >> enabling support for more than 32 PCI devices in the system. >> To use, specify the device id as a 'bus' option. >> Example: >> -device pci-

Re: [Qemu-devel] Multi-threaded user program support?

On 18 August 2011 03:35, 陳韋任 wrote: >  I am wondering if there is any plan to support multi-threaded > program in QEMU. I find a patch [1] which adds i386-linux-user NPTL > support, but I don't see it's merged back into the trunk. I don't > know why. Is there any consideration or difficulty on mul

[Qemu-devel] Multi-threaded user program support?

Hi, all I am wondering if there is any plan to support multi-threaded program in QEMU. I find a patch [1] which adds i386-linux-user NPTL support, but I don't see it's merged back into the trunk. I don't know why. Is there any consideration or difficulty on multi-threaded support? Thanks! Re

[Qemu-devel] [PATCH 015/111] m68k: modify movem instruction to manage word

From: Laurent Vivier This patch modifies "movem" to manage "word" and "long" register size instead of only "word". Attach it to M68000 feature. Signed-off-by: Andreas Schwab Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 52 +- 1 file

[Qemu-devel] [PATCH 4/8] next keyboard driver, only supports a subset of modifier keys

Signed-off-by: Bryce Lanham --- hw/next-kbd.c | 243 + hw/next-kbd.h |2 + 2 files changed, 245 insertions(+), 0 deletions(-) create mode 100644 hw/next-kbd.c create mode 100644 hw/next-kbd.h diff --git a/hw/next-kbd.c b/hw/next-kbd

[Qemu-devel] [PATCH 095/111] m68k: add bkpt instruction

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/translate.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 8cb2728..0a14597 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.

Re: [Qemu-devel] [PATCH] qemu-thread: add TLS wrappers

On 08/17/2011 04:50 PM, Brad wrote: - Original message - On 08/17/2011 10:28 AM, Blue Swirl wrote: GCC may support it but it can't use it on a platform if the other parts are missing (libc etc.). With a new-enough gcc, we provide the support in libgcc. I doubt gcc 4.2.1 fits the bil

[Qemu-devel] [PATCH 026/111] m68k: define fcntl constants

From: Andreas Schwab Signed-off-by: Andreas Schwab --- linux-user/syscall_defs.h | 18 ++ 1 files changed, 18 insertions(+), 0 deletions(-) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index a117407..aa94a14 100644 --- a/linux-user/syscall_defs.h +++ b/l

Re: [Qemu-devel] [PATCH] spice-qemu-char.c: Use correct printf format char for ssize_t

Ping? -- PMM On 9 August 2011 23:04, Peter Maydell wrote: > Use the correct printf format string character (%z) for ssize_t. > This fixes a compile failure on 32 bit Linux with spice enabled. > > Signed-off-by: Peter Maydell > --- > > I note that this seems to have been present since the file >

[Qemu-devel] [PATCH 077/111] m68k: add facos instruction

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 29 - target-m68k/helpers.h |1 + target-m68k/translate.c |3 +++ 3 files changed, 28 insertions(+), 5 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c

[Qemu-devel] [PATCH 4/6] hw/pl061: Convert to VMState

Convert the PL061 to VMState. We choose to widen the struct members to uint32_t rather than the other two options of breaking migration compatibility or using vmstate hacks to read/write a 32 bit value into an 8 bit struct field. Signed-off-by: Peter Maydell --- hw/pl061.c | 174 +++

[Qemu-devel] [PATCH 028/111] m68k: allow fpu to manage double data type.

From: Laurent Vivier This patch allows to manage instructions like "fcmpd #2.2, %fp0". Original function manages only data accessed through an address register. Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 48 ++ 1 files changed, 15

[Qemu-devel] [PATCH 3/6] vexpress, realview: Use pl111, not pl110

The Versatile Express, Realview EB, PBX A9 and PB A8 boards all use a PL111 for their graphics, not a PL110. Now we model the PL111, use it on these board models. Signed-off-by: Peter Maydell --- hw/realview.c |2 +- hw/vexpress.c |2 +- 2 files changed, 2 insertions(+), 2 deletions(-)

[Qemu-devel] [PATCH 5/6] hw/pl061.c: Support GPIOAMSEL register

Support the GPIOAMSEL register found on some Stellaris boards. Signed-off-by: Peter Maydell --- hw/pl061.c |9 - 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/hw/pl061.c b/hw/pl061.c index 27de824..d13746c 100644 --- a/hw/pl061.c +++ b/hw/pl061.c @@ -50,6 +50,7 @@ ty

[Qemu-devel] [PULL 0/6] misc ARM device fixes

This is a pull request for bugfixing patches to various ARM devboard devices. The patches have all been on the mailing list for a few weeks without comment; please pull. thanks -- PMM The following changes since commit 8b2a04eeb95212305d3a39170e1c4bc3dbe45e8a: scsi: do not overwrite memory on

[Qemu-devel] [PATCH 1/6] hw/pl110: Model the PL111 CLCD controller

Model the PL111 CLCD controller. This is a minor variation on the PL110; the major programmer visible differences are support for hardware cursor (unimplemented) and two new pixel formats. Since syborg_fb.c borrows the pl11x pixel drawing routines, we also update it to cope with the new slightly l

[Qemu-devel] [PATCH 2/6] versatilepb: Implement SYS_CLCD mux control register bits

On the Versatile PB, PL110 graphics adaptor only natively supports 5551 pixel format; an external mux swaps bits around to allow RGB565 and BGR565, under the control of bits [1:0] in the SYS_CLCD system register. Implement these SYS_CLCD register bits, and use a gpio line to feed them out of the s

[Qemu-devel] [PATCH 6/6] hw/stellaris: Add support for RCC2 register

From: Engin AYDOGAN Add support for the RCC2 register on Fury class devices. Based on a patch by Vijay Kumar. Signed-off-by: Engin AYDOGAN [Peter Maydell: fixed comment typos, minor cleanup of unreachable code] Signed-off-by: Peter Maydell --- hw/stellaris.c | 72 +++

[Qemu-devel] [PATCH 105/111] m68k: add fsinh instruction

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 15 +++ target-m68k/helpers.h |1 + target-m68k/translate.c |3 +++ 3 files changed, 19 insertions(+), 0 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 5d34901.

[Qemu-devel] [PATCH 024/111] m68k: add cas

From: Laurent Vivier This instruction is needed to execute commands like "ls" or "date" (from a debian lenny m68k). It define a new feaure, CAS, and attach this new instruction to it. Signed-off-by: Laurent Vivier --- target-m68k/cpu.h |3 +- target-m68k/helper.c|2 + target

Re: [Qemu-devel] [PATCH] qemu-thread: add TLS wrappers

- Original message - > On 08/17/2011 10:28 AM, Blue Swirl wrote: > > GCC may support it but it can't use it on a platform if the other > > parts are missing (libc etc.). > > With a new-enough gcc, we provide the support in libgcc. I doubt gcc 4.2.1 fits the bill. -- This message has bee

Re: [Qemu-devel] [PATCH v2 5/6] vga: Use linear mapping + dirty logging in chain 4 memory access mode

On 08/17/2011 04:38 PM, Avi Kivity wrote: The mmio code has s->plane_updated |= mask; /* only used to detect font change */ aren't we losing it? we could easily recover it via dirty logging. We can't really recover it. So I think we need to restrict the optimization to grap

[Qemu-devel] [PATCH 036/111] m68k: correct neg condition code flags computation

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/translate.c |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index cad2e26..f2bdef0 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @

[Qemu-devel] [PATCH 030/111] m68k: add FScc instruction

From: Laurent Vivier This patch allows to manage instructions like "fsge %d0". Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 82 +++ 1 files changed, 68 insertions(+), 14 deletions(-) diff --git a/target-m68k/translate.c b/target-m68

[Qemu-devel] [PATCH 032/111] m68k: add linkl instruction

From: Laurent Vivier This patch add support for link instruction with 32bit stack frame size Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 20 ++-- 1 files changed, 18 insertions(+), 2 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c

[Qemu-devel] [PATCH 021/111] m68k: add "byte", "word" and memory rotate.

From: Laurent Vivier Add rotate_im, rotate8_im, rotate16_im, rotate_reg, rotate8_reg, rotate16_reg, rotate_mem and attach them to M68000 feature. Signed-off-by: Andreas Schwab Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 149 ++ target-m68k/hel

[Qemu-devel] [PATCH 078/111] m68k: add ftan instruction

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 15 +++ target-m68k/helpers.h |1 + target-m68k/translate.c |3 +++ 3 files changed, 19 insertions(+), 0 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index bba4ae3.

Re: [Qemu-devel] [PATCH] qemu-thread: add TLS wrappers

- Original message - > On Wed, Aug 17, 2011 at 5:28 PM, Paolo Bonzini > wrote: > > On 08/17/2011 10:26 AM, Stefan Hajnoczi wrote: > > > > > > > > > > > >  Do you know which Windows gcc versions support __thread and > > > > > > > if it would be reasonable to require those versions? > > > >

[Qemu-devel] [PATCH 072/111] m68k: add flog10

From: Laurent Vivier Signed-off-by: Laurent Vivier --- fpu/softfloat.h |1 + target-m68k/helper.c| 23 ++- target-m68k/helpers.h |1 + target-m68k/translate.c |3 +++ 4 files changed, 27 insertions(+), 1 deletions(-) diff --git a/fpu/softfloat.h

Re: [Qemu-devel] [PATCH v2 5/6] vga: Use linear mapping + dirty logging in chain 4 memory access mode

On 08/17/2011 03:41 PM, Jan Kiszka wrote: From: Jan Kiszka Most VGA memory access modes require MMIO handling as they demand weird logic to get a byte from or into the video RAM. However, there is one exception: chain 4 mode with all memory planes enabled for writing. This mode actually allows l

[Qemu-devel] [PATCH 098/111] m68k: use exp2l() to compute exp2_FP0()

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c | 10 +- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index d4364f7..979c8e5 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -1456,

Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions

On 18 August 2011 00:30, Bryce Lanham wrote: > Ugh, I'm sorry about that. This is why I should test before using > unfamiliar tools. Someone suggested using git format-patch/git > send-email instead of a big patch. git send-email has a "--dry-run" option which I commend to your attention :-) --

[Qemu-devel] [PATCH 013/111] m68k: add Scc instruction with memory operand.

From: Laurent Vivier This patch defines Scc instruction for M68000 feature accessing destination operand using an effective address (existing Scc instruction manages only data registers). Signed-off-by: Andreas Schwab Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 18 ++

[Qemu-devel] [PATCH 092/111] m68k: gdb FP registers are 96 bits

From: Laurent Vivier Native gdb remotely reads floating point registers using native (extended) register size : 96 bits. Signed-off-by: Laurent Vivier --- gdb-xml/m68k-fp.xml | 21 + target-m68k/helper.c | 45 - 2 files chang

[Qemu-devel] [PATCH 064/111] m68k: more tests

From: Laurent Vivier Signed-off-by: Laurent Vivier --- .gitignore |7 +++ tests/m68k/Makefile |6 +- tests/m68k/fabs.S |9 + tests/m68k/fdiv.S | 10 ++ tests/m68k/fmove.S | 13 + tests/m68k/fmul.S |9 + tests/m68k/f

[Qemu-devel] [PATCH 080/111] m68k: add fcos instruction

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 15 +++ target-m68k/helpers.h |1 + target-m68k/translate.c |3 +++ 3 files changed, 19 insertions(+), 0 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 699f28a.

[Qemu-devel] [PATCH 056/111] m68k-linux-user: add '--enable-emulop'

From: Laurent Vivier Allow to configure if the m68k emulator must implement fake operation to allow returning from the emulator when the emulator is used with the m68k-tester tool. Signed-off-by: Laurent Vivier --- configure | 11 +++ target-m68k/cpu.h |3 +++

[Qemu-devel] [PATCH 5/8] partially working network driver, needs more comparison with real hardware before it can be made fully working

Signed-off-by: Bryce Lanham --- hw/next-net.c | 513 + hw/next-net.h |2 + 2 files changed, 515 insertions(+), 0 deletions(-) create mode 100644 hw/next-net.c create mode 100644 hw/next-net.h diff --git a/hw/next-net.c b/hw/next-net

[Qemu-devel] [PATCH 005/111] linux-user,m68k: display default cpu

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 7ca75fb..8a8b4f8 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -57,6 +57,1

[Qemu-devel] [PATCH 038/111] m68k: add EA support for negx

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 15 ++- 1 files changed, 10 insertions(+), 5 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index f2bdef0..ab2073a 100644 --- a/target-m68k/translate.c +++ b/target-m68k/

[Qemu-devel] [PATCH 012/111] m68k: add Motorola 680x0 family common instructions.

From: Laurent Vivier This patch declares existing ISA instructions belonging to previously defined 680x0 familty new features: - modify gen_lea_indexed() to manage scaled index, - declare M68000 instructions: arith_im, bitop_reg, arith_im, bitop_im, move, negx, move_from_sr, lea, clr, neg, move

Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions

Ugh, I'm sorry about that. This is why I should test before using unfamiliar tools. Someone suggested using git format-patch/git send-email instead of a big patch. Apologies, Bryce Lanham On Wed, Aug 17, 2011 at 5:35 PM, Anthony Liguori wrote: > On 08/17/2011 03:46 PM, Bryce Lanham wrote: >> >>

[Qemu-devel] [PATCH 052/111] m68k: correct flags with negl

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/translate.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 52da485..4f2a5ee 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@

[Qemu-devel] [PATCH 109/111] m68k: first draft of q800 emulation (not working)

From: Laurent Vivier Signed-off-by: Laurent Vivier --- Makefile.target |1 + hw/m68k_mac.c| 176 ++ hw/mcf5208.c |2 +- target-m68k/helper.c | 27 +++- 4 files changed, 201 insertions(+), 5 deletions(-) create

[Qemu-devel] [PATCH 034/111] m68k: correct typo on f64_to_i32() return type.

From: Laurent Vivier It returns i32, not f32. Signed-off-by: Laurent Vivier --- target-m68k/helpers.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-m68k/helpers.h b/target-m68k/helpers.h index 50f5486..4bfb149 100644 --- a/target-m68k/helpers.h +++ b/target-m

[Qemu-devel] [PATCH 011/111] m68k: add missing accessing modes for some instructions.

From: Laurent Vivier This patch modifies following instructions to allow them to manage data size other than "long", by adding "byte" and "word" data size: "addsub", "arith_im", "addsubq", "or", "eor", "and". This patch modifies following instructions to use EA to access data: "neg", "not". Sig

[Qemu-devel] [PATCH 039/111] m68k: add abcd instruction

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 38 ++ target-m68k/helpers.h |2 ++ target-m68k/translate.c | 32 3 files changed, 72 insertions(+), 0 deletions(-) diff --git a/targe

Re: [Qemu-devel] [Question] PCI-to-PCI bridge

On 08/17/11 04:41, Wen Congyang wrote: At 08/16/2011 09:40 PM, Gerd Hoffmann Write: There is one in hw/dec_pci.c. This isn't compiled by default, but that is just a configuration issue. I had some IRQ routing issues with that one though. Yes, I found this device. Do you mean there are some I

[Qemu-devel] [PATCH 1/8] added next source files to Makefile.target

Signed-off-by: Bryce Lanham --- Makefile.target |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/Makefile.target b/Makefile.target index 43624dc..ad0bd6b 100644 --- a/Makefile.target +++ b/Makefile.target @@ -316,6 +316,7 @@ obj-microblaze-$(CONFIG_FDT) += device_tree.o

[Qemu-devel] [PATCH 007/111] linux-user: define a script to set binfmt using debian flavored tools

From: Laurent Vivier Signed-off-by: Laurent Vivier --- scripts/set_binfmt_m68k |8 1 files changed, 8 insertions(+), 0 deletions(-) create mode 100755 scripts/set_binfmt_m68k diff --git a/scripts/set_binfmt_m68k b/scripts/set_binfmt_m68k new file mode 100755 index 000..fb3d72

[Qemu-devel] [PATCH 009/111] m68k: add tcg_gen_debug_insn_start()

From: Laurent Vivier This patch add debug info by writing the PC of the corresponing CPU instruction of an TCG opcode. Signed-off-by: Andreas Schwab Signed-off-by: Laurent Vivier --- target-m68k/translate.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/target-m68k

[Qemu-devel] [PATCH 059/111] m68k: add m68030 definition

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 875ff45..1bb0cef 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -33,6 +33,7 @

[Qemu-devel] [PATCH 061/111] m68k: remove useless file m68k-qreg.h

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/m68k-qreg.h | 11 --- 1 files changed, 0 insertions(+), 11 deletions(-) delete mode 100644 target-m68k/m68k-qreg.h diff --git a/target-m68k/m68k-qreg.h b/target-m68k/m68k-qreg.h deleted file mode 100644 index c224d5e

[Qemu-devel] [PATCH 7/8] added move16, cinva, pflush instructions, and disabled abort on execution of frestore/fsave

Signed-off-by: Bryce Lanham --- target-m68k/translate.c | 108 ++- 1 files changed, 97 insertions(+), 11 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 0be011e..1975a06 100644 --- a/target-m68k/translate.c +++ b/tar

[Qemu-devel] [PATCH 096/111] m68k: correctly convert floatx80<->long double

From: Laurent Vivier manage correctly NaN and infinity. Signed-off-by: Laurent Vivier --- target-m68k/helper.c | 157 + 1 files changed, 93 insertions(+), 64 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 1aef50f..1

[Qemu-devel] [PATCH 071/111] m68k: correct cmpa comparison datatype

From: Laurent Vivier Even if cmpa uses an 16 bits source data, the comparison with the register is done on 32 bits. This allows to run "gcc hello.c" without segfault. Signed-off-by: Laurent Vivier --- target-m68k/translate.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --

[Qemu-devel] [PATCH 022/111] m68k: add bitfield_mem, bitfield_reg

From: Laurent Vivier This patch implements bitfields instructions: bftst, bfextu, bfexts, bfffo, bfchg, bfclr, bfset, bfins and attach them to BITFIELD feature. Signed-off-by: Andreas Schwab Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 27 target-m68k/helpers.h |3

[Qemu-devel] [PATCH 051/111] m68k: correct divs.w and divu.w

From: Laurent Vivier - the source register to be divided is a 32bit, so don't extend the 16bit value sign - don't modify the destination operand on overflow - don't modify N and Z flags on overflow (documentation says "undefined" but real 68040 is doing like this) Signed-off-by: Laurent

[Qemu-devel] [PATCH 066/111] m68k: add fgetexp

From: Laurent Vivier Signed-off-by: Laurent Vivier --- .gitignore |1 + target-m68k/helper.c| 17 + target-m68k/helpers.h |1 + target-m68k/translate.c |3 +++ tests/m68k/Makefile |2 +- tests/m68k/fgetexp.S|8 6 files ch

[Qemu-devel] [PATCH 102/111] m68k: add fcosh instruction

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 15 +++ target-m68k/helpers.h |1 + target-m68k/translate.c |3 +++ 3 files changed, 19 insertions(+), 0 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 0c60093.

[Qemu-devel] [PATCH 014/111] m68k: add DBcc instruction.

From: Laurent Vivier Define DBcc instruction and attach it to M68000 feature. Signed-off-by: Andreas Schwab Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 26 ++ 1 files changed, 26 insertions(+), 0 deletions(-) diff --git a/target-m68k/translate.c b/ta

[Qemu-devel] [PATCH 5/6] tcg-ia64: Fix typos in AREG0 setup in prologue.

Signed-off-by: Richard Henderson --- tcg/ia64/tcg-target.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c index 6386a5b..9db205d 100644 --- a/tcg/ia64/tcg-target.c +++ b/tcg/ia64/tcg-target.c @@ -2308,8 +2308,8 @@ static v

[Qemu-devel] [PATCH 035/111] m68k: improve CC_OP_LOGIC

From: Laurent Vivier Add support for all opsize (byte, word) instead of only long. On 680x0, don't clear/modify the X flag. Signed-off-by: Laurent Vivier --- target-m68k/cpu.h |2 + target-m68k/helper.c| 31 +++-- target-m68k/translate.c | 70 +

[Qemu-devel] [PATCH 110/111] m68k: add movec instruction

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helpers.h |3 ++- target-m68k/translate.c | 11 --- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/target-m68k/helpers.h b/target-m68k/helpers.h index 373660e..d321874 100644 --- a/target-m68k/he

[Qemu-devel] [PATCH 063/111] m68k: some FPU debugging macros

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c | 69 +++-- 1 files changed, 60 insertions(+), 9 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 081e1d9..7dcac61 100644 --- a/target-m68k/helpe

[Qemu-devel] [PATCH 081/111] m68k: correct fpcr update

From: Laurent Vivier allow to run metacity Signed-off-by: Laurent Vivier --- target-m68k/translate.c |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 96586ae..91355ba 100644 --- a/target-m68k/translate.c +++ b/ta

[Qemu-devel] [PATCH 017/111] m68k: add 32bit and 64bit multiply

From: Laurent Vivier This patch modify "mull" to support 64bit result, and to update CC on 32bit operands. Signed-off-by: Andreas Schwab Signed-off-by: Laurent Vivier --- target-m68k/helpers.h |4 +++ target-m68k/op_helper.c | 66 +++ target

[Qemu-devel] [PATCH 023/111] m68k: add variable offset/width to bitfield_reg/bitfield_mem

From: Laurent Vivier This patch allows bitfield instructions to read bit offset and field size from a register instead of an immediat value. Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 50 + target-m68k/helpers.h |2 + target-m68k/translate.c | 515

[Qemu-devel] [PATCH 046/111] m68k: improve asl/asr evaluate correclty the missing V flag

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 49 ++ target-m68k/helpers.h |3 ++ target-m68k/translate.c | 36 - 3 files changed, 77 insertions(+), 11 deletions(-) diff --g

[Qemu-devel] [PATCH 4/6] tcg-hppa: Fix CPU_TEMP_BUF_NLONGS oversight.

Signed-off-by: Richard Henderson --- tcg/hppa/tcg-target.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c index 222f33e..71d9677 100644 --- a/tcg/hppa/tcg-target.c +++ b/tcg/hppa/tcg-target.c @@ -1650,7 +1650,7 @@ static voi

[Qemu-devel] [PATCH 044/111] m68k: improve addx instructions Add (byte, word) opsize Add memory access

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 48 ++- target-m68k/helpers.h |4 ++- target-m68k/translate.c | 58 +++--- 3 files changed, 104 insertions(+), 6 deletions(-) d

[Qemu-devel] [PATCH 002/111] linux-user: add qemu-wrapper

From: Laurent Vivier Signed-off-by: Laurent Vivier --- Makefile.target |8 +++- configure |9 linux-user/qemu-wrapper.c | 97 + 3 files changed, 113 insertions(+), 1 deletions(-) create mode 100644 linux-user/

[Qemu-devel] [PATCH 3/8] next framebuffer driver, very basic, only supports running under 32 bit color at the moment

Signed-off-by: Bryce Lanham --- hw/next-fb.c | 102 ++ hw/next-fb.h | 14 2 files changed, 116 insertions(+), 0 deletions(-) create mode 100644 hw/next-fb.c create mode 100644 hw/next-fb.h diff --git a/hw/next-fb.c b/hw/next-

[Qemu-devel] [PATCH 049/111] m68k: asl/asr, clear C flag if shift count is 0

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index a3a6108..5800a4f 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -808,7 +808,

[Qemu-devel] [PATCH 031/111] m68k: add single data type to gen_ea

From: Laurent Vivier This patch allows to have instructions like "fcmps #0.1,%fp1". Signed-off-by: Laurent Vivier --- target-m68k/translate.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 3917243..38be7ab 100644

[Qemu-devel] [PATCH 065/111] m68k: correct compute gen_bitfield_cc()

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/translate.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index d4a7074..6bba2c9 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@

[Qemu-devel] [PATCH 048/111] m68k: correct shift side effect for roxrl and roxll

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c | 10 -- 1 files changed, 8 insertions(+), 2 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index bdfe9aa..a3a6108 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -915,7

[Qemu-devel] [PATCH 069/111] m68k: add fetox and flogn

From: Laurent Vivier Signed-off-by: Laurent Vivier --- fpu/softfloat.h |2 ++ target-m68k/helper.c| 38 -- target-m68k/helpers.h |2 ++ target-m68k/translate.c |6 ++ tests/m68k/Makefile |2 +- tests/m68k/fetox.S |

[Qemu-devel] [PATCH 6/6] tcg-arm: Make tcg_out_addi inline

As it's not used, fixes a compilation error. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 93eb0f1..c94a354 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-

[Qemu-devel] [PATCH 108/111] m68k: add fatanh instruction

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 15 +++ target-m68k/helpers.h |1 + target-m68k/translate.c |5 - 3 files changed, 20 insertions(+), 1 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index f9a35d

[Qemu-devel] [PATCH 058/111] m68k: correctly compute divul

From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/op_helper.c | 28 +--- 1 files changed, 13 insertions(+), 15 deletions(-) diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c index d180c80..6c3144e 100644 --- a/target-m68k/op_helper.c +++

[Qemu-devel] [PATCH 033/111] m68k: Add fmovecr

From: Laurent Vivier This patch allows to read constant from the FPU ROM. It implements instructions like "fmovecrx #0,%fp0" (which loads Pi to %fp0). Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 33 + target-m68k/helpers.h |1 + target-m6

[Qemu-devel] [PATCH 067/111] m68k: add fscale

From: Laurent Vivier Signed-off-by: Laurent Vivier --- .gitignore |1 + target-m68k/helper.c| 17 + target-m68k/helpers.h |1 + target-m68k/translate.c |4 tests/m68k/Makefile |2 +- tests/m68k/fscale.S |9 + 6 files

[Qemu-devel] [PATCH 019/111] m68k: add fpu

From: Laurent Vivier Modify "fpu" instruction to be compatible with 680x0 family and attach it to FPU feature (in addition to CF_FPU). Signed-off-by: Andreas Schwab Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 49 -- 1 files changed

[Qemu-devel] [PATCH 008/111] linux-user: define default cpu model in configure instead of linux-user/main.c

From: Laurent Vivier Signed-off-by: Laurent Vivier --- configure |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/configure b/configure index 46b49e0..40b1fa9 100755 --- a/configure +++ b/configure @@ -3251,6 +3251,7 @@ case "$target_arch2" in cris) target_nptl="

[Qemu-devel] [PATCH v2 3/6] vmware-vga: Remove dead DIRECT_VRAM mode

From: Jan Kiszka The code was disabled since day 1 of vmware-vga, and now it does not even build anymore. Time for a cleanup. CC: Andrzej Zaborowski Signed-off-by: Jan Kiszka --- hw/vmware_vga.c | 172 ++- 1 files changed, 30 insertions(+),

[Qemu-devel] [PATCH v2 5/6] vga: Use linear mapping + dirty logging in chain 4 memory access mode

From: Jan Kiszka Most VGA memory access modes require MMIO handling as they demand weird logic to get a byte from or into the video RAM. However, there is one exception: chain 4 mode with all memory planes enabled for writing. This mode actually allows lineary mapping, which can then be combined

[Qemu-devel] [PATCH v2 6/6] vga: Drop some unused fields

From: Jan Kiszka Memory region refactorings obsoleted them. CC: Avi Kivity Signed-off-by: Jan Kiszka --- hw/vga_int.h |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/hw/vga_int.h b/hw/vga_int.h index 2b13b9d..2b9fa7e 100644 --- a/hw/vga_int.h +++ b/hw/vga_int.h @@ -1

[Qemu-devel] [PATCH v2 4/6] vmware-vga: Eliminate vga_dirty_log_restart

From: Jan Kiszka After the conversion to the new Memory API, vga_dirty_log_restart became seriously pointless. Remove it from vmware-vga and and then finally drop the service. CC: Andrzej Zaborowski CC: Avi Kivity Signed-off-by: Jan Kiszka --- hw/vga.c|6 -- hw/vga_int.h|

[Qemu-devel] [PATCH v2 1/6] vmware-vga: Register reset service

From: Jan Kiszka Fixes cold reset in vmware graphic modes. Reviewed-by: Andrzej Zaborowski Signed-off-by: Jan Kiszka --- hw/vmware_vga.c |9 ++--- 1 files changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c index d5cfa70..3626bb0 100644 --- a/hw/vm

[Qemu-devel] [PATCH v2 0/6] vga: dirty log cleanup, more linear mapping

This is a rebased, memory region-aware version of the original series I sent a few weeks back. It no longer eliminates log_start/stop CPUPhysMemoryClient callbacks, but it still - accelerates chain 4 vga mode under KVM - fixes reset of vmware-vga - cleans up vmware-vga a bit Patch 1 is still a

[Qemu-devel] [PATCH v2 2/6] vmware-vga: Disable verbose mode

From: Jan Kiszka Elimiates 'vmsvga_value_write: guest runs Linux.' messages from the console. CC: Andrzej Zaborowski Signed-off-by: Jan Kiszka --- hw/vmware_vga.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c index 3626bb0..7a22d6a

[Qemu-devel] [PATCH 2/8] main next driver, needs a bit of cleanup

Signed-off-by: Bryce Lanham --- hw/next-cube.c | 471 1 files changed, 471 insertions(+), 0 deletions(-) create mode 100644 hw/next-cube.c diff --git a/hw/next-cube.c b/hw/next-cube.c new file mode 100644 index 000..37e3c17 --- /dev

[Qemu-devel] [PATCH 029/111] m68k: allow fpu to manage double data type with fmove to

From: Laurent Vivier This patch allows to manage instructions like "fmoved %fp0,%fp@(-512)". Original function manages double data only through an address register. Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 73 +- 1 files changed

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