From: Laurent Vivier <laur...@vivier.eu>
Define DBcc instruction and attach it to M68000 feature.
Signed-off-by: Andreas Schwab <sch...@linux-m68k.org>
Signed-off-by: Laurent Vivier <laur...@vivier.eu>
---
target-m68k/translate.c | 26 ++++++++++++++++++++++++++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 8cf49d8..e0edc6d 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -920,6 +920,31 @@ DISAS_INSN(scc_mem)
tcg_temp_free(dest);
}
+DISAS_INSN(dbcc)
+{
+ int l1;
+ TCGv reg;
+ TCGv tmp;
+ int16_t offset;
+ uint32_t base;
+
+ reg = DREG(insn, 0);
+ base = s->pc;
+ offset = ldsw_code(s->pc);
+ s->pc += 2;
+ l1 = gen_new_label();
+ gen_jmpcc(s, (insn >> 8) & 0xf, l1);
+
+ tmp = tcg_temp_new();
+ tcg_gen_ext16s_i32(tmp, reg);
+ tcg_gen_addi_i32(tmp, tmp, -1);
+ gen_partset_reg(OS_WORD, reg, tmp);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
+ gen_jmp_tb(s, 1, base + offset);
+ gen_set_label(l1);
+ gen_jmp_tb(s, 0, s->pc);
+}
+
DISAS_INSN(undef_mac)
{
gen_exception(s, s->pc - 2, EXCP_LINEA);
@@ -2991,6 +3016,7 @@ void register_m68k_insns (CPUM68KState *env)
INSN(scc, 50c0, f0f8, CF_ISA_A);
INSN(scc_mem, 50c0, f0c0, M68000);
INSN(scc, 50c0, f0f8, M68000);
+ INSN(dbcc, 50c8, f0f8, M68000);
INSN(tpf, 51f8, fff8, CF_ISA_A);
/* Branch instructions. */
--
1.7.2.3
