I was bitten by that too so :
Acked-by: Lionel Landwerlin
On 27/01/17 18:47, Bas Nieuwenhuizen wrote:
Had someone that tried --with-vulkan-drivers=radv, this will guide
people in the right direction.
Signed-off-by: Bas Nieuwenhuizen
CC:
---
configure.ac | 2 +-
1 file changed, 1
On 27/01/17 09:57, Juan A. Suarez Romero wrote:
On Fri, 2017-01-27 at 09:46 +, Lionel Landwerlin wrote:
But what the test does is calling OpSpecConstantOp[2], which is the
operation we are patching here.
And according to the spec, "all Operands must be the s of other
constant instruc
hopefully explained clearly enough in patch 5.
Cheers,
Lionel Landwerlin (7):
compiler: add missing enums for debug
spirv: add SPV_KHR_shader_draw_parameters support
anv: limit vertex buffers to 31
anv: move BaseVertexID/BaseInstanceID vertex buffer index to 31
anv: always allocate a vertex
(see
vec4_vs_visitor::setup_attributes). Therefore we need to allocate an
element for the SGVS elements as long as at least one of the SGVS
element is needed by the shader. Otherwise our shader we use a
gl_DrawIDARB value pull from the URB one element too far (probably
garbage).
Signed-off-by: Lionel Landwe
Signed-off-by: Lionel Landwerlin
---
src/compiler/spirv/nir_spirv.h | 1 +
src/compiler/spirv/spirv_to_nir.c | 4
src/compiler/spirv/vtn_variables.c | 12
3 files changed, 17 insertions(+)
diff --git a/src/compiler/spirv/nir_spirv.h b/src/compiler/spirv/nir_spirv.h
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_device.c| 4 ++--
src/intel/vulkan/anv_private.h | 2 +-
src/intel/vulkan/genX_pipeline.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index
Signed-off-by: Lionel Landwerlin
---
src/compiler/shader_enums.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/compiler/shader_enums.c b/src/compiler/shader_enums.c
index 3c5a268687..e704c95a6b 100644
--- a/src/compiler/shader_enums.c
+++ b/src/compiler/shader_enums.c
@@ -208,6
Enables 10 tests from:
dEQP-VK.draw.shader_draw_parameters.*
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_device.c | 4
src/intel/vulkan/anv_pipeline.c | 1 +
2 files changed, 5 insertions(+)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/genX_cmd_buffer.c | 2 +-
src/intel/vulkan/genX_pipeline.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index f7894a0574..91b97abec6 100644
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/genX_cmd_buffer.c | 43 +-
src/intel/vulkan/genX_pipeline.c | 25 +-
2 files changed, 62 insertions(+), 6 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel
onel)
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/genX_pipeline.c | 12
1 file changed, 12 deletions(-)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 9629ca9bf9..4c1afd0319 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vu
On 01/02/17 02:35, Anuj Phogat wrote:
On Tue, Jan 31, 2017 at 7:00 AM, Lionel Landwerlin
wrote:
Enables 10 tests from:
dEQP-VK.draw.shader_draw_parameters.*
and I assume they all pass with this series.
Yes :)
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_device.c | 4
eeing any real good way to do
that in the indirect draw case so let's go ahead and drop the limit to
31 for now and figure out how to be more clever later.
Just gave a try to buffer 33 on Kabylake, that didn't work :(
So I think we're stuck with 31 for now.
On Tue
v2: use define for buffer ID (Jason)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Anuj Phogat
---
src/intel/vulkan/anv_private.h | 2 ++
src/intel/vulkan/genX_cmd_buffer.c | 2 +-
src/intel/vulkan/genX_pipeline.c | 2 +-
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/src
v2: use define for buffer ID (Jason)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Anuj Phogat
---
src/intel/vulkan/anv_private.h | 3 ++-
src/intel/vulkan/genX_cmd_buffer.c | 42 +-
src/intel/vulkan/genX_pipeline.c | 25 ++-
3
Reviewed-by: Lionel Landwerlin
On 02/02/17 04:07, Jason Ekstrand wrote:
The only mechanism Vulkan provides for disabling stencil writes is to set
the stencil write mask to 0. Since that is dynamic state, we have to move
handle it late during command buffer builder. This helps Dota2 by a
Reviewed-by: Lionel Landwerlin
On 02/02/17 06:11, Jason Ekstrand wrote:
---
src/intel/genxml/gen9.xml | 28
1 file changed, 28 insertions(+)
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 671322b..ec29d13 100644
--- a/src/intel/genxml
Reviewed-by: Lionel Landwerlin
On 02/02/17 01:43, Jason Ekstrand wrote:
In order to get good performance numbers for this, I had to hack up the
driver to whack wm_prog_data::uses_kill to true to emulate a discard and
used the Sascha "shadowmapping" demo. Setting uses_kill to true d
Oops, miss on the v2.
Indeed clearing up the variables in case info == NULL is good!
Reviewed-by: Lionel Landwerlin
On 02/02/17 04:12, Jason Ekstrand wrote:
In order to get good performance numbers for this, I had to hack up the
driver to whack wm_prog_data::uses_kill to true to emulate a
Thanks, that's pretty clean :)
Reviewed-by: Lionel Landwerlin
On 02/02/17 01:43, Jason Ekstrand wrote:
This seemed to help Dota 2 by a percent or two.
---
src/intel/vulkan/genX_pipeline.c | 133 +--
1 file changed, 99 insertions(+), 34 deletions(-)
Not sure what happened to patches 1,2 & 4...
If you have a branch somewhere, I'll give the remaining Rbs here.
Thanks
On 02/02/17 01:43, Jason Ekstrand wrote:
This little series does a few little cleanups as well as implements the PMA
fix on Broadwell. The cleanups are focussed around letting
Oh, ignore me, my mail client is a bit crap :(
On 02/02/17 11:08, Lionel Landwerlin wrote:
Not sure what happened to patches 1,2 & 4...
If you have a branch somewhere, I'll give the remaining Rbs here.
Thanks
On 02/02/17 01:43, Jason Ekstrand wrote:
This little series does a f
Reviewed-by: Lionel Landwerlin
On 02/02/17 01:43, Jason Ekstrand wrote:
---
src/intel/vulkan/genX_pipeline.c | 34 ++
1 file changed, 18 insertions(+), 16 deletions(-)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index
Reviewed-by: Lionel Landwerlin
On 02/02/17 01:43, Jason Ekstrand wrote:
---
src/intel/genxml/gen8.xml | 21 +
1 file changed, 21 insertions(+)
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 970e637..32ed764 100644
--- a/src/intel/genxml/gen8
Reviewed-by: Lionel Landwerlin
The documentation has the following sentence for both CACHE_MODE_0 &
CACHE_MODE_1 :
"Before changing the value of this register, GFX pipeline must be
idle i.e. full flush is required."
That seems coherent with a command stream stall.
On
Reviewed-by: Lionel Landwerlin
On 08/02/17 14:58, Samuel Iglesias Gonsálvez wrote:
Signed-off-by: Samuel Iglesias Gonsálvez
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
---
src/mesa/drivers/dri/i965/brw_fs_lower_d2x.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion
Reviewed-by: Lionel Landwerlin
On 08/02/17 14:58, Samuel Iglesias Gonsálvez wrote:
Signed-off-by: Samuel Iglesias Gonsálvez
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src
Reviewed-by: Lionel Landwerlin
On 08/02/17 14:58, Samuel Iglesias Gonsálvez wrote:
Signed-off-by: Samuel Iglesias Gonsálvez
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
---
src/compiler/glsl/glsl_to_nir.cpp | 1 +
src/compiler/nir/nir_opcodes.py | 1 +
2 files changed, 2
Reviewed-by: Lionel Landwerlin
On 08/02/17 14:58, Samuel Iglesias Gonsálvez wrote:
Signed-off-by: Samuel Iglesias Gonsálvez
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 15 +--
1 file changed, 13 insertions(+), 2
Reviewed-by: Lionel Landwerlin
On 08/02/17 14:58, Samuel Iglesias Gonsálvez wrote:
From: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
Reviewed-by: Lionel Landwerlin
On 08/02/17 14:58, Samuel Iglesias Gonsálvez wrote:
From: Jason Ekstrand
This fixes 143 of the new piglit tests added by Nicolai
Cc: Ian Romanick
---
.../dri/i965/brw_fs_channel_expressions.cpp| 48 +++---
1 file changed, 24
Reviewed-by: Lionel Landwerlin
On 08/02/17 14:58, Samuel Iglesias Gonsálvez wrote:
Signed-off-by: Samuel Iglesias Gonsálvez
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src
first error.
This commit also makes the QueuePresentKHR() implementation return the
first error encountered.
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_wsi.c | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/src/intel/vulkan/anv_wsi.c
Reviewed-by: Lionel Landwerlin
On 11/02/17 05:36, Jason Ekstrand wrote:
This fixes a "statement with no effect" compiler warning
---
src/intel/vulkan/genX_cmd_buffer.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_b
Reviewed-by: Lionel Landwerlin
On 10/02/17 23:52, Jason Ekstrand wrote:
Cc: "17.0"
---
src/mesa/drivers/dri/i965/brw_sampler_state.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c
b/src/mesa/driver
Reviewed-by: Lionel Landwerlin
On 10/02/17 23:52, Jason Ekstrand wrote:
Cc: "17.0 13.0"
---
src/mesa/drivers/dri/i965/brw_sampler_state.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c
b/src/mesa/d
Reviewed-by: Lionel Landwerlin
On 10/02/17 23:52, Jason Ekstrand wrote:
Fixes two GL ES 3.0 CTS tests on Sandy Bridge:
ES3-CTS.functional.texture.mipmap.cube.base_level.linear_linear
ES3-CTS.functional.texture.mipmap.cube.base_level.linear_nearest
Cc: "17.0 13.0"
---
src/mesa/d
Run this by our CI earlier today and got a few failures :
dEQP-VK.image.load_store.buffer.r8g8b8a8_snorm
dEQP-VK.image.load_store.buffer.r8g8b8a8_unorm
dEQP-VK.image.format_reinterpret.buffer.r32_uint_r8g8b8a8_snorm
dEQP-VK.image.format_reinterpret.buffer.r8g8b8a8_uint_r8g8b8a8_unorm
dEQP-VK.imag
dim != GLSL_SAMPLER_DIM_SUBPASS_MS)
This condition is incorrect, now that you moved it here, it should be
if (dim == GLSL_SAMPLER_DIM_SUBPASS ||
dim == GLSL_SAMPLER_DIM_SUBPASS_MS)
With that fixed, this patch is :
Reviewed-by: Lionel Landwerlin
+pipe_binding[i].inp
Reviewed-by: Lionel Landwerlin
On 13/02/17 17:19, Jason Ekstrand wrote:
This adds two columns to the format table as well as two helpers for
determining whether or not a given format is supported for typed reads
and writes.
---
src/intel/isl/isl.h| 4 +
src/intel/isl/isl_format.c
Reviewed-by: Lionel Landwerlin
On 14/02/17 10:34, Alex Smith wrote:
Allow that capability if the driver indicates that it is supported, and
flag whether images are read-only/write-only in the nir_variable (based
on the NonReadable and NonWritable decorations), which drivers may need
to
On 14/02/17 11:19, Iago Toral wrote:
On Tue, 2017-02-14 at 09:46 +, Alex Smith wrote:
On 14 February 2017 at 08:45, Iago Toral wrote:
On Mon, 2017-02-13 at 16:29 +, Lionel Landwerlin wrote:
Run this by our CI earlier today and got a few failures :
dEQP
Reviewed-by: Lionel Landwerlin
On 13/02/17 16:38, Jason Ekstrand wrote:
This makes our driver robust to changes in spirv_to_nir which would set
this flag on the variable. Right now, our driver relies on spirv_to_nir
*not* setting var->data.image.write_only for correctness. Any patch
wh
Reviewed-by: Lionel Landwerlin
Thanks!
On 14/02/17 18:26, Jason Ekstrand wrote:
This changes the way anv_entrypoints_gen.py works from generating a
table containing every single entrypoint in the XML to just the ones
that we actually need. There's no reason for us to burn entrypoint
Reviewed-by: Lionel Landwerlin
On 15/02/17 08:26, Dave Airlie wrote:
From: Dave Airlie
This was falling into the quantizetof16 path.
Signed-off-by: Dave Airlie
---
src/compiler/spirv/vtn_alu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/spirv
Hey Samuel,
I think you forgot to define the default value for our driver.
I'm not too familiar with this code. Is there a way to have default
values for all dri drivers?
Thanks,
-
Lionel
On 15/02/17 16:42, Samuel Pitoiset wrote:
On 02/15/2017 05:36 PM, Mark Janes wrote:
With this series
Signed-off-by: Lionel Landwerlin
Fixes: 9d16f3903e2 ("driconf: add allow_higher_compat_version option")
---
src/mesa/drivers/dri/i965/intel_screen.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_scre
ivers. Let me know if you're
interested in doing this, I'd love to try potential patches.
Cheers,
Lionel Landwerlin (4):
run: add -j option to select number of threads
run: add -o option to override loaded driver
run: set INTEL_NO_HW together with INTEL_DEVID_OVERRIDE
add specia
Signed-off-by: Lionel Landwerlin
---
run.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/run.c b/run.c
index 2654bff..d2ec8c6 100644
--- a/run.c
+++ b/run.c
@@ -307,7 +307,7 @@ const struct platform platforms[] = {
void print_usage(const char *prog_name
Signed-off-by: Lionel Landwerlin
---
run.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/run.c b/run.c
index d2ec8c6..62c19c8 100644
--- a/run.c
+++ b/run.c
@@ -307,7 +307,7 @@ const struct platform platforms[] = {
void print_usage(const char *prog_name
dware that doesn't have a /dev/dri/renderD128.
Example :
./intel_run -j70 -pskl -oi965 shaders
Signed-off-by: Lionel Landwerlin
---
Makefile | 10 ++-
intel_run| 5 ++
intel_stub.c | 237 +++
3 files changed, 251 insert
Since we're already asking the driver to generate code for a different
hardware than what we're running on, better not even bother with emitting
any batch.
Signed-off-by: Lionel Landwerlin
---
run.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/run.c b/run.c
index 62c19c8..7543
Found while running shader-db under valgrind.
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp
b/src/mesa/drivers/dri/i965
v2: Also drop the '-1' in favor of '-j1' (Matt)
Signed-off-by: Lionel Landwerlin
---
run.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/run.c b/run.c
index 2654bff..0e77926 100644
--- a/run.c
+++ b/run.c
@@ -307,9 +307,7 @@ const struc
On 16/02/17 20:02, Kenneth Graunke wrote:
On Thursday, February 16, 2017 4:29:50 AM PST Lionel Landwerlin wrote:
Since we're already asking the driver to generate code for a different
hardware than what we're running on, better not even bother with emitting
any batch.
Signed-off-
Looks good to me. This series is :
Reviewed-by: Lionel Landwerlin
On 15/02/17 21:37, Robert Bragg wrote:
To hopefully make progress towards landing support for OA unit metrics exposed
via INTEL_performance_query the idea here is to first just tackle upstreaming
the backend rework with an
On 18/02/17 23:59, Jason Ekstrand wrote:
This fixes a some rendering corruption in The Talos Principle
Cc: "13.0 17.0"
---
src/intel/vulkan/anv_query.c | 22 --
src/intel/vulkan/genX_cmd_buffer.c | 27 +++
2 files changed, 27 insertions(+),
I have a tiny suggestion below and also one on patch 2.
Regardless, this series is :
Reviewed-by: Lionel Landwerlin
On 18/02/17 23:59, Jason Ekstrand wrote:
---
src/intel/genxml/gen7.xml | 2 +-
src/intel/genxml/gen75.xml | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff
On 18/02/17 21:32, Jason Ekstrand wrote:
Found by inspection
Cc: "13.0 17.0"
---
src/intel/vulkan/anv_query.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/intel/vulkan/anv_query.c b/src/intel/vulkan/anv_query.c
index 293257b..d674e83 100644
--- a/src/intel/vulkan/anv_query.c
++
Applies on top of Jason's patch :
https://patchwork.freedesktop.org/patch/139603/
Signed-off-by: Lionel Landwerlin
Cc: Jason Ekstrand
---
src/intel/isl/isl.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 1a47da5257..3b4579b343 1
On 18/02/17 00:03, Jason Ekstrand wrote:
This just enables basic MSAA compression (no fast clears) for all
multisampled surfaces. This improves the framerate of the Sascha
"multisampling" demo by 76% on my Sky Lake laptop. Running Talos on
medium settings with 8x MSAA, this improves the framera
Applies on top of Jason's patch :
https://patchwork.freedesktop.org/patch/139603/
Signed-off-by: Lionel Landwerlin
Cc: Jason Ekstrand
---
src/intel/isl/isl.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 1a47da5257..b7f3a
On 20/02/17 18:09, Jason Ekstrand wrote:
From: Lionel Landwerlin
v3 (Jason Ekstrand): Add a comment explaining why
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/isl/isl.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/intel/isl/isl.c b
On 20/02/17 19:12, Jason Ekstrand wrote:
On Mon, Feb 20, 2017 at 10:33 AM, Lionel Landwerlin
mailto:lionel.g.landwer...@intel.com>>
wrote:
On 20/02/17 18:09, Jason Ekstrand wrote:
From: Lionel Landwerlin mailto:lionel.g.landwer...@intel.com>>
v3 (Jason Ekst
Reviewed-by: Lionel Landwerlin
On 20/02/17 18:09, Jason Ekstrand wrote:
This just enables basic MSAA compression (no fast clears) for all
multisampled surfaces. This improves the framerate of the Sascha
"multisampling" demo by 76% on my Sky Lake laptop. Running Talos on
medium set
This series is :
Reviewed-by: Lionel Landwerlin
On 20/02/17 19:25, Jason Ekstrand wrote:
This series is a v2 of some of the patches I sent out on Saturday to fix
queries. I've incorporated the review feedback from Lionel. All but the
last two patches are CC'd to stable for bot
On 20/02/17 19:21, Jason Ekstrand wrote:
Found by inspection. However, I expect it fixes real bugs when using
blorp from Vulkan on little-core platforms.
Cc: "13.0 17.0"
---
src/intel/blorp/blorp_genX_exec.h | 17 -
src/intel/vulkan/genX_blorp_exec.c | 8
Nice cleanup, patches 2->5 are :
Reviewed-by: Lionel Landwerlin
Just one question on patch 1.
On 20/02/17 19:21, Jason Ekstrand wrote:
The first patch in this little series should fix actual bugs on little-core
platforms because it makes BLORP properly clflush it's dynamic state i
Reviewed-by: Lionel Landwerlin
On 21/02/17 15:47, Jason Ekstrand wrote:
Found by inspection. However, I expect it fixes real bugs when using
blorp from Vulkan on little-core platforms.
Cc: "13.0 17.0"
---
src/intel/blorp/blorp_genX_exec.h | 19 ++-
s.
We can also centralize pipe controls in anv and implement one of the
workaround we need on IVB/BYT.
Cheers,
Lionel Landwerlin (3):
anv/blorp/i965: blump blorp's pipe controls back into the embedding
driver
anv: centralize PIPE_CONTROLs
anv: implement WaCsStallAtEveryFourthPipeco
At the moment, we don't seem to miss any workaround from having
blorp's pipe controls not tracked by the embedding driver, but this
should make things more robust if something new comes up.
Signed-off-by: Lionel Landwerlin
---
src/intel/blorp/blorp_genX_exec.h
This allows us to monitor pipe controls and apply workarounds in a
single location if needed.
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_genX.h| 26 ++
src/intel/vulkan/anv_private.h | 8
src/intel/vulkan/genX_blorp_exec.c | 4
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_batch_chain.c | 5 +
src/intel/vulkan/anv_pipeline.c| 2 ++
src/intel/vulkan/anv_private.h | 4
src/intel/vulkan/genX_cmd_buffer.c | 21 +++--
4 files changed, 30 insertions(+), 2 deletions(-)
diff
I can't reproduce on the vulkan-cts-next-dev (I just pull -r, so I
shouldn't miss anything right?).
On 22/02/17 14:45, Iago Toral Quiroga wrote:
This fixes a number of new CTS tests that would crash otherwise:
dEQP-VK.pipeline.render_to_image.*
---
src/intel/vulkan/genX_cmd_buffer.c | 3 ++-
I must be missing something, but I'm struggling to see why this patch
change anything.
Why does it matter if we write a clear color in SURFACE_STATE?
Shouldn't the usage of that color value only depend on whether we enable
3DSTATE_PS.RenderTargetFastClearEnable for instance?
-
Lionel
On 22/02
On 23/02/17 16:26, Jason Ekstrand wrote:
On Feb 23, 2017 8:03 AM, "Lionel Landwerlin"
mailto:lionel.g.landwer...@intel.com>>
wrote:
I must be missing something, but I'm struggling to see why this
patch change anything.
Why does it matter if we write a clear c
Does this fix the double free issue I've been seeing in shader-db?
Regardless :
Reviewed-by: Lionel Landwerlin
On 27/02/17 12:23, Kenneth Graunke wrote:
Instead of using ralloc_autofree_context() to install an atexit()
handler to ralloc_free(glsl_type::mem_ctx), we can simply free them
Reviewed-by: Lionel Landwerlin
On 27/02/17 12:23, Kenneth Graunke wrote:
There was exactly one user of this, and I just removed it.
It also accessed an implicit global context, with no locking. This
meant that it was only safe if all callers of ralloc_autofree_context()
held the same lock
Reviewed-by: Lionel Landwerlin
On 27/02/17 12:54, Kenneth Graunke wrote:
I have no idea why these were part of the compiler files. They're
miptree related code, and the compiler doesn't appear to use them.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/Makefile.s
ssion from your format to the new one.
Regardless, this series is :
Reviewed-by: Lionel Landwerlin
Thanks!
-
Lionel
On 24/02/17 13:58, Robert Bragg wrote:
Avoiding lots of error prone boilerplate and easing our ability to add +
maintain support for multiple OA performance counter queries for
Reviewed-by: Lionel Landwerlin
On 27/02/17 17:25, Jason Ekstrand wrote:
We've been following the spec changes.
---
src/intel/vulkan/anv_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 51
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_cmd_buffer.c | 33
src/intel/vulkan/anv_descriptor_set.c | 146
src/intel/vulkan/anv_device.c | 4 +
src/intel/vulkan/anv_entrypoints_gen.py | 1
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_cmd_buffer.c | 91 +
src/intel/vulkan/anv_device.c | 12 +
src/intel/vulkan/anv_entrypoints_gen.py | 1 +
src/intel/vulkan/anv_private.h | 13
We will need this declaration closer for readability later.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_private.h | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/src/intel/vulkan/anv_private.h b/src
This will be reused later on.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_descriptor_set.c | 214 +-
src/intel/vulkan/anv_private.h| 29 +
2 files changed, 162 insertions(+), 81 deletions(-)
diff --git a
This allows us to allocate surface states from the command buffer when
pushing descriptor sets rather than allocating them through a
descriptor set pool.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_descriptor_set.c | 9 +
src/intel/vulkan
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_descriptor_set.c | 6 +++---
src/intel/vulkan/anv_private.h| 3 +++
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/intel/vulkan/anv_descriptor_set.c
b/src/intel/vulkan
Hi all,
Here is a small series to enable 2 extensions from vulkan 1.0.42 :
- VK_KHR_push_descriptor
- VK_KHR_descriptor_update_template
Cheers,
Lionel Landwerlin (6):
anv: move buffer_view declaration
anv: make layout size computation helper available across compilation
units
anv
Patches 1-6 are :
Reviewed-by: Lionel Landwerlin
Thanks!
On 24/02/17 18:21, Dylan Baker wrote:
This is just good practice.
Signed-off-by: Dylan Baker
---
src/intel/vulkan/anv_entrypoints_gen.py | 458 -
1 file changed, 233 insertions(+), 225 deletions(-)
diff
arguments (Sirisha)
Print out register name
Signed-off-by: Lionel Landwerlin
Cc: Sirisha Gandikota
---
src/intel/tools/aubinator.c | 17 -
src/intel/tools/decoder.c | 29 +++--
src/intel/tools/decoder.h | 4
3 files changed, 47 insertions(+), 3
OpAtomicLoad/Store should have pointer to images just like the rest of the
atomic operators. These couple of lines were poorly copied from the
ssbo/shared_vars cases (the only ones currently tests by the CTS).
Fixes 2afb950161f847d9b0a7 "spirv/nir: Add support for OpAtomicLoad/Store"
Cc: Timothy A
Not that I saw. I'll add some.
On Sep 19, 2016 9:36 AM, "Lionel Landwerlin" <mailto:llandwer...@gmail.com>> wrote:
OpAtomicLoad/Store should have pointer to images just like the
rest of the
atomic operators. These couple of lines were poorly copied from the
On Tue, 2016-09-20 at 16:48 -0700, Kenneth Graunke wrote:
> On Friday, September 9, 2016 11:45:07 AM PDT Lionel Landwerlin wrote:
> [snip]
> >
> > diff --git a/src/intel/vulkan/anv_private.h
> > b/src/intel/vulkan/anv_private.h
> > index 99b3acf..aa9be69 100
Now that we have gen_device_info mutable, we can update its values and drop
all copies we had in brw_context.
Signed-off-by: Lionel Landwerlin
Cc: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_compute.c | 3 ++-
src/mesa/drivers/dri/i965/brw_context.c | 22 +-
src
gen_device_info
(we only have the slices number at the moment). Also factoring out the
update of gen_device_info into src/intel/common might make sense. Any
comments?
Cheers,
Lionel Landwerlin (3):
intel/i965: make gen_device_info mutable
i965: get rid of duplicated values from gen_device_info
anv: get
Signed-off-by: Lionel Landwerlin
Cc: Kenneth Graunke
---
src/intel/vulkan/anv_allocator.c | 15 ---
src/intel/vulkan/anv_device.c| 22 +++---
src/intel/vulkan/anv_private.h | 11 ---
src/intel/vulkan/gen7_pipeline.c | 11 ++-
src/intel/vulkan
Graunke
Signed-off-by: Lionel Landwerlin
---
src/intel/common/gen_device_info.c | 11 ++--
src/intel/common/gen_device_info.h | 2 +-
.../isl/tests/isl_surf_get_image_offset_test.c | 18 ---
src/intel/tools/disasm.c | 4 +-
src
Reviewed-by: Lionel Landwerlin
On 25/09/16 16:06, Nayan Deshmukh wrote:
CovID: 1373370
v2: fix indentation
Signed-off-by: Nayan Deshmukh
---
src/intel/tools/disasm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/intel/tools/disasm.c b/src/intel/tools/disasm.c
We can access this value through gl_shader_program.
Signed-off-by: Lionel Landwerlin
Cc: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_compiler.h | 1 -
src/mesa/drivers/dri/i965/brw_cs.c| 1 -
src/mesa/drivers/dri/i965/brw_gs.c| 1 -
src/mesa/drivers/dri/i965/brw_tcs.c
atomic way but instead the number of atomic counters
manipulated by the shader.
Signed-off-by: Lionel Landwerlin
Cc: Jason Ekstrand
---
src/mesa/drivers/dri/i965/gen7_l3_state.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_l3_state.c
b/src/m
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