[Mesa-dev] [RFC PATCH 29/40] i965/vec4: Append uniform variables to the gather table

Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 0f22829..8dee915 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [RFC PATCH 31/40] i965/fs: Set limitation for amount of UBO push constant entries

We set the same 16-register limitation used in assign_constant_locations() when assigning UBOs as push constants. Otherwise, just fall-back to using pull constant loads. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 ++- 1 file changed, 2 insertions(+), 1

Re: [Mesa-dev] [RFC PATCH 06/40] i965/gen7.5: Enable hardware-generated binding tables in blorp path

On 01/05/2015 05:41 AM, Kenneth Graunke wrote: > On Sunday, January 04, 2015 04:04:20 PM Abdiel Janulgue wrote: >> Signed-off-by: Abdiel Janulgue >> --- >> src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 ++ >> 1 file changed, 2 insertions(+) >> >>

[Mesa-dev] [PATCH 01/20] i965: Define gather push constants opcodes

Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_defines.h | 20 1 file changed, 20 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index a8594af..7b07c50 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] i965: Turn UBOs as push constants

Some updated figures first: Ue4 Reflections Subway demo x fs gather constants disabled + fs gather constants enabled HSW: N Min MaxMedian AvgStddev x 10 5.09739 6.48963 6.33357 6.1979850.40742969 + 10 6.56139

[Mesa-dev] [PATCH 02/20] i965: Enable gather push constants

support. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_binding_tables.c | 59 ++ src/mesa/drivers/dri/i965/brw_context.c| 39 - src/mesa/drivers/dri/i965/brw_context.h| 10 + src/mesa/drivers/dri/i965/brw_state.h

[Mesa-dev] [PATCH 09/20] nir: Add glsl_get_type_without_array() wrapper

Signed-off-by: Abdiel Janulgue --- src/glsl/nir/nir_types.cpp | 6 ++ src/glsl/nir/nir_types.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/src/glsl/nir/nir_types.cpp b/src/glsl/nir/nir_types.cpp index a0caf0e..332da8f 100644 --- a/src/glsl/nir/nir_types.cpp +++ b/src/glsl/nir

[Mesa-dev] [PATCH 07/20] i965: Assign hw-binding table index for uniform constant buffer block

Assign the uploaded uniform block with hardware binding table indices. This is indexed by the resource streamer to fetch the constant buffers referred to by our gather table entries. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen6_vs_state.c | 13 +++-- 1 file changed

[Mesa-dev] [PATCH 03/20] i965: Allocate space on the gather pool for plain uniforms

Reserve space in the gather pool where the gathered uniforms are flushed. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen6_vs_state.c | 8 1 file changed, 8 insertions(+) diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 06/20] i965: Assign hw-binding table index for each UBO constant buffer.

. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_context.h | 11 +++ src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 6 ++ 2 files changed, 17 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h

[Mesa-dev] [PATCH 08/20] nir: Add glsl_get_array_size() wrapper.

Signed-off-by: Abdiel Janulgue --- src/glsl/nir/nir_types.cpp | 6 ++ src/glsl/nir/nir_types.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/src/glsl/nir/nir_types.cpp b/src/glsl/nir/nir_types.cpp index 940c676..a0caf0e 100644 --- a/src/glsl/nir/nir_types.cpp +++ b/src/glsl/nir

[Mesa-dev] [PATCH 12/20] i965/fs/nir: Append nir_intrinsic_load_ubo entries to the gather table

When the const block and offset are immediate values. Otherwise just fall-back to the previous method of uploading the UBO constant data to GRF using pull constants. Cc: kenn...@whitecape.org Cc: ja...@jlekstrand.net Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs.cpp

[Mesa-dev] [PATCH 10/20] i965: Include UBO parameter sizes in push constant parameters

Now that we consider UBO constants as push constants, we need to include the sizes of the UBO's constant slots in the visitor's uniform slot sizes. This information is needed to properly pack vector constants tightly next to each other. Signed-off-by: Abdiel Janulgue --- src/mesa/d

[Mesa-dev] [PATCH 13/20] i965/fs: Pack UBO registers right after uniform registers

We now have two sources of constant buffers: UBOs and ordinary uniforms. After assigning a block of push constant hw-register to normal uniforms, just pack the UBO push constant registers right after it. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs.cpp | 20

[Mesa-dev] [PATCH 05/20] i965: Store gather table information in the program data

fetches are stored first. These are then combined with a separate table containing UBO entries. The separate entry for UBOs is needed to make it easier to generate the gather mask when combining and packing the constant data. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 14/20] i965/vec4: Append uniform entries to the gather table

Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 12 src/mesa/drivers/dri/i965/brw_vec4.h | 1 + 2 files changed, 13 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 85dc372..f2b03f8

[Mesa-dev] [PATCH 11/20] i965/fs: Append uniform entries to the gather table

This patch generates the gather table entries for ordinary uniforms if they are present. The uniform constants here will later be packed together with UBO constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs.cpp | 18 +- 1 file changed, 17 insertions

[Mesa-dev] [PATCH 04/20] i965: Allocate space on the gather pool for UBO entries

If there are UBO constant entries, append them to stage_state->push_const_size. The gather pool contains the combined entries of both ordinary uniforms and UBO constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen6_vs_state.c | 20 ++-- 1 file changed,

[Mesa-dev] [PATCH 19/20] i965: Disable gather push constants for null constants

to go around the issue. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen7_disable.c | 4 src/mesa/drivers/dri/i965/gen7_vs_state.c | 7 +++ src/mesa/drivers/dri/i965/gen8_disable.c | 4 3 files changed, 15 insertions(+) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 20/20] i965: Enable push constants for UBOs

Switches on push constants whenever we have UBO entries. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen7_wm_state.c | 2 +- src/mesa/drivers/dri/i965/gen8_ps_state.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 16/20] i965/vec4: Pack UBO registers right after uniform registers

Since we now consider UBOs as push constants, we need to layout our push constant register space in such a way that UBO registers are packed right after uniform registers. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 38 ++ 1 file

[Mesa-dev] [PATCH 15/20] i965/vec4: Append ir_binop_ubo_load entries to the gather table

When the const block and offset are immediate values. Otherwise just fall-back to the previous method of uploading the UBO constant data to GRF using pull constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_vec4.cpp| 13 src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 17/20] i965: Upload UBO surfaces before emitting constant state packet

Now that UBOs are uploaded as push constants. We need to obtain and append the amount of push constant entries generated by the UBO entry fetches to the 3DSTATE_CONSTANT_* packets. v2: GEN8 support Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_state_upload.c | 12

[Mesa-dev] [PATCH 18/20] i965: Program the push constants state using the gather table

dynamic state base address. v2: Support GEN8 + non-trivial rebase. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_state.h | 2 +- src/mesa/drivers/dri/i965/gen6_gs_state.c | 2 +- src/mesa/drivers/dri/i965/gen6_vs_state.c | 2 +- src/mesa/drivers/dri/i965

Re: [Mesa-dev] i965: Turn UBOs as push constants

On 09/12/2015 01:42 AM, Ben Widawsky wrote: > On Fri, Sep 11, 2015 at 11:33:14AM +0300, Abdiel Janulgue wrote: >> Some updated figures first: >> >> Ue4 Reflections Subway demo >> x fs gather constants disabled >> + fs gather constants enabled >> >&

Re: [Mesa-dev] i965: Turn UBOs as push constants

Here's a more comprehensive shader-db run: total instructions in shared programs: 6394485 -> 6374865 (-0.31%) instructions in affected programs: 261322 -> 241702 (-7.51%) helped:3210 HURT: 0 GAINED:

Re: [Mesa-dev] i965: Turn UBOs as push constants

Ping! No thoughts/consensus if this approach is worth considering or not? The patches are getting stale. Should I re-base or just discard these optimisations? On 09/15/2015 08:59 PM, Ben Widawsky wrote: > On Tue, Sep 15, 2015 at 12:24:00PM +0300, Abdiel Janulgue wrote: >> Here

Re: [Mesa-dev] [PATCH 6/6] i965/gen7.5+: Disable resource streamer during GPGPU workloads.

hing back to the 3D pipeline. Yep, this is the way it is. Reviewed-by: Abdiel Janulgue > --- > src/mesa/drivers/dri/i965/brw_binding_tables.c | 2 +- > src/mesa/drivers/dri/i965/brw_misc_state.c | 38 > ++ > src/mesa/drivers/dri/i965/brw_state.h

[Mesa-dev] [PATCH 02/27] i965: Pass resource streamer enable flags on batchbuffer start

This is passed on the kernel to enable the resource streamer enable bit on MI_BATCHBUFFER_START Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/intel_batchbuffer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b

[Mesa-dev] [PATCH 01/27] i965: Define HW-binding table and resource streamer control opcodes

Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa/drivers/dri/i965/brw_defines.h | 24 src/mesa/drivers/dri/i965/intel_reg.h | 3 +++ 3 files changed, 28 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b

[Mesa-dev] [PATCH 04/27] i965: Implement interface to edit binding table entries

the state for these combined edits which it then automatically flushes to a binding table pool when the binding table pointer state command is invoked. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_binding_tables.c | 49 ++ src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 11/27] i965: Store gather table information in the program data

fetches are stored first. These are then combined with a separate table containing UBO entries. The separate entry for UBOs is needed to make it easier to generate the gather mask when combining and packing the constant data. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 09/27] i965: Allocate space on the gather pool for plain uniforms

Reserve space in the gather pool where the gathered uniforms are flushed. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen6_vs_state.c | 8 1 file changed, 8 insertions(+) diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 06/27] i965: Define gather push constants opcodes

Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_defines.h | 23 +++ 1 file changed, 23 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index da288d3..8079433 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 07/27] i965: Enable gather push constants

: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_binding_tables.c | 43 +- src/mesa/drivers/dri/i965/brw_context.c| 37 ++ src/mesa/drivers/dri/i965/brw_context.h| 10 ++ src/mesa/drivers/dri/i965/brw_state.h | 1 + 4 files

[Mesa-dev] [PATCH 21/27] i965/vec4: Append uniform entries to the gather table

Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 12 src/mesa/drivers/dri/i965/brw_vec4.h | 1 + 2 files changed, 13 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index c4c77b2..799d79e

[Mesa-dev] [PATCH 13/27] i965: Assign hw-binding table index for uniform constant buffer block

Assign the uploaded uniform block with hardware binding table indices. This is indexed by the resource streamer to fetch the constant buffers referred to by our gather table entries. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen6_vs_state.c | 11 +-- 1 file changed, 9

[Mesa-dev] [PATCH 26/27] i965: Disable gather push constants for null constants

to go around the issue. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen7_disable.c | 4 src/mesa/drivers/dri/i965/gen7_vs_state.c | 11 +++ 2 files changed, 15 insertions(+) diff --git a/src/mesa/drivers/dri/i965/gen7_disable.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 17/27] i965/fs: Append uniform entries to the gather table

And generate the gather mask constant entries from our uniform data. Data generated here will later be packed together with UBO constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs.cpp | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 19/27] i965/fs/nir: Append nir_intrinsic_load_ubo entries to the gather table

When the const block and offset are immediate values. Otherwise just fall-back to the previous method of uploading the UBO constant data to GRF using pull constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs.h | 2 ++ src/mesa/drivers/dri/i965/brw_fs_nir.cpp

[Mesa-dev] [PATCH 10/27] i965: Allocate space on the gather pool for UBO entries

If there are UBO constant entries, append them to stage_state->push_const_size. The gather pool contains the combined entries of both ordinary uniforms and UBO constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen6_vs_state.c | 20 ++-- 1 file changed,

[Mesa-dev] [PATCH 08/27] i965: Disable resource streamer in BLORP

Switch off hardware-generated binding tables and gather push constants in the blorp. Blorp requires only a minimal set of simple constants. There is no need for the extra complexity to program a gather table entry into the pipeline. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 27/27] i965: Enable push constants for UBOs

Switches on push constants whenever we have UBO entries. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen7_wm_state.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c index

[Mesa-dev] [PATCH 16/27] i965: Include UBO parameter sizes in push constant parameters

Now that we consider UBO constants as push constants, we need to include the sizes of the UBO's constant slots in the visitor's uniform slot sizes. This information is needed to properly pack vector constants tightly next to each other. Signed-off-by: Abdiel Janulgue --- src/mesa/d

[Mesa-dev] [PATCH 18/27] i965/fs: Append ir_binop_ubo_load entries to the gather table

When the const block and offset are immediate values. Otherwise just fall-back to the previous method of uploading the UBO constant data to GRF using pull constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs.cpp | 11 src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 12/27] i965: Assign hw-binding table index for each UBO constant buffer.

. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_context.h | 11 +++ src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 6 ++ 2 files changed, 17 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h

[Mesa-dev] [PATCH 23/27] i965/vec4: Pack UBO registers right after uniform registers

Since we now consider UBOs as push constants, we need to layout our push constant register space in such a way that UBO registers are packed right after uniform registers. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 38 ++ 1 file

[Mesa-dev] i965: enable resource streamer gather constants for UBOs‏

upport Patches 17-20: Support for original i965 fs backend Patches 19:Support for NIR fs backend Patches 21-23: Support for vec4 backend Patches 24-26: Required state setup and workarounds Patches 29:Switch on push constants whenever we have UBO entries. Signed-off-by: Abdiel Janulgu

[Mesa-dev] [PATCH 03/27] i965: Enable hardware-generated binding tables on render path.

insert the required brw_tracked_state objects to enable hw-generated binding tables in normal render path. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_binding_tables.c | 70 ++ src/mesa/drivers/dri/i965/brw_context.c| 4 ++ src/mesa/drivers/dri

[Mesa-dev] [PATCH 05/27] i965: Upload binding tables in hw-generated binding table format.

state entries of our on-chip binding table to the binding table pool before passing the command on to the CS. Note that the the binding table pointer offset is relative to the binding table pool base address when resource streamer instead of the surface state base address. Signed-off-by: Abdiel

[Mesa-dev] [PATCH 14/27] nir: Add glsl_get_element_type() wrapper.

Signed-off-by: Abdiel Janulgue --- src/glsl/nir/nir_types.cpp | 5 + src/glsl/nir/nir_types.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/src/glsl/nir/nir_types.cpp b/src/glsl/nir/nir_types.cpp index f0d0b46..249678f 100644 --- a/src/glsl/nir/nir_types.cpp +++ b/src/glsl/nir

[Mesa-dev] [PATCH 15/27] nir: Add glsl_get_array_size() wrapper.

Signed-off-by: Abdiel Janulgue --- src/glsl/nir/nir_types.cpp | 6 ++ src/glsl/nir/nir_types.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/src/glsl/nir/nir_types.cpp b/src/glsl/nir/nir_types.cpp index 249678f..7218eeb 100644 --- a/src/glsl/nir/nir_types.cpp +++ b/src/glsl/nir

[Mesa-dev] [PATCH 20/27] i965/fs: Pack UBO registers right after uniform registers

assign_push_constant_locations() determines which registers are loaded in the push constant array. We have two sources of constant buffers: UBOs and ordinary uniforms. After assigning a block of push constant hw-register to normal uniforms, just pack the UBO registers right after it. Signed-off-by: Abdiel Janulgue --- src

[Mesa-dev] [PATCH 24/27] i965: Upload UBO surfaces before emitting constant state packet

Now that UBOs are uploaded as push constants. We need to obtain and append the amount of push constant entries generated by the UBO entry fetches to the 3DSTATE_CONSTANT_* packets. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_state_upload.c | 7 --- 1 file changed, 4

[Mesa-dev] [PATCH 22/27] i965/vec4: Append ir_binop_ubo_load entries to the gather table

When the const block and offset are immediate values. Otherwise just fall-back to the previous method of uploading the UBO constant data to GRF using pull constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 12 src/mesa/drivers/dri/i965/brw_vec4.h

[Mesa-dev] [PATCH 25/27] i965: Program the push constants state using the gather table

dynamic state base address. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_state.h | 2 +- src/mesa/drivers/dri/i965/gen6_gs_state.c | 2 +- src/mesa/drivers/dri/i965/gen6_vs_state.c | 2 +- src/mesa/drivers/dri/i965/gen6_wm_state.c | 2 +- src/mesa/drivers/dri/i965

Re: [Mesa-dev] [PATCH 03/27] i965: Enable hardware-generated binding tables on render path.

On 05/07/2015 05:46 PM, Pohjolainen, Topi wrote: > On Thu, May 07, 2015 at 04:43:21PM +0300, Pohjolainen, Topi wrote: >> On Tue, Apr 28, 2015 at 11:08:00PM +0300, Abdiel Janulgue wrote: >>> This patch implements the binding table enable command which is also >>> used

Re: [Mesa-dev] [PATCH 26/27] i965: Disable gather push constants for null constants

On 05/07/2015 05:48 PM, Pohjolainen, Topi wrote: > On Tue, Apr 28, 2015 at 11:08:23PM +0300, Abdiel Janulgue wrote: >> Programming null constants with gather constant tables seems to >> be unsupported and results in a GPU lockup even with the prescribed >> GPU workarounds in

Re: [Mesa-dev] [PATCH 03/27] i965: Enable hardware-generated binding tables on render path.

On 05/07/2015 04:43 PM, Pohjolainen, Topi wrote: > On Tue, Apr 28, 2015 at 11:08:00PM +0300, Abdiel Janulgue wrote: >> This patch implements the binding table enable command which is also >> used to allocate a binding table pool where hardware-generated >> binding table ent

Re: [Mesa-dev] [PATCH 11/27] i965: Store gather table information in the program data

On 05/07/2015 06:17 PM, Pohjolainen, Topi wrote: > On Tue, Apr 28, 2015 at 11:08:08PM +0300, Abdiel Janulgue wrote: >> The resource streamer is able to gather and pack sparsely-located >> constant data from any buffer object by a referring to a gather table >> This patch add

[Mesa-dev] [PATCH 1/5] i965: Define HW-binding table and resource streamer control opcodes

Reviewed-by: Topi Pohjolainen Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_defines.h | 24 src/mesa/drivers/dri/i965/intel_reg.h | 3 +++ 2 files changed, 27 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers

[Mesa-dev] [PATCH 3/5] i965: Enable hardware-generated binding tables on render path.

. Also insert the required brw_tracked_state objects to enable hw-generated binding tables in normal render path. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_binding_tables.c | 97 ++ src/mesa/drivers/dri/i965/brw_context.c| 4 ++ src/mesa/drivers

[Mesa-dev] [PATCH 2/5] i965: Pass resource streamer enable flags on batchbuffer start

This is passed on the kernel to enable the resource streamer enable bit on MI_BATCHBUFFER_START Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa/drivers/dri/i965/intel_batchbuffer.c | 8 +++- 2 files changed, 8 insertions(+), 1 deletion

[Mesa-dev] [PATCH 4/5] i965: Implement interface to edit binding table entries

the state for these combined edits which it then automatically flushes to a binding table pool when the binding table pointer state command is invoked. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_binding_tables.c | 50 ++ src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 5/5] i965: Upload binding tables in hw-generated binding table format.

state entries of our on-chip binding table to the binding table pool before passing the command on to the CS. Note that the the binding table pointer offset is relative to the binding table pool base address when resource streamer instead of the surface state base address. Signed-off-by: Abdiel

[Mesa-dev] i965: Resource Streamer HW-binding tables

I've decided to split my gather constants work into even smaller chunks to make it easier for reviewers which in turn makes it easier to merge. First in this patch series enables hardware-generated binding tables which is required for gather constants[*] to work. Chances since previous posting are

Re: [Mesa-dev] [PATCH 1/5] i965: Define HW-binding table and resource streamer control opcodes

On 05/20/2015 09:47 AM, Pohjolainen, Topi wrote: > On Wed, May 20, 2015 at 09:32:06AM +0300, Abdiel Janulgue wrote: >> Reviewed-by: Topi Pohjolainen >> Signed-off-by: Abdiel Janulgue >> --- >> src/mesa/drivers/dri/i965/brw_defines.h | 24 &g

Re: [Mesa-dev] [PATCH 3/5] i965: Enable hardware-generated binding tables on render path.

On 05/20/2015 09:54 AM, Pohjolainen, Topi wrote: > On Wed, May 20, 2015 at 09:32:08AM +0300, Abdiel Janulgue wrote: >> This patch implements the binding table enable command which is also >> used to allocate a binding table pool where where hardware-generated >> binding tabl

Re: [Mesa-dev] [PATCH 3/5] i965: Enable hardware-generated binding tables on render path.

On 05/20/2015 10:21 AM, Pohjolainen, Topi wrote: > On Wed, May 20, 2015 at 10:11:36AM +0300, Abdiel Janulgue wrote: >> >> >> On 05/20/2015 09:54 AM, Pohjolainen, Topi wrote: >>> On Wed, May 20, 2015 at 09:32:08AM +0300, Abdiel Janulgue wrote: >>>> This

[Mesa-dev] [PATCH 5/6] i965: Upload binding tables in hw-generated binding table format.

state entries of our on-chip binding table to the binding table pool before passing the command on to the CS. Note that the the binding table pointer offset is relative to the binding table pool base address when resource streamer instead of the surface state base address. Signed-off-by: Abdiel

[Mesa-dev] [PATCH 1/6] i965: Define HW-binding table and resource streamer control opcodes

v2: Simply HW binding table bit definitions and magic constants (Topi) Reviewed-by: Topi Pohjolainen Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_defines.h | 28 src/mesa/drivers/dri/i965/intel_reg.h | 3 +++ 2 files changed, 31 insertions

[Mesa-dev] [PATCH 6/6] i965: Disable resource streamer in BLORP

Switch off hardware-generated binding tables and gather push constants in the blorp. Blorp requires only a minimal set of simple constants. There is no need for the extra complexity to program a gather table entry into the pipeline. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 2/6] i965: Pass resource streamer enable flags on batchbuffer start

This is passed on the kernel to enable the resource streamer enable bit on MI_BATCHBUFFER_START Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa/drivers/dri/i965/intel_batchbuffer.c | 8 +++- 2 files changed, 8 insertions(+), 1 deletion

[Mesa-dev] [PATCH 4/6] i965: Implement interface to edit binding table entries

the state for these combined edits which it then automatically flushes to a binding table pool when the binding table pointer state command is invoked. v2: Clarify binding table edit bit aligment. (Topi) Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_binding_tables.c | 47

[Mesa-dev] [PATCH 3/6] i965: Enable hardware-generated binding tables on render path.

. Also insert the required brw_tracked_state objects to enable hw-generated binding tables in normal render path. v2: Clarify start of binding table pool offsets. (Topi) Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_binding_tables.c | 95 ++ src/mesa

[Mesa-dev] [PATCH resend 4/7] i965: Implement interface to edit binding table entries

the state for these combined edits which it then automatically flushes to a binding table pool when the binding table pointer state command is invoked. v2: Clarify binding table edit bit aligment. (Topi) Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_binding_tables.c | 49

[Mesa-dev] [PATCH resend 3/7] i965: Enable hardware-generated binding tables on render path.

. Also insert the required brw_tracked_state objects to enable hw-generated binding tables in normal render path. v2: Clarify start of binding table pool offsets. (Topi) Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_binding_tables.c | 101 + src/mesa

[Mesa-dev] [PATCH resend 7/7] i965: Disable HW-binding tables on batch finish for Broadwell

Xorg driver. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/intel_batchbuffer.c | 11 +++ src/mesa/drivers/dri/i965/intel_batchbuffer.h | 3 ++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri

[Mesa-dev] [PATCH resend 5/7] i965: Upload binding tables in hw-generated binding table format.

state entries of our on-chip binding table to the binding table pool before passing the command on to the CS. Note that the the binding table pointer offset is relative to the binding table pool base address when resource streamer instead of the surface state base address. Signed-off-by: Abdiel

[Mesa-dev] [PATCH resend 1/7] i965: Define HW-binding table and resource streamer control opcodes

v2: Simplify HW binding table bit definitions and magic constants (Topi) v3: Add Broadwell support. Cc: kristian.h.kristen...@intel.com Cc: topi.pohjolai...@intel.com Cc: kenn...@whitecape.org Reviewed-by: Topi Pohjolainen Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH resend 2/7] i965: Pass resource streamer enable flags on batchbuffer start

This is passed on the kernel to enable the resource streamer enable bit on MI_BATCHBUFFER_START Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa/drivers/dri/i965/intel_batchbuffer.c | 8 +++- 2 files changed, 8 insertions(+), 1 deletion

[Mesa-dev] [PATCH resend 6/7] i965: Disable resource streamer in BLORP

Switch off hardware-generated binding tables and gather push constants in the blorp. Blorp requires only a minimal set of simple constants. There is no need for the extra complexity to program a gather table entry into the pipeline. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965

Re: [Mesa-dev] [PATCH resend 1/7] i965: Define HW-binding table and resource streamer control opcodes

On 06/02/2015 11:05 AM, Kenneth Graunke wrote: > On Monday, June 01, 2015 03:14:24 PM Abdiel Janulgue wrote: >> v2: Simplify HW binding table bit definitions and magic constants (Topi) >> v3: Add Broadwell support. >> >> Cc: kristian.h.kristen...@intel.com >> Cc:

Re: [Mesa-dev] [PATCH resend 5/7] i965: Upload binding tables in hw-generated binding table format.

On 06/02/2015 11:25 AM, Kenneth Graunke wrote: > On Tuesday, June 02, 2015 12:58:29 AM Kenneth Graunke wrote: >> As I mentioned in my reply to patch 3, I think you need some sort of >> "did the buffer fill up?" check. Perhaps make a function to reserve >> space, advancing next_offset and returni

Re: [Mesa-dev] [PATCH resend 7/7] i965: Disable HW-binding tables on batch finish for Broadwell

On 06/02/2015 09:31 AM, Kenneth Graunke wrote: > On Monday, June 01, 2015 03:14:30 PM Abdiel Janulgue wrote: >> This is needed since kernel doesn't support RS context save and >> restore on BDW yet. So manually disable hw-generated binding tables >> when done using it i

Re: [Mesa-dev] [PATCH resend 7/7] i965: Disable HW-binding tables on batch finish for Broadwell

On 06/02/2015 08:28 PM, Kenneth Graunke wrote: > On Tuesday, June 02, 2015 03:23:35 PM Abdiel Janulgue wrote: >> >> On 06/02/2015 09:31 AM, Kenneth Graunke wrote: >>> On Monday, June 01, 2015 03:14:30 PM Abdiel Janulgue wrote: >>>> This is needed since kernel

Re: [Mesa-dev] [PATCH resend 3/7] i965: Enable hardware-generated binding tables on render path.

On 06/02/2015 10:54 AM, Kenneth Graunke wrote: > On Monday, June 01, 2015 03:14:26 PM Abdiel Janulgue wrote: >> This patch implements the binding table enable command which is also >> used to allocate a binding table pool where where hardware-generated >> binding table ent

Re: [Mesa-dev] [PATCH resend 7/7] i965: Disable HW-binding tables on batch finish for Broadwell

015 at 12:45:12PM +0300, Ville Syrjälä wrote: >>>>> On Wed, Jun 03, 2015 at 10:05:25AM +0300, Abdiel Janulgue wrote: >>>>>> >>>>>> On 06/02/2015 08:28 PM, Kenneth Graunke wrote: >>>>>>> On Tuesday, June 02, 2015 03:23:35 PM Abdie

Re: [Mesa-dev] [PATCH resend 3/7] i965: Enable hardware-generated binding tables on render path.

Thanks a lot Ken! Your help in debugging this pointed me in the right direction! I had some further observations below: On 06/09/2015 11:08 AM, Kenneth Graunke wrote: > > (To bring the mailing list up to speed: Abdiel mentioned on IRC tonight > that this is actually still necessary---some Pigli

[Mesa-dev] [PATCH] ir_to_mesa: Don't optimize clamp into saturate when target is GL_VERTEX_PROGRAM_ARB

Tested-by: Vinson Lee Signed-off-by: Abdiel Janulgue --- src/glsl/opt_algebraic.cpp | 3 ++- src/mesa/main/mtypes.h | 1 + src/mesa/program/ir_to_mesa.cpp | 3 ++- 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp index

Re: [Mesa-dev] [PATCH 1/5] i965/vs: Add missing resolve_bool_comparison calls on GEN4 and GEN5

think there's any way to trigger the problem without GLSL 1.30 or optimizations that don't exist in stable. Signed-off-by: Ian Romanick Patch 1 is Reviewed-by: Abdiel Janulgue ___ mesa-dev mailing list mesa-dev@lists.freed

Re: [Mesa-dev] [PATCH 3/5] i965/vec4: Fix broken saturate mask check in copy propagation.

On 03/20/2015 04:16 PM, Francisco Jerez wrote: try_copy_propagate() was checking the bit of the saturate mask for the arg-th component of the source to decide whether the whole source should be saturated (WTF?). We need to swizzle the original saturate mask and check that for all enabled chann

Re: [Mesa-dev] [PATCH 1/5] Revert "i965/vec4: Don't lose the saturate modifier in copy propagation."

: Abdiel Janulgue ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 02/23] i965/fs: Optimize (gl_FrontFacing ? x : y) where x and y are ±1.0.

ts to ir_triop_csel). Signed-off-by: Ian Romanick Cc: Abdiel Janulgue The refactor looks good to me. Patch 1 and 2 are: Reviewed-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs.h | 1 + src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 34 +++

Re: [Mesa-dev] [PATCH] i965: Add more MAX_*_URB_ENTRY_SIZE_BYTES #defines.

; +#define GEN7_MAX_HS_URB_ENTRY_SIZE_BYTES(512*64) > +#define GEN7_MAX_VS_URB_ENTRY_SIZE_BYTES(512*64) > + > /* Gen6 "GS URB Entry Allocation Size" is defined as a number of 1024-bit > * (128 bytes) URB rows and the maximum allowed value is 5

Re: [Mesa-dev] [PATCH] i965: Don't inline intel_batchbuffer_require_space().

-of-line function presumably improved icache usage. > > Improves performance of Gl32Batch7 by 3.39898% +/- 0.358674% (n=155) on > Ivybridge. > --- > I'll try to get benchmark results on other platforms as well. Patch is Reviewed-by: Abdiel Janulgue > > > src/

Re: [Mesa-dev] [PATCH] i965/fs: remove unused fs_reg offset

const int output_vertex_size_owords = > gs_prog_data->output_vertex_size_hwords * 2; > > - fs_reg offset; >if (gs_vertex_count.file == IMM) { > per_slot_offsets = brw_imm_ud(output_vertex_size_owords * >

[Mesa-dev] [PATCH] i965: Add defines for gather push constants

v2 (Francisco Jerez): - Rename HSW_GATHER_CONSTANTS_RESERVED to HSW_GATHER_POOL_ALLOC_MUST_BE_ONE. - Rename BRW_GATHER_* prefix to HSW_GATHER_CONSTANTS_*. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_defines.h | 19 +++ 1 file changed, 19 insertions

Re: [Mesa-dev] [PATCH] i965: Add defines for gather push constants

On 12/07/2015 04:45 PM, Ilia Mirkin wrote: > On Mon, Dec 7, 2015 at 7:39 AM, Abdiel Janulgue > wrote: >> v2 (Francisco Jerez): >>- Rename HSW_GATHER_CONSTANTS_RESERVED to >> HSW_GATHER_POOL_ALLOC_MUST_BE_ONE. >>- Rename BRW_GATHER_* prefix to HSW_GATHER_CO

Re: [Mesa-dev] [PATCH 13/15] i965/fs: Add support for MOV_INDIRECT on pre-Broadwell hardware

On 12/10/2015 06:23 AM, Jason Ekstrand wrote: > While we're at it, we also add support for the possibility that the > indirect is, in fact, a constant. This shouldn't happen in the common case > (if it does, that means NIR failed to constant-fold something), but it's > possible so we should hand

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