https://bugs.freedesktop.org/show_bug.cgi?id=106905
Bug ID: 106905
Summary: Account request
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priority: medium
https://bugs.freedesktop.org/show_bug.cgi?id=106905
--- Comment #1 from Gert Wollny ---
Created attachment 140146
--> https://bugs.freedesktop.org/attachment.cgi?id=140146&action=edit
GPG key
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https://bugs.freedesktop.org/show_bug.cgi?id=106905
--- Comment #2 from Gert Wollny ---
BTW: I've added these keys already to my gitlab.fdo account.
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https://bugs.freedesktop.org/show_bug.cgi?id=106903
--- Comment #1 from Samuel Pitoiset ---
Well, AMDVLK hangs on Polaris/Vega here. (I recompiled that fragment shader
manually).
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https://bugs.freedesktop.org/show_bug.cgi?id=106877
--- Comment #6 from Samuel Pitoiset ---
I can reproduce the hang as well. This seems to only affect Vega and LLVM 6
(latest LLVM trunk fixes the GPU hang on my side). I have no ideas what
changed.
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https://bugs.freedesktop.org/show_bug.cgi?id=106897
Sergii Romantsov changed:
What|Removed |Added
Resolution|--- |NOTABUG
Status|REOPENED
https://bugs.freedesktop.org/show_bug.cgi?id=106906
Bug ID: 106906
Summary: Failed to recongnize keyword “sampler2DRect” and
"sampler2DRectShadow"
Product: Mesa
Version: 17.1
Hardware: Other
OS: All
https://bugs.freedesktop.org/show_bug.cgi?id=106906
--- Comment #1 from Zhaowei Yuan ---
CTS cases
"dEQP-GLES2.functional.shaders.keywords.reserved_keywords.sampler2DRectShadow_vertex"
and
"dEQP-GLES2.functional.shaders.keywords.reserved_keywords.sampler2DRectShadow_fragment"
check that if shader
"sampler2DRect" and "sampler2DRectShadow" are specified as
reserved from GLSL 1.1 and GLSL ES 1.0
Signed-off-by: zhaowei yuan
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106906
---
src/compiler/glsl/glsl_lexer.ll | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/
https://bugs.freedesktop.org/show_bug.cgi?id=106906
--- Comment #2 from Zhaowei Yuan ---
patch is posted here:
https://patchwork.freedesktop.org/patch/229229/
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On Tuesday, June 12, 2018 5:54:31 PM PDT Rob Clark wrote:
> On Tue, Jun 12, 2018 at 6:34 PM, Kenneth Graunke
> wrote:
> > On Thursday, May 31, 2018 10:04:05 PM PDT Jason Ekstrand wrote:
> >> From: Rob Clark
> >>
> >> This also removes the legacy version of lower_samplers.
> >
> > It does not, th
On Tuesday, June 12, 2018 1:38:03 PM PDT Rafael Antognolli wrote:
> On Mon, Jun 11, 2018 at 02:01:49PM -0700, Kenneth Graunke wrote:
> > The UBO push analysis pass incorrectly assumed that all values would fit
> > within a 32B chunk, and only recorded a bit for the 32B chunk containing
> > the star
https://bugs.freedesktop.org/show_bug.cgi?id=106907
Bug ID: 106907
Summary: Correct Transform Feedback Varyings information is
expected after using ProgramBinary
Product: Mesa
Version: git
Hardware: Other
OS
https://bugs.freedesktop.org/show_bug.cgi?id=106907
xinghua changed:
What|Removed |Added
CC||jljus...@gmail.com,
|
On Tuesday, 2018-06-12 11:19:40 -0600, bmgor...@chromium.org wrote:
> From: Benjamin Gordon
>
> When building the Chrome OS Android container, we need to build copies
> of mesa that don't conflict with the Android system-supplied libraries.
> This adds options to create suffixed versions of EGL a
On GFX8+, there is a bug that affects TC-compatible depth surfaces
when the ZRange is not reset after LateZ kills pixels.
The workaround is to always set DB_Z_INFO.ZRANGE_PRECISION to match
the last fast clear value. Because the value is set to 1 by default,
we only need to update it when clearing
https://bugs.freedesktop.org/show_bug.cgi?id=105396
--- Comment #9 from Samuel Pitoiset ---
Can you confirm this patch fixes the issue ?
https://patchwork.freedesktop.org/patch/229236/
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Thanks for figuring out the remaning issues,
Reviewed-by: Bas Nieuwenhuizen
On Wed, Jun 13, 2018 at 12:04 PM, Samuel Pitoiset
wrote:
> On GFX8+, there is a bug that affects TC-compatible depth surfaces
> when the ZRange is not reset after LateZ kills pixels.
>
> The workaround is to always set
https://bugs.freedesktop.org/show_bug.cgi?id=106910
Bug ID: 106910
Summary: Primus Segfaults after updating Mesa to 18.1.1
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Se
https://bugs.freedesktop.org/show_bug.cgi?id=106910
--- Comment #1 from Alexander ---
The same issue remains in git version as well.
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https://bugs.freedesktop.org/show_bug.cgi?id=105396
--- Comment #10 from James Legg ---
Yes, that patch fixes it. Thanks.
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On Tuesday, 2018-06-12 17:50:20 -0700, Matt Turner wrote:
> Commit 54ba73ef102f (configure.ac/meson.build: Fix -latomic test) fixed
> some checks for -latomic, and then commit 54bbe600ec26 (configure.ac:
> rework -latomic check) further extended the fixes in configure.ac but
> not in Meson. This co
On Wed, Jun 13, 2018 at 12:43 AM, Jason Ekstrand wrote:
> Since we've been on GitLab (it's been less than a week), we've already
> gotten a couple of developer access requests through GitLab. As it stands,
> these just show up as an e-mail to the group owners with zero explanation or
> opportunit
On Wed, Jun 13, 2018 at 11:03:55AM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> This should add all the pieces to enable tess shaders on virgl.
>
> v2: fixup transform to handle tess and strip out precise.
> set default for max patch varyings to work around issue when
> tess gets enabled fr
On GFX8+, there is a bug that affects TC-compatible depth surfaces
when the ZRange is not reset after LateZ kills pixels.
The workaround is to always set DB_Z_INFO.ZRANGE_PRECISION to match
the last fast clear value. Because the value is set to 1 by default,
we only need to update it when clearing
Reviewed-by: Bas Nieuwenhuizen
On Wed, Jun 13, 2018 at 2:27 PM, Samuel Pitoiset
wrote:
> On GFX8+, there is a bug that affects TC-compatible depth surfaces
> when the ZRange is not reset after LateZ kills pixels.
>
> The workaround is to always set DB_Z_INFO.ZRANGE_PRECISION to match
> the last
Reviewed-by: Bas Nieuwenhuizen
for both. Thanks!
On Wed, Jun 13, 2018 at 3:15 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> The change from MIN2 to MAX2 is intentional.
> ---
> src/amd/common/ac_gpu_info.c | 82
> 1 file changed, 54 insertions(+), 28 dele
https://bugs.freedesktop.org/show_bug.cgi?id=106897
--- Comment #7 from Timo Aaltonen ---
such is life, 16.04 won't get a newer wayland, but 18.04 will.. eventually
for now, you can use a ppa for a backport with the necessary packaging changes:
https://launchpad.net/~ubuntu-x-swat/+archive/ubun
https://bugs.freedesktop.org/show_bug.cgi?id=106912
Bug ID: 106912
Summary: radv: 16-bit depth buffer causes artifacts in Shadow
Warrior 2
Product: Mesa
Version: git
Hardware: Other
OS: All
Statu
+Amit and John
On Sat, Jun 9, 2018 at 11:27 AM, Robert Foss wrote:
> This patch both adds support for probing & filtering DRM nodes
> and switches away from using the GRALLOC_MODULE_PERFORM_GET_DRM_FD
> gralloc call.
>
> Currently the filtering is based just on the driver name,
> and the desired
Quoting Matt Turner (2018-06-12 17:50:20)
> Commit 54ba73ef102f (configure.ac/meson.build: Fix -latomic test) fixed
> some checks for -latomic, and then commit 54bbe600ec26 (configure.ac:
> rework -latomic check) further extended the fixes in configure.ac but
> not in Meson. This commit extends tho
Quoting Eric Engestrom (2018-06-13 03:03:25)
> On Tuesday, 2018-06-12 11:19:40 -0600, bmgor...@chromium.org wrote:
> > From: Benjamin Gordon
> >
> > When building the Chrome OS Android container, we need to build copies
> > of mesa that don't conflict with the Android system-supplied libraries.
>
On Wed, Jun 13, 2018 at 09:25:02AM +0300, Pohjolainen, Topi wrote:
> On Tue, Jun 12, 2018 at 12:21:56PM -0700, Nanley Chery wrote:
> > Fix the case where only stencil writes are enabled on a depth stencil
>
> Isn't this an issue even when depth writes are enabled? Both would add the
> same bo to c
On Wed, Jun 13, 2018 at 09:33:41AM +0300, Pohjolainen, Topi wrote:
> On Tue, Jun 12, 2018 at 12:22:00PM -0700, Nanley Chery wrote:
> > ---
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 30 +--
> > 1 file changed, 15 insertions(+), 15 deletions(-)
> >
> > diff --git a/src/mes
I just reverted this in master because it regressed about 30K Vulkan CTS
tests. More investigation needed?
On Wed, Jun 13, 2018 at 2:07 AM, Kenneth Graunke
wrote:
> On Tuesday, June 12, 2018 1:38:03 PM PDT Rafael Antognolli wrote:
> > On Mon, Jun 11, 2018 at 02:01:49PM -0700, Kenneth Graunke wr
On Wed, Jun 13, 2018 at 09:39:08AM +0300, Pohjolainen, Topi wrote:
> On Tue, Jun 12, 2018 at 12:22:02PM -0700, Nanley Chery wrote:
> > ---
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 40 ---
> > 1 file changed, 26 insertions(+), 14 deletions(-)
> >
> > diff --git a/src/mes
https://bugs.freedesktop.org/show_bug.cgi?id=106912
--- Comment #1 from Samuel Pitoiset ---
Can you explain how to reproduce the issue in-game? I would like to know if
Vega is affected as well.
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On Wed, Jun 13, 2018 at 8:37 AM, Dylan Baker wrote:
> Quoting Matt Turner (2018-06-12 17:50:20)
>> Commit 54ba73ef102f (configure.ac/meson.build: Fix -latomic test) fixed
>> some checks for -latomic, and then commit 54bbe600ec26 (configure.ac:
>> rework -latomic check) further extended the fixes i
On Wed, Jun 13, 2018 at 09:44:14AM +0300, Pohjolainen, Topi wrote:
> On Tue, Jun 12, 2018 at 12:22:03PM -0700, Nanley Chery wrote:
> > Enable a future patch to create the r8stencil_mt in this function.
> > ---
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 48 +--
> > 1 file c
https://bugs.freedesktop.org/show_bug.cgi?id=106677
--- Comment #2 from Deepak ---
(In reply to David Cuthbert from comment #0)
> I'm filing this currently so I have a place to keep notes on this bug.
>
> Running the atom text editor under various OSes (tried Linux Mint 18.3,
> Ubuntu 18.04, and
Reviewed-by: Caio Marcelo de Oliveira Filho
On Tue, Jun 12, 2018 at 03:48:13PM -0700, Ian Romanick wrote:
> From: Ian Romanick
>
> Since SSBOs can be written, copy propagating a read can cause the
Optional: maybe write "... can be written by other threads"?
> value to magically change. SSBO
Reviewed-by: Caio Marcelo de Oliveira Filho
On Tue, Jun 12, 2018 at 03:48:14PM -0700, Ian Romanick wrote:
> From: Ian Romanick
>
> Since SSBOs can be written, copy propagating a read can cause the
> value to magically change. SSBO reads are also very expensive, so
> doing it twice will be slo
On Wed, Jun 13, 2018 at 09:25:37AM -0700, Nanley Chery wrote:
> On Wed, Jun 13, 2018 at 09:39:08AM +0300, Pohjolainen, Topi wrote:
> > On Tue, Jun 12, 2018 at 12:22:02PM -0700, Nanley Chery wrote:
> > > ---
> > > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 40 ---
> > > 1 file
On Wed, Jun 13, 2018 at 09:20:55AM -0700, Nanley Chery wrote:
> On Wed, Jun 13, 2018 at 09:33:41AM +0300, Pohjolainen, Topi wrote:
> > On Tue, Jun 12, 2018 at 12:22:00PM -0700, Nanley Chery wrote:
> > > ---
> > > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 30 +--
> > > 1 file
https://bugs.freedesktop.org/show_bug.cgi?id=106677
--- Comment #3 from Thomas Hellström ---
FWIW, no apparent problems on Fedora Rawhide with 4.18.0-rc0.
/Thomas
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This causes rendering issues in Shadow Warrior 2 with DXVK.
Cc: mesa-sta...@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106912
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_meta_clear.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/amd/
Reviewed-by: Bas Nieuwenhuizen
On Wed, Jun 13, 2018 at 8:19 PM, Samuel Pitoiset
wrote:
> This causes rendering issues in Shadow Warrior 2 with DXVK.
>
> Cc: mesa-sta...@lists.freedesktop.org
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106912
> Signed-off-by: Samuel Pitoiset
> ---
>
https://bugs.freedesktop.org/show_bug.cgi?id=106912
Samuel Pitoiset changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
We don't enable CMASK for linear surfaces and addrlib only
enables DCC for tiling surfaces.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_meta_clear.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 28050079f
This is useless because we don't support DCC/CMASK for mipmaps.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_meta_clear.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index fae441ceb66..28050079f92 100644
---
https://bugs.freedesktop.org/show_bug.cgi?id=106677
--- Comment #4 from David Cuthbert ---
Note that it takes some fiddling to reproduce this currently (the exact trigger
isn't known). I can go hours without seeing this issue.
I've been banging my head against the wall trying to get my extra log
https://bugs.freedesktop.org/show_bug.cgi?id=106479
Samuel Pitoiset changed:
What|Removed |Added
Status|NEEDINFO|RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=106696
Samuel Pitoiset changed:
What|Removed |Added
Resolution|--- |NOTOURBUG
Status|REOPENED
On Wed, Jun 13, 2018 at 12:19 PM, Amit Pundir wrote:
> On 13 June 2018 at 20:45, Rob Herring wrote:
>>
>> +Amit and John
>>
>> On Sat, Jun 9, 2018 at 11:27 AM, Robert Foss
>> wrote:
>> > This patch both adds support for probing & filtering DRM nodes
>> > and switches away from using the GRALLOC
https://bugs.freedesktop.org/show_bug.cgi?id=106756
Samuel Pitoiset changed:
What|Removed |Added
Status|NEW |NEEDINFO
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The current BO cache puts BOs back into the recycle bucket the moment the
refcount hits zero. If the BO is busy, we just don't re-use it until it
isn't or we re-use it for a render target which we assume will be used
first for drawing. This patch series reworks the way the BO cache works a
bit so
---
src/mesa/drivers/dri/i965/brw_bufmgr.c | 46 ++
src/mesa/drivers/dri/i965/brw_bufmgr.h | 1 -
2 files changed, 10 insertions(+), 37 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c
b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index 58bb559fdee..e9d3daa598
---
src/mesa/drivers/dri/i965/brw_context.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 9ced230ec14..98ec54f2ae3 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/
---
src/mesa/drivers/dri/i965/brw_bufmgr.c | 51 --
1 file changed, 32 insertions(+), 19 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c
b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index cfa32ff3726..ef918315c65 100644
--- a/src/mesa/drivers/dri/i965/brw_buf
While we can always trust the kernel to reference count things and not
actually free any memory until the GPU is done with it, that may not
actually do what we want. We have to be careful, for instance, with
recycling buffers that we might immediately map. This commit provides a
tagging mechanism
This has the potential to make brw_bo_busy a bit cheaper for internal
BOs if someone has checked it for busy or waited on it before. We
already do the same thing in brw_bo_wait.
---
src/mesa/drivers/dri/i965/brw_bufmgr.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/mesa/drivers/dr
The previous approach gave a sort of round-robin behavior which made
sense because we didn't want to walk the entire list looking for the
first idle BO. Now that everything is idle, we can pick any BO in the
list and it should be fine. Using the most recently used BO should give
us less over-all
Instead of unreferencing all the BOs used by the freshly submitted batch
directly, ask the bufmgr to unref them for us once the batch goes idle.
This should more-or-less have the same effect except that we now wait to
unref the BOs until the batch is idle.
---
src/mesa/drivers/dri/i965/intel_batch
It was never all that useful and no one had really demonstrated the
value of it in any concrete way. It is, however, a very easy way to run
into trouble if you're not careful. Let's just drop it and hope to
solve whatever problems it was solving in some other way.
---
src/mesa/drivers/dri/i965/i
On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> This new function takes care of shuffle/unshuffle components of a
> particular bit-size in components with a different bit-size.
>
> If source type size is smaller than destination type size the operation
https://bugs.freedesktop.org/show_bug.cgi?id=106907
--- Comment #1 from Jordan Justen ---
Any chance you might be able to write a small piglit test
that shows the bug? For example:
https://cgit.freedesktop.org/piglit/commit/?id=f1dc46ddf8c1
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We need to init the cb_shader_format correctly with the changed
col_format, so this moves the col_format adjustment to before the
adjustment to before the cb_shader_mask gets generated.
Fixes: 06d3c650980 "radv: fix a GPU hang when MRTs are sparse"
Bugzilla: https://bugs.freedesktop.org/show_bug.c
I'm trusting that not much changed other than what was explicitly called
out. I didn't want to re-read in *that* much detail again. :-)
Reviewed-by: Jason Ekstrand
On Mon, Jun 11, 2018 at 10:39 PM, Keith Packard wrote:
> This adds support for the KHR_display extension support to the vulkan
On Mon, Jun 11, 2018 at 10:39 PM, Keith Packard wrote:
> This adds support for the KHR_display extension to the anv Vulkan
> driver. The driver now attempts to open the master DRM node when the
> KHR_display extension is requested so that the common winsys code can
> perform the necessary operati
On Mon, Jun 11, 2018 at 9:32 PM, Keith Packard wrote:
> Jason Ekstrand writes:
>
> > This seems a bit odd. Why is the FD not stored in the display? What if
> > you acquire multiple displays for two-player VR? If the master FD passed
> > in is not -1, we could just create a VkDisplayKHR object
patches 4-6 are
Reviewed-by: Jason Ekstrand
On Mon, Jun 11, 2018 at 10:39 PM, Keith Packard wrote:
> Add support for the EXT_direct_mode_display extension. This just
> provides the vkReleaseDisplayEXT function.
>
> v2:
> Adopt Jason Ekstrand's coding conventions
>
> Declare var
Reviewed-by: Jason Ekstrand
On Mon, Jun 11, 2018 at 10:39 PM, Keith Packard wrote:
> This adds support for the KHR_display extension to the radv Vulkan
> driver. The driver now attempts to open the master DRM node when the
> KHR_display extension is requested so that the common winsys code can
On Wed, Jun 13, 2018 at 2:46 PM, Jason Ekstrand
wrote:
> Reviewed-by: Jason Ekstrand
>
With the caveat that I have no idea how the amdgpu kernel interface works.
:-)
> On Mon, Jun 11, 2018 at 10:39 PM, Keith Packard wrote:
>
>> This adds support for the KHR_display extension to the radv Vulk
On Mon, Jun 11, 2018 at 10:39 PM, Keith Packard wrote:
> This adds support for the KHR_display extension to the anv Vulkan
> driver. The driver now attempts to open the master DRM node when the
> KHR_display extension is requested so that the common winsys code can
> perform the necessary operati
Tapani Pälli writes:
> Patch sets additional formats renderable and enables the extension
> when OpenGL ES 3.1 is supported.
>
> Signed-off-by: Tapani Pälli
> ---
> src/mesa/main/extensions_table.h | 1 +
> src/mesa/main/fbobject.c | 20 +++-
> src/mesa/main/glformats.c
Signed-off-by: Rhys Perry
---
src/gallium/drivers/nouveau/codegen/nv50_ir.cpp| 3 ++-
src/gallium/drivers/nouveau/codegen/nv50_ir.h | 14
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 12 +--
.../drivers/nouveau/codegen/nv50_ir_print.cpp | 20 +++
Strongly mitigates the harm from the previous commit, which made many
integer multiplications much more heavy on the register and instruction
count.
total instructions in shared programs : 5294693 -> 5268293 (-0.50%)
total gprs used in shared programs: 624962 -> 624196 (-0.12%)
total shared us
This hits the shader-db numbers a good bit, though a few xmads is way
faster than an imul or imad and the cost is mitigated by the next commit,
which optimizes many multiplications by immediates into shorter and less
register heavy instructions than the xmads.
total instructions in shared programs
This series improve the performance of integer multiplication by removing
much usage of the very slow IMAD and IMUL. It depends on the
SHLADD/IndirectPropagation patches.
The first and second patch add support for the XMAD instruction in codegen
The third patch replaces most IMADs and IMULs with
Signed-off-by: Rhys Perry
---
.../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 61 ++
.../nouveau/codegen/nv50_ir_target_gm107.cpp | 6 ++-
.../nouveau/codegen/nv50_ir_target_nvc0.cpp| 1 +
3 files changed, 67 insertions(+), 1 deletion(-)
diff --git a/src/
https://bugs.freedesktop.org/show_bug.cgi?id=106903
--- Comment #2 from Bas Nieuwenhuizen ---
https://patchwork.freedesktop.org/patch/229361/ should fix this.
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From: Benjamin Gordon
When building the Chrome OS Android container, we need to build copies
of mesa that don't conflict with the Android system-supplied libraries.
This adds options to create suffixed versions of EGL and GLES libraries:
libEGL.so -> libEGL${egl-lib-suffix}.so
libGLESv1_CM.so ->
On Wed, Jun 13, 2018 at 9:46 AM Dylan Baker wrote:
> Quoting Eric Engestrom (2018-06-13 03:03:25)
> > On Tuesday, 2018-06-12 11:19:40 -0600, bmgor...@chromium.org wrote:
> > > From: Benjamin Gordon
> > >
> > > When building the Chrome OS Android container, we need to build copies
> > > of mesa t
On Mon, Jun 11, 2018 at 10:39 PM, Keith Packard wrote:
> This extension adds the ability to borrow an X RandR output for
> temporary use directly by a Vulkan application. For DRM, we use the
> Linux resource leasing mechanism.
>
> v2:
> Clean up xlib_lease detection
>
> * Use sepa
On Thu, Jun 14, 2018 at 12:02 AM, Rhys Perry wrote:
> Signed-off-by: Rhys Perry
> ---
> src/gallium/drivers/nouveau/codegen/nv50_ir.cpp| 3 ++-
> src/gallium/drivers/nouveau/codegen/nv50_ir.h | 14
> .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 12 +--
> ..
From: Dave Airlie
GLSL 4.60 offically added this but games and older CTS suites actually
had shaders that did this, we may as well enable it everywhere.
---
src/compiler/glsl/glsl_parser.yy | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/glsl/glsl_parser.yy b/src/compiler/glsl/g
On 14/06/18 09:53, Dave Airlie wrote:
From: Dave Airlie
GLSL 4.60 offically added this but games and older CTS suites actually
had shaders that did this, we may as well enable it everywhere.
---
src/compiler/glsl/glsl_parser.yy | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compil
On 14 June 2018 at 07:35, Bas Nieuwenhuizen wrote:
> We need to init the cb_shader_format correctly with the changed
> col_format, so this moves the col_format adjustment to before the
> adjustment to before the cb_shader_mask gets generated.
>
> Fixes: 06d3c650980 "radv: fix a GPU hang when MRTs
On 13/06/18 22:46, Jason Ekstrand wrote:
> On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> mailto:jmcasan...@igalia.com>> wrote:
>
> This new function takes care of shuffle/unshuffle components of a
> particular bit-size in components with a different bit-size.
>
> If sou
On Wed, Jun 13, 2018 at 4:53 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> GLSL 4.60 offically added this but games and older CTS suites actually
> had shaders that did this, we may as well enable it everywhere.
> ---
> src/compiler/glsl/glsl_parser.yy | 1 +
> 1 file changed, 1 insertion(+)
>
On 14 June 2018 at 10:12, Matt Turner wrote:
> On Wed, Jun 13, 2018 at 4:53 PM, Dave Airlie wrote:
>> From: Dave Airlie
>>
>> GLSL 4.60 offically added this but games and older CTS suites actually
>> had shaders that did this, we may as well enable it everywhere.
>> ---
>> src/compiler/glsl/gls
On Wed, Jun 13, 2018 at 5:07 PM, Chema Casanova
wrote:
> On 13/06/18 22:46, Jason Ekstrand wrote:
> > On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> > mailto:jmcasan...@igalia.com>> wrote:
> >
> > This new function takes care of shuffle/unshuffle components of a
> > particul
Google Earth VR shaders uses builtins in constant expressions with
GLSL 1.10. That feature wasn't allowed until GLSL 1.20.
---
src/compiler/glsl/ast_function.cpp | 3 ++-
src/gallium/auxiliary/pipe-loader/driinfo_gallium.h | 1 +
src/gallium/include/state_tracker/st_api.h
Glibc has the same code to get program_invocation_short_name. However
for some reason the short name gets mangled for some wine apps.
For example with Google Earth VR I get:
program_invocation_name:
"/home/tarceri/.local/share/Steam/steamapps/common/EarthVR/Earth.exe"
program_invocation_short_na
---
src/util/drirc | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/util/drirc b/src/util/drirc
index ff706d16001..7f91035ae8b 100644
--- a/src/util/drirc
+++ b/src/util/drirc
@@ -178,6 +178,7 @@ TODO: document the other workarounds.
+
This relaxes a number of ES shader restrictions allowing shaders
to follow more desktop GLSL like rules.
This initial implementation relaxes the following:
- allows linking ES shaders with desktop shaders
- allows mismatching precision qualifiers
- always enables standard derivative builtins
---
src/util/drirc | 4
1 file changed, 4 insertions(+)
diff --git a/src/util/drirc b/src/util/drirc
index c76f1ca4380..ff706d16001 100644
--- a/src/util/drirc
+++ b/src/util/drirc
@@ -176,6 +176,10 @@ TODO: document the other workarounds.
+
+
+
On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> These new shuffle functions deal with the shuffle/unshuffle operations
> needed for read/write operations using 32-bit components when the
> read/written components have a different bit-size (8, 16, 64-bit
s/from/for/ in the commit message.
On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> ---
> src/intel/compiler/brw_fs_nir.cpp | 7 ++-
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/
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