On 16/05/17 06:08 AM, Marek Olšák wrote:
>
> I don't think what you're seeing is related, but I'd be interested in
> a screenshot of sysprof showing what you described.
FWIW, when using sysprof, I recommend sharing the actual sysprof data
file rather than screenshots, so everybody can peruse the
This adds support for extended texture formats through
TEXTURE_FORMAT_EXT.
Two of these extended formats are added:
- R8_SNORM
- R8G8_UNORM
---
src/gallium/drivers/etnaviv/etnaviv_format.c | 49 ++-
src/gallium/drivers/etnaviv/etnaviv_format.h | 3 ++
src/gallium/drive
---
src/gallium/drivers/etnaviv/etnaviv_format.c | 50 +--
src/gallium/drivers/etnaviv/etnaviv_format.h | 3 ++
src/gallium/drivers/etnaviv/etnaviv_texture.c | 15 +---
3 files changed, 54 insertions(+), 14 deletions(-)
diff --git a/src/gallium/drivers/etnaviv/etnav
Current information shows that both extended texture/render formats
and texture swizzling were introduced with the HALTI0 feature bit,
available on GC2000/GC3000.
---
src/gallium/drivers/etnaviv/etnaviv_format.c | 12
src/gallium/drivers/etnaviv/etnaviv_format.h | 3 +++
src/gallium/
https://bugs.freedesktop.org/show_bug.cgi?id=98833
--- Comment #17 from Daniel Stone ---
I've been looking at this over the past couple of days, but haven't quite been
able to figure it out. Hopefully I can crack it today.
--
You are receiving this mail because:
You are the QA Contact for the b
Commit 9ca6711faa03 changed the Wayland winsys to only block for the
frame callback inside SwapBuffers, rather than get_back_bo. get_back_bo
would perform a single non-blocking Wayland event dispatch, to try to
find any release events which we had pulled off the wire but not
actually processed. The
https://bugs.freedesktop.org/show_bug.cgi?id=98833
--- Comment #18 from Daniel Stone ---
Right, here we are:
https://lists.freedesktop.org/archives/mesa-dev/2017-May/155791.html
--
You are receiving this mail because:
You are the QA Contact for the bug.__
Untangle the exit cleanup paths so we don't try to use the registry
variable before it's been initialised.
Signed-off-by: Daniel Stone
Cc: mesa-sta...@lists.freedesktop.org
---
src/vulkan/wsi/wsi_common_wayland.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/vu
There's no need to call wl_display_roundtrip() after trying to create a
buffer through wl_drm; if it succeeds then everything is fine, and if it
fails, then we get a fatal protocol error so can't recover anyway.
Additionally, doing a roundtrip on the default / main application queue,
is destructiv
Calling random callbacks on the display's event queue is hostile, as
we may call into client code when it least expects it. Create our own
event queue, one per wsi_wl_display, and use that for the registry.
Signed-off-by: Daniel Stone
Cc: mesa-sta...@lists.freedesktop.org
---
src/vulkan/wsi/wsi_
wl_display_roundtrip_queue() exists and can replace roundtrip(). The
API was introduced with wayland 1.6, while we currently require 1.11.
Signed-off-by: Daniel Stone
Reviewed-by: Emil Velikov
Cc: mesa-sta...@lists.freedesktop.org
---
src/egl/drivers/dri2/platform_wayland.c | 26 +--
During display initialisation, we need a separate event queue to handle
the registry events, which is correctly handled. But we also need
separate per-surface event queues to handle swapchain-related events,
such as surface frame events and buffer release events. This avoids two
surfaces from the s
Though most swapchain operations used a queue, they were racy in that
the object was created with the queue only set later, meaning that its
event could potentially be dispatched from the default queue in between
these two steps.
Use proxy wrappers to avoid this race, also assigning wl_buffers cre
For the series:
Reviewed-by: Marek Olšák
Marek
On May 16, 2017 8:17 AM, "Nicolai Hähnle" wrote:
> On 16.05.2017 01:14, Marek Olšák wrote:
>
>> Do you have a branch somewhere so that I can see the last patch?
>>
>
> Here you go: https://cgit.freedesktop.org/~nh/mesa/log/?h=si_shader_mem
>
> Ch
On Tue, 16 May 2017 11:02:22 +0100
Daniel Stone wrote:
> Commit 9ca6711faa03 changed the Wayland winsys to only block for the
> frame callback inside SwapBuffers, rather than get_back_bo. get_back_bo
> would perform a single non-blocking Wayland event dispatch, to try to
> find any release events
Hi Pekka,
On 16 May 2017 at 11:32, Pekka Paalanen wrote:
> On Tue, 16 May 2017 11:02:22 +0100
> Daniel Stone wrote:
>> This removed a guarantee that we would've processed all events inside
>> get_back_bo(), and introduced a failure whereby the server could've sent
>> a buffer release event, but
According to the spec for VkRenderPassMultiviewCreateInfoKHX:
"Multiview causes all drawing and clear commands in the subpass to
behave as if they were broadcast to each view, where each view is
represented by one layer of the framebuffer attachments."
This patch implements the broadcast for clea
On 16.05.2017 02:56, Ian Romanick wrote:
On 05/15/2017 02:27 AM, Nicolai Hähnle wrote:
Hi all,
This series aims to simplify how we handle unnamed struct types and fix some
bugs on the way. Some of the patches should be uncontroversial, and all of
them align with my understanding of the GLSL spe
2017-05-16 3:31 GMT+02:00 Matt Turner :
> On Mon, Apr 24, 2017 at 4:50 PM, Matt Turner wrote:
>> On Thu, Apr 6, 2017 at 12:49 PM, Thomas Helland
>> wrote:
>>> The conditional discard pass follows the same pattern, so merge the
>>> two, and avoid running the visitor two times.
>>> ---
>>> src/com
Hi all,
As many of you know the current DRI interface provides backwards
compatibility between old loaders and new drivers, and vice-versa.
Sometimes issues cannot be addressed with the existing extensions and
we need to bump the version or provide an alternative extension.
In such cases we still
On 16 May 2017 at 02:07, Timothy Arceri wrote:
> On 16/05/17 10:47, Kenneth Graunke wrote:
>>
>> On Monday, May 15, 2017 4:06:31 PM PDT Timothy Arceri wrote:
>>>
>>> On 16/05/17 08:13, Ian Romanick wrote:
On 04/23/2017 10:28 PM, Timothy Arceri wrote:
> diff --git a/src/mapi/glap
On 16.05.2017 03:23, Timothy Arceri wrote:
V2: call check_layered_texture_target() even for no_error
---
src/mesa/main/fbobject.c | 141 ++-
1 file changed, 41 insertions(+), 100 deletions(-)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobj
On 16.05.2017 04:19, Timothy Arceri wrote:
On 16/05/17 00:12, Nicolai Hähnle wrote:
On 12.05.2017 06:12, Timothy Arceri wrote:
This reduces duplication between the dsa and non-dsa function
and will also be used in the following commit to add
KHR_no_error support.
---
src/mesa/main/teximage.c
AC_HEADER_MAJOR only defines MAJOR_IN_SYSMACROS if major() is _not_
defined by alone. It is, but it warns, and that's ugly.
To fix this, push -Werror into CFLAGS when invoking AC_HEADER_MAJOR so
the warning makes the compilation test fail.
Cc: Emil Velikov
Signed-off-by: Adam Jackson
Signed-off
Don't reject YUV formats that the driver doesn't handle natively, since
mesa/st already knows how to lower this in shader.
Fixes: 83e9de2 ("st/mesa: EGLImageTarget* error handling")
Cc: 17.1
---
src/mesa/state_tracker/st_cb_eglimage.c | 32 ++--
1 file changed, 30 ins
Hi Wladimir,
On Tue, 2017-05-16 at 10:42 +0200, Wladimir J. van der Laan wrote:
> Current information shows that both extended texture/render formats
> and texture swizzling were introduced with the HALTI0 feature bit,
> available on GC2000/GC3000.
With this patch applied, trying to import R8_UNO
On Tue, May 16, 2017 at 10:33 AM, Rob Clark wrote:
> Don't reject YUV formats that the driver doesn't handle natively, since
> mesa/st already knows how to lower this in shader.
I probably should have mentioned that 'kmscube -M nv12-1img' is a good
way to test this
BR,
-R
> Fixes: 83e9de2 ("st/
On 16 May 2017 at 14:26, Emil Velikov wrote:
> On 16 May 2017 at 02:07, Timothy Arceri wrote:
>> On 16/05/17 10:47, Kenneth Graunke wrote:
>>>
>>> On Monday, May 15, 2017 4:06:31 PM PDT Timothy Arceri wrote:
On 16/05/17 08:13, Ian Romanick wrote:
>
> On 04/23/2017 10:28 PM, Timo
https://bugs.freedesktop.org/show_bug.cgi?id=100259
--- Comment #18 from Laurent carlier ---
@Emil , with slibtool :) ->
CCLD tools/aubinator
CCLD tools/aubinator_error_decode
CCLD isl/libisl.la
ar: `u' modifier ignored since `D' is the default (see `U')
CCLD blorp/libblo
On 05/15/2017 06:52 PM, John Brooks wrote:
On 2017-05-15 06:04 PM, Ian Romanick wrote:
On 05/12/2017 06:39 AM, John Brooks wrote:
Since release, Dying Light and Dead Island Definitive Edition have
been broken
on Mesa, producing at best only a black screen after loading. I
found that the
root o
On 16.05.2017 16:33, Rob Clark wrote:
Don't reject YUV formats that the driver doesn't handle natively, since
mesa/st already knows how to lower this in shader.
Fixes: 83e9de2 ("st/mesa: EGLImageTarget* error handling")
Cc: 17.1
Seems reasonable.
Reviewed-by: Nicolai Hähnle
---
src/mesa
s/Ad/Add
Series is,
Reviewed-by: Samuel Iglesias Gonsálvez
Sam
On Mon, 2017-05-15 at 08:07 -0700, Jason Ekstrand wrote:
> ---
> src/vulkan/wsi/wsi_common.h | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/src/vulkan/wsi/wsi_common.h
> b/src/vulkan/wsi/wsi_common.h
> index 5e7
Hi Matt,
This commit seems to have broken make check for me.
In src/intel/compiler/test_eu_validate.cpp, line 121, I'm getting:
~/src/mesa/src/intel/compiler/test_eu_validate.cpp:121:41: error: use of
undeclared
identifier 'devinfo'
bool ret = brw_validate_instructions(devinfo, p->stor
Add support for ETC2 compressed textures in the etnaviv driver.
These are available on GC2000+.
One step closer towards GL ES 3 support.
---
src/gallium/drivers/etnaviv/etnaviv_format.c | 11 +++
1 file changed, 11 insertions(+)
Mesa does not export the ETC2 formats without OpenGL ES 3,
Hello Philipp,
On Tue, May 16, 2017 at 04:33:34PM +0200, Philipp Zabel wrote:
> Hi Wladimir,
>
> On Tue, 2017-05-16 at 10:42 +0200, Wladimir J. van der Laan wrote:
> > Current information shows that both extended texture/render formats
> > and texture swizzling were introduced with the HALTI0 fea
On Tue, May 16, 2017 at 4:03 AM, Iago Toral Quiroga
wrote:
> According to the spec for VkRenderPassMultiviewCreateInfoKHX:
>
> "Multiview causes all drawing and clear commands in the subpass to
> behave as if they were broadcast to each view, where each view is
> represented by one layer of the f
On 05/16/2017 05:35 AM, Thomas Helland wrote:
> 2017-05-16 3:31 GMT+02:00 Matt Turner :
>> On Mon, Apr 24, 2017 at 4:50 PM, Matt Turner wrote:
>>> On Thu, Apr 6, 2017 at 12:49 PM, Thomas Helland
>>> wrote:
The conditional discard pass follows the same pattern, so merge the
two, and avoi
On 05/15/2017 11:38 AM, Gustaw Smolarczyk wrote:
> 2017-05-15 20:28 GMT+02:00 Ian Romanick :
>> With this patch I applied, I still see this bit used in several
>> places, including the i915 driver. Did you test that?
>>
>> rc/compiler/shader_enums.h:#define VARYING_BIT_FOGC
>> BITFIELD64_BIT(VARY
v1: By Ben Widawsky
v2: v1 had an assert only for VS. Add the restriction for GS, HS and
DS as well and make sure the allocated sizes are not multiple of 3.
v3: Move the entry_size checks in to compiler code (Ken)
Signed-off-by: Anuj Phogat
Cc: Kenneth Graunke
---
src/intel/compiler/brw_sh
+chad
On Mon, May 15, 2017 at 1:52 PM, Jason Ekstrand
wrote:
> All combined depth stencil buffers (even those with just stencil)
> require a 4x4 alignment on Sandy Bridge. The only depth/stencil buffer
> type that requires 4x2 is separate stencil.
> ---
> src/intel/isl/isl_gen6.c | 14 +++-
2017-05-16 18:48 GMT+02:00 Ian Romanick :
> On 05/15/2017 11:38 AM, Gustaw Smolarczyk wrote:
>> 2017-05-15 20:28 GMT+02:00 Ian Romanick :
>>> With this patch I applied, I still see this bit used in several
>>> places, including the i915 driver. Did you test that?
>>>
>>> rc/compiler/shader_enums.h
On Tue 16 May 2017, Tapani Pälli wrote:
>
>
> On 05/16/2017 02:04 AM, Chad Versace wrote:
> > Fixes regressions in Android CtsVerifier.apk on Intel Chrome OS devices
> > due to incorrect error handling in eglMakeCurrent. See below on how to
> > confirm the regression is fixed.
> >
> > This parti
On Mon 15 May 2017, Jason Ekstrand wrote:
> All combined depth stencil buffers (even those with just stencil)
> require a 4x4 alignment on Sandy Bridge. The only depth/stencil buffer
> type that requires 4x2 is separate stencil.
> ---
> src/intel/isl/isl_gen6.c | 14 +++---
> 1 file chang
On 16 May 2017 at 17:38, Ian Romanick wrote:
> What *actual* problem are you trying to solve? Honestly, it seems like
> you're just trying to find stuff to do. We have a mechanism to make
> this work, and it's not that hard. Introducing a deprecation period and
> everything that involves will m
The procedure for decompressing an opaque BC1 Vulkan format is dependant on the
comparison of two colors stored in the first 32 bits of the compressed block.
Here's the specified OpenGL (and Vulkan) behavior for reference:
The RGB color for a texel at location (x,y) in the block is given by:
The procedure for decompressing an opaque DXT1 OpenGL format is
dependant on the comparison of two colors stored in the first 32 bits of
the compressed block. Here's the specified OpenGL behavior for
reference:
The RGB color for a texel at location (x,y) in the block is given by:
RGB0,
On Mon 15 May 2017, Emil Velikov wrote:
> From: Emil Velikov
>
> The current __DRI_DRI2 imples __DRI2_FLUSH. At the same time, one can
> use __DRI_IMAGE_DRIVER alongside the latter, so the current check is
> confusing at best.
>
> Check for what we use.
Patch 1 is
Reviewed-by: Chad Versace
>
V2: Start using gen10 functions isl_gen10*(), gen10_blorp_exec()
gen10_init_atoms() (Jason)
Remove Vulkan changes. Do them later in a separate patch.
Cc: Jason Ekstrand
Signed-off-by: Anuj Phogat
---
src/intel/common/gen_l3_config.c | 1 +
src/intel/compiler/brw_eu.c
On Mon 15 May 2017, Emil Velikov wrote:
> From: Emil Velikov
>
> Analogous to previous commit.
>
> Signed-off-by: Emil Velikov
> ---
> If people prefer I can split the whitespace/indent changes in
> this/previous path from the rest. Don't feel too strongly either way.
I do think the patches
CNL MOCS defines are duplicates of SKL MOCS defines.
V2: Rebased.
Signed-off-by: Anuj Phogat
---
src/mesa/drivers/dri/i965/brw_blorp.c| 6 +++---
src/mesa/drivers/dri/i965/brw_state.h| 8
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 ++
src/mesa/drivers/
On Tuesday, May 16, 2017 9:51:03 AM PDT Anuj Phogat wrote:
> v1: By Ben Widawsky
> v2: v1 had an assert only for VS. Add the restriction for GS, HS and
> DS as well and make sure the allocated sizes are not multiple of 3.
> v3: Move the entry_size checks in to compiler code (Ken)
>
> Signed-o
What *actual* problem are you trying to solve? Honestly, it seems like
you're just trying to find stuff to do. We have a mechanism to make
this work, and it's not that hard. Introducing a deprecation period and
everything that involves will make it more work, not less.
On 05/16/2017 06:05 AM, E
Hi Hans
Please poke if patches fall through the cracks.
On 20 March 2017 at 11:05, Hans de Goede wrote:
> Together with some fixes to xdriinfo this fixes xdriinfo not working
> with glvnd.
>
> Since apps (xdriinfo) expect GetDriverConfig to work without going to
> need through the dance to setup
Hi Rob,
On Mon, May 8, 2017 at 11:29 PM, Rob Herring wrote:
> On Sat, May 6, 2017 at 7:37 AM, Tomasz Figa wrote:
>> On Sat, May 6, 2017 at 2:14 AM, Rob Herring wrote:
>>> On Mon, May 1, 2017 at 9:55 AM, Tomasz Figa wrote:
On Mon, May 1, 2017 at 11:17 PM, Mauro Rossi wrote:
> Hi all,
From: Nicolai Hähnle
This reverts commit 0e9991f957e296f46cfff40a94ffba0adf2a58e1.
At least when we fallback because of TGSI, the gl_program objects are
re-allocated, and we don't in fact already have a reference to the
gl_shader_program_data.
This fixes a crash that can be reproduced as follow
https://bugs.freedesktop.org/show_bug.cgi?id=101065
Bug ID: 101065
Summary: compiler/test_eu_validate.cpp:121:41: error: ‘devinfo’
was not declared in this scope
Product: Mesa
Version: git
Hardware: Other
OS
On Tue, May 16, 2017 at 8:44 AM, Aaron Watry wrote:
> Hi Matt,
>
> This commit seems to have broken make check for me.
>
> In src/intel/compiler/test_eu_validate.cpp, line 121, I'm getting:
>
> ~/src/mesa/src/intel/compiler/test_eu_validate.cpp:121:41: error: use of
> undeclared
> identifie
2017-05-10 20:03 GMT+02:00 Wladimir J. van der Laan :
> Good catch!
>
> Reviewed-By: Wladimir J. van der Laan
>
> On Wed, May 10, 2017 at 06:01:04PM +0200, Lucas Stach wrote:
>> PIPE_BUFFER is a target enum, not a binding. This caused the driver to
>> up-align the height of buffer resources, leadi
2017-05-10 18:01 GMT+02:00 Lucas Stach :
> Signed-off-by: Lucas Stach
Reviewed-by: Christian Gmeiner
greets
--
Christian Gmeiner, MSc
https://www.youtube.com/user/AloryOFFICIAL
https://soundcloud.com/christian-gmeiner
___
mesa-dev mailing list
mesa-d
2017-05-10 18:01 GMT+02:00 Lucas Stach :
> This way we can just test the feature bits and don't need to spread
> the debug overrides to all locations touching a feature.
>
> Signed-off-by: Lucas Stach
Reviewed-by: Christian Gmeiner
greets
--
Christian Gmeiner, MSc
https://www.youtube.com/user/
2017-05-10 18:01 GMT+02:00 Lucas Stach :
> Use the proper pipe_resource_reference function instead of
> rolling our own.
>
> Signed-off-by: Lucas Stach
Reviewed-by: Christian Gmeiner
greets
--
Christian Gmeiner, MSc
https://www.youtube.com/user/AloryOFFICIAL
https://soundcloud.com/christian-gm
2017-05-10 18:01 GMT+02:00 Lucas Stach :
> From: Philipp Zabel
>
> Just increment the resource seqno instead of setting the texture
> seqno to be lower by one than the resource seqno.
>
> Signed-off-by: Philipp Zabel
> Signed-off-by: Lucas Stach
Reviewed-by: Christian Gmeiner
greets
--
Christ
Hi Wladimir.
I started working on this topic last week and thought some time on how
to add those ext texture formats in a clean and nice way. I come up
with this patches:
https://github.com/austriancoder/mesa/commit/1fac9dd179976dce3d991bb0715707021c093f1a.patch
https://github.com/austriancoder/m
https://bugs.freedesktop.org/show_bug.cgi?id=101065
Vinson Lee changed:
What|Removed |Added
Resolution|--- |FIXED
Keywords|
On Fri, May 12, 2017 at 4:38 PM, Anuj Phogat wrote:
> As sRGB now supports lossless compression, don't we also need to stop
> resolving single sampled color render buffers for sRGB formats in Gen 10.
>
s/don't we/we. Fixed locally.
> Signed-off-by: Anuj Phogat
> ---
> src/mesa/drivers/dri/i965/
ISL doesn't have a concept of a partial miptree. Instead, we need to
subtract off first_level.
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mip
When Sandy Bridge came out, surface state management suddenly became
significantly more complicated because of HiZ, MSAA, and separate stencil.
In order to deal with all of these complications, Paul Berry write BLORP
which is a blit framework that's capable of handling all of the exotic
cases we ha
The blorp_copy entrypoint is designed for doing memcpy like operations
which is what we need to do here while blorp_blit is for handling format
conversion and scaling. Using blorp_copy is much simpler and prevents
us from getting formats wrong. While we're here, we get rid of the
layers_per_blit
We've discovered in the Vulkan driver that simply doing the end-of-pipe
sync afterwards is insufficient. The specific requirement stated in the
PRM is that you have to do one every time you transition between the
tree modes of "clear", "render", and "resolve". This is GL, so we could
track it but
Most things on gen4-5 are addresses because we don't have dynamic state
base address and we don't have instruction state base on gen4. However,
whoever converted things to addresses got a little over-excited and
converted too much.
---
src/intel/genxml/gen4.xml | 10 +-
src/intel/genxml/
The guts of blorp and ISL don't understand i965's partial miptrees.
Instead, we need to subtract off first_level before we hand anything off
to blorp.
---
src/mesa/drivers/dri/i965/brw_blorp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
b/src/mesa/
It's not needed for blorp_copy because it already overrides formats.
It's also not needed for blorp_clear because it clears stencil as
stencil.
---
src/intel/blorp/blorp.c | 5 -
src/intel/blorp/blorp_blit.c | 9 +
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/src
Iron Lake introduced the multiple KSP thing and so you have KSP0-3.
However, the genxml didn't have an index on the first "Kernel Start
Pointer" or "GRF Register Count". Add one to match gen6+.
---
src/intel/genxml/gen5.xml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/s
Gen4 cube maps are a 2-D surface with ISL_DIM_LAYOUT_GEN4_3D which is a
bit weird but accurate none the less.
---
src/intel/isl/isl.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index f70e188..c728a85 100644
On Iron Lake, the packets exist but we never emit them so there's no
need for us to ask the driver to make batch space for them.
---
src/intel/isl/isl.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index f89f351..f70e18
All of the other gens use "PARAMETERS".
---
src/intel/genxml/gen5.xml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml
index f420453..a2baa12 100644
--- a/src/intel/genxml/gen5.xml
+++ b/src/intel/genxml/gen5.xml
@@ -949,7 +9
---
src/intel/isl/isl.h | 20
src/intel/isl/isl_surface_state.c | 6 ++
2 files changed, 26 insertions(+)
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 7778551..f89ba50 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -576,6 +576
---
src/intel/common/gen_decoder.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index 6bb9a7a..1a99099 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -703,6 +703,10 @@ gen_group_get_leng
---
src/intel/isl/isl.c | 3 +--
src/intel/isl/isl_gen4.c | 51
src/intel/isl/isl_gen4.h | 5 +
3 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index c728a85..321850e 100644
--- a/
It isn't a pointer to "color calc state", that's the packet it's in.
It's a pointer to the CC viewport state.
---
src/intel/genxml/gen4.xml | 2 +-
src/intel/genxml/gen45.xml | 2 +-
src/intel/genxml/gen5.xml | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/intel/genxml
---
src/intel/genxml/gen4.xml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/genxml/gen4.xml b/src/intel/genxml/gen4.xml
index c7af454..58e0751 100644
--- a/src/intel/genxml/gen4.xml
+++ b/src/intel/genxml/gen4.xml
@@ -1019,7 +1019,7 @@
-
+
Having it be a pointer means that we end up caching clip programs based
on a pointer to wm_prog_data rather than the actual interpolation modes.
We've been caching one clip program per FS ever since 91d61fbf7cb61a44a
where Timothy rewrote brw_setup_vue_interpolation().
---
src/mesa/drivers/dri/i96
---
src/intel/genxml/gen4.xml | 6 +++---
src/intel/genxml/gen45.xml| 6 +++---
src/intel/genxml/gen5.xml | 6 +++---
src/mesa/drivers/dri/i965/genX_state_upload.c | 2 +-
4 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/s
---
src/intel/blorp/blorp_blit.c | 16
src/intel/blorp/blorp_priv.h | 3 +++
2 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 75fc3f5..8408ebc 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/inte
---
src/intel/blorp/blorp_genX_exec.h | 458 +++---
1 file changed, 229 insertions(+), 229 deletions(-)
diff --git a/src/intel/blorp/blorp_genX_exec.h
b/src/intel/blorp/blorp_genX_exec.h
index 5ce60d8..6e61640 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/s
---
src/intel/genxml/gen5.xml | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml
index a0b61ae..f420453 100644
--- a/src/intel/genxml/gen5.xml
+++ b/src/intel/genxml/gen5.xml
@@ -584,7 +584,6 @@
-
--
2.5.0.400.g
---
src/intel/Makefile.sources | 1 +
.../compiler/brw_compile_sf.c} | 185 -
src/intel/compiler/brw_compiler.h | 50 ++
src/intel/compiler/brw_eu_defines.h| 2 +
src/mesa/drivers/dri/i965/Mak
Somehow this got missed.
---
src/intel/genxml/gen45.xml | 61 ++
1 file changed, 61 insertions(+)
diff --git a/src/intel/genxml/gen45.xml b/src/intel/genxml/gen45.xml
index bde6080..0365a36 100644
--- a/src/intel/genxml/gen45.xml
+++ b/src/intel/genxml/
Having it be a pointer means that we end up caching clip programs based
on a pointer to wm_prog_data rather than the actual interpolation modes.
We've been caching one clip program per FS ever since 91d61fbf7cb61a44a
where Timothy rewrote brw_setup_vue_interpolation().
---
src/mesa/drivers/dri/i96
---
src/intel/blorp/blorp_blit.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index fe24f1f..42e7703 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -2042,6 +2042,12 @@ blorp_blit(struct blorp_
---
src/intel/compiler/brw_disasm.c | 20 ++--
src/intel/compiler/brw_eu.c | 4 ++--
src/intel/compiler/brw_eu.h | 6 +++---
3 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index 8b44736..a
It isn't supported prior to gen6 and, on gen6+, NIR will fuse the fmul
and fadd into an ffma automatically for us anyway.
---
src/intel/blorp/blorp_blit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 23e33de..
These need special handling because they have no "DWord Length"
parameter and they have an unusual bias of 1.
---
src/intel/common/gen_decoder.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index e1a2fc
---
src/mesa/drivers/dri/i965/brw_blorp.c | 17 ++---
src/mesa/drivers/dri/i965/intel_fbo.c | 66 +--
2 files changed, 30 insertions(+), 53 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 7404606..8
The width and height of the copy don't have to be aligned to the block
size if they specify the right or bottom edges of the image. (See also
the comment and asserts right above). We need to round them up when we
do the division in order to get it 100% right.
Cc: "17.0 17.1"
---
src/mesa/drive
It's no longer used.
---
src/intel/blorp/blorp_genX_exec.h | 19 ---
1 file changed, 19 deletions(-)
diff --git a/src/intel/blorp/blorp_genX_exec.h
b/src/intel/blorp/blorp_genX_exec.h
index 0bb4b9a..5ce60d8 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blor
---
src/intel/blorp/blorp_genX_exec.h | 56 ++-
1 file changed, 31 insertions(+), 25 deletions(-)
diff --git a/src/intel/blorp/blorp_genX_exec.h
b/src/intel/blorp/blorp_genX_exec.h
index 9e61f69..0bb4b9a 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src
We keep the blit path because it's probably faster when it works.
However, now that we can use blorp, we can delete that nasty CPU
fall-back path.
---
src/mesa/drivers/dri/i965/intel_copy_image.c | 140 ---
1 file changed, 17 insertions(+), 123 deletions(-)
diff --git a/sr
We also add a slot variable and use it as an iterator. This will make
it much easier to conditionally put something between the header and the
vertex position.
---
src/intel/blorp/blorp_genX_exec.h | 75 ++-
1 file changed, 43 insertions(+), 32 deletions(-)
di
As part of enabling support for SF programs, we plumb the SF URB size
through to emit_urb_config. For now, it's always zero but, on gen4, it
may be something larger.
---
src/intel/blorp/blorp.c | 62 +
src/intel/blorp/blorp_blit.c|
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