[Mesa-dev] [PATCH] glsl: do not raise unitialized variable warnings on builtins/reserved GL variables

Needed because not all the built-in variables are marked as system values, so they still have the mode ir_var_auto. Right now it fixes raising the warning when gl_GlobalInvocationID and gl_LocalInvocationIndex are used. v2: use is_gl_identifier instead of filtering for some names (Ilia Mirkin)

Re: [Mesa-dev] [PATCH] glsl: do not raise unitialized variable warnings on builtins/reserved GL variables

On Friday, April 1, 2016 9:40:03 AM PDT Alejandro Piñeiro wrote: > Needed because not all the built-in variables are marked as system > values, so they still have the mode ir_var_auto. Right now it fixes > raising the warning when gl_GlobalInvocationID and > gl_LocalInvocationIndex are used. > > v

Re: [Mesa-dev] [PATCH] gallium/radeon: allow multiple exports of the same texture with different usage

On 01.04.2016 00:47, Marek Olšák wrote: > From: Marek Olšák > > Instead of failing an assertion, disable DCC and CMASK on the first export > that needs it, and merge the external usage flags. [...] > + /* Set metadata. */ > + if (!res->is_shared || update_metadata) { >

Re: [Mesa-dev] [PATCH] glsl: do not raise unitialized variable warnings on builtins/reserved GL variables

On 01/04/16 09:46, Kenneth Graunke wrote: > On Friday, April 1, 2016 9:40:03 AM PDT Alejandro Piñeiro wrote: >> Needed because not all the built-in variables are marked as system >> values, so they still have the mode ir_var_auto. Right now it fixes >> raising the warning when gl_GlobalInvocationID

Re: [Mesa-dev] [PATCH 27/29] nir/lower_to_source_mod: Skip unsafe operations

On 31/03/16 17:16, Connor Abbott wrote: > This seems a little ugly to me. Since these ops are just moving bits > around, maybe we should just convert the float64 src/dest to uint64? > We do this for other opcodes that just shuffle bits around. > Yes, this is a possibility. I wonder if the change

Re: [Mesa-dev] [PATCHv2 0/9] drisw/glx: use XShm if possible

On Mon, 15 Jun 2015 15:34:06 +0200 marcandre.lureau at gmail.com (Marc-André Lureau) wrote: > Hi, > > XPutImage/XGetImage requires to copy the images around, and the > request may be split over several chunks. Using XShm should improve > performance. > Just wanted to check what happened to this

[Mesa-dev] [Bug 94737] Git history is broken; prevents github upload

https://bugs.freedesktop.org/show_bug.cgi?id=94737 Daniel Stone changed: What|Removed |Added Status|REOPENED|RESOLVED Resolution|---

Re: [Mesa-dev] [PATCH v2] math: Import isinf and others to global namespace

On 31/03/16 23:08, Pierre Moreau wrote: Starting from C++11, several math functions, like isinf, moved into the std namespace. Since cmath undefines those functions before redefining them inside the namespace, and glibc 2.23 defines the C variants as macros, the C variants in global namespace are

Re: [Mesa-dev] [PATCH 1/5] include/GL: add mesa_glinterop.h for OpenGL-OpenCL interop (v3)

On 16 March 2016 at 10:40, Marek Olšák wrote: > "offset_after" isn't nasty. :) Yeah, I was inspired by other APIs I > had seen. The sizes make even more sense when they are function > parameters, because the caller can just do: > (sizeof(in), &in, sizeof(out), &out) > A nice list of arguments: -

Re: [Mesa-dev] [PATCH v2] math: Import isinf and others to global namespace

On 01:11 PM - Apr 01 2016, Jose Fonseca wrote: > On 31/03/16 23:08, Pierre Moreau wrote: > >Starting from C++11, several math functions, like isinf, moved into the std > >namespace. Since cmath undefines those functions before redefining them > >inside > >the namespace, and glibc 2.23 defines the

Re: [Mesa-dev] [PATCH v2 1/5] egl: Add EGL_FRAMEBUFFER_TARGET_ANDROID attribute

On 22 February 2016 at 15:24, Rob Herring wrote: > On Thu, Feb 18, 2016 at 11:11 AM, Emil Velikov > wrote: >> Hi Rob, >> >> On 2 February 2016 at 20:23, Rob Herring wrote: >>> This is used by Android to select an eglconfig compatible with HWComposer. >>> >>> Signed-off-by: Rob Herring >>> ---

Re: [Mesa-dev] [PATCH 0/8] Fixes for building AOSP master

On 18 March 2016 at 19:05, Rob Herring wrote: > On Tue, Mar 1, 2016 at 9:06 AM, Rob Herring wrote: >> On Mon, Feb 29, 2016 at 4:50 AM, Emil Velikov >> wrote: >>> On 25 February 2016 at 01:47, Emil Velikov wrote: On 24 February 2016 at 18:56, Rob Herring wrote: >>> > Rob Herring (8):

Re: [Mesa-dev] [PATCH 2/5] android: radeonsi: fix building error in si_shader.c

On 21 February 2016 at 19:57, Mauro Rossi wrote: > Hi Micheal, > > no problem, I'm learning so much and you and Emil have both shown amounts of > patience with me. > > I've tested the following patch and it works > Mauro, please send patches that can be applied without rewriting them. As the Gmail

Re: [Mesa-dev] [PATCH v2 01/13] nvc0: bind driver cb for compute on c7[] for Kepler

On 04/01/2016 07:21 AM, Ilia Mirkin wrote: As I recall, we already upload ms offsets for fs. Perhaps reuse the same spot for these CP ones? What are they used for, anyways? Can't think of anything offhand, but perhaps opencl needs something funky? Where do we upload ms offset for fs ? Because

Re: [Mesa-dev] [PATCH v2 04/13] nvc0: reserve an area for ubos info in the driver constbuf

On 04/01/2016 07:28 AM, Ilia Mirkin wrote: Please see if you can't rejigger some stuff to make it all fit into 1024... I know it will have to grow for images, but let's try to limit the damage... I already tried, but I just can't because offsets in the driver cb must be aligned to 0x40 and I

Re: [Mesa-dev] [PATCH v2 07/13] nvc0: add indirect compute support on Kepler

On 04/01/2016 07:34 AM, Ilia Mirkin wrote: On Mar 31, 2016 12:09 PM, "Samuel Pitoiset" mailto:samuel.pitoi...@gmail.com>> wrote: > > The grid size is stored as three 32-bits integers in the indirect > buffer but the launch descriptor uses a 32-bits integer for both > griddim_y and griddim_

Re: [Mesa-dev] [PATCH v2 08/13] nvc0/ir: add support for compute UBOs on Kepler

On 04/01/2016 07:40 AM, Ilia Mirkin wrote: On Mar 31, 2016 12:09 PM, "Samuel Pitoiset" mailto:samuel.pitoi...@gmail.com>> wrote: > > Make sure to avoid out of bounds access in presence of indirect > array indexing by loading the size from the driver constant buffer. > > Signed-off-by: Sam

Re: [Mesa-dev] [PATCH 27/29] nir/lower_to_source_mod: Skip unsafe operations

On Fri, Apr 1, 2016 at 4:56 AM, Samuel Iglesias Gonsálvez wrote: > On 31/03/16 17:16, Connor Abbott wrote: >> This seems a little ugly to me. Since these ops are just moving bits >> around, maybe we should just convert the float64 src/dest to uint64? >> We do this for other opcodes that just shuff

Re: [Mesa-dev] [PATCH v2 11/13] nvc0/ir: do not lower shared+atomics on GM107+

On 04/01/2016 07:44 AM, Ilia Mirkin wrote: On Mar 31, 2016 12:09 PM, "Samuel Pitoiset" mailto:samuel.pitoi...@gmail.com>> wrote: > > For Maxwell, the ATOMS instruction can be used to perform atomic > operations on shared memory instead of this load/store lowering pass. > > Signed-off-by:

Re: [Mesa-dev] [PATCH] gallium/radeon: allow multiple exports of the same texture with different usage

The updated patch is attached. Marek On Fri, Apr 1, 2016 at 9:59 AM, Michel Dänzer wrote: > On 01.04.2016 00:47, Marek Olšák wrote: >> From: Marek Olšák >> >> Instead of failing an assertion, disable DCC and CMASK on the first export >> that needs it, and merge the external usage flags. > > [..

[Mesa-dev] [Bug 94148] Framebuffer considered invalid when a draw call is done before glCheckFramebufferStatus

https://bugs.freedesktop.org/show_bug.cgi?id=94148 Jannik Vogel changed: What|Removed |Added QA Contact|mesa-dev@lists.freedesktop. |intel-3d-bugs@lists.freedes

Re: [Mesa-dev] [PATCH v2 01/13] nvc0: bind driver cb for compute on c7[] for Kepler

On Fri, Apr 1, 2016 at 10:20 AM, Samuel Pitoiset wrote: > > > On 04/01/2016 07:21 AM, Ilia Mirkin wrote: >> >> As I recall, we already upload ms offsets for fs. Perhaps reuse the same >> spot for these CP ones? What are they used for, anyways? Can't think of >> anything offhand, but perhaps opencl

Re: [Mesa-dev] [PATCH v2 01/13] nvc0: bind driver cb for compute on c7[] for Kepler

On Fri, Apr 1, 2016 at 11:16 AM, Ilia Mirkin wrote: > On Fri, Apr 1, 2016 at 10:20 AM, Samuel Pitoiset > wrote: >> >> >> On 04/01/2016 07:21 AM, Ilia Mirkin wrote: >>> >>> As I recall, we already upload ms offsets for fs. Perhaps reuse the same >>> spot for these CP ones? What are they used for,

Re: [Mesa-dev] [PATCH v2 07/13] nvc0: add indirect compute support on Kepler

On Fri, Apr 1, 2016 at 10:24 AM, Samuel Pitoiset wrote: > > > On 04/01/2016 07:34 AM, Ilia Mirkin wrote: >> >> >> On Mar 31, 2016 12:09 PM, "Samuel Pitoiset" > > wrote: >> > >> > The grid size is stored as three 32-bits integers in the indirect >> > buffer but

Re: [Mesa-dev] [PATCH 22/41] glapi: gl_XML.py: convert gl_api.functionIterateByOffset to a generator

On 03/31/2016 06:04 PM, Dylan Baker wrote: This implementation is somewhat more efficient than the previous, and is less code. It works by replacing one of the list building functions with a generator, so that the last list can be avoided. It also decreases the size of the list that remains by us

Re: [Mesa-dev] [PATCH 00/41] glapi python cleanups

On 03/31/2016 06:04 PM, Dylan Baker wrote: This is the first part of a much larger project I'm working on to overhaul the generators. The end goal is to use mako templates rather than a massive series of print statements, be python 2.7 (the current) and python 3.3+ (I might be talked into support

[Mesa-dev] [PATCH] docs: minor updates to license.html file

Mesa demos are no longer part of the main Mesa tree/tarball. Add Gallium and GLX code to list of major components. --- docs/license.html | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/docs/license.html b/docs/license.html index d56823f..2848832 100644 --- a/docs

Re: [Mesa-dev] [PATCH] docs: minor updates to license.html file

On 01/04/16 16:35, Brian Paul wrote: Mesa demos are no longer part of the main Mesa tree/tarball. Add Gallium and GLX code to list of major components. --- docs/license.html | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/docs/license.html b/docs/license.html

Re: [Mesa-dev] [PATCH 22/41] glapi: gl_XML.py: convert gl_api.functionIterateByOffset to a generator

On Thu, Mar 31, 2016 at 8:04 PM, Dylan Baker wrote: > This implementation is somewhat more efficient than the previous, and is > less code. It works by replacing one of the list building functions with > a generator, so that the last list can be avoided. It also decreases the > size of the list th

[Mesa-dev] [PATCH v3 00/12] nvc0: ARB_compute_shader for Kepler/Maxwell

Hi, This series adds support for ARB_compute_shader on GK104 and GM107+, except on GK110 where one test miserably fail (related to texelFetch) for really weird reasons. Anyway, this is not going to break anything because NVF0_COMPUTE is still required for using compute on GK110. I will have a deep

[Mesa-dev] [PATCH v3 05/12] nvc0: reduce likelihood of collision for real buffers on Kepler

Reduce likelihood of collision with real buffers by placing the hole at the top of the 4G area. This fixes some indirect draw+compute tests with large buffers. Suggested by Ilia Mirkin. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 4 ++-- 1 file changed,

[Mesa-dev] [PATCH v3 08/12] nvc0/ir: fix wrong pred emission for ld lock on GK104

This fixes 84b9b8f (nvc0/ir: add missing emission of locked load predicate). Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.

[Mesa-dev] [PATCH v3 02/12] nvc0: bind shader buffers for compute on Kepler

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 4 +-- src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 38 + 2 files changed, 39 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/galli

[Mesa-dev] [PATCH v3 09/12] nvc0/ir: add atomics support on shared memory for Kepler

Signed-off-by: Samuel Pitoiset --- .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 114 - .../nouveau/codegen/nv50_ir_lowering_nvc0.h| 1 + 2 files changed, 114 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.

[Mesa-dev] [PATCH v3 06/12] nvc0: add indirect compute support on Kepler

The grid size is stored as three 32-bits integers in the indirect buffer but the launch descriptor uses a 32-bits integer for both griddim_y and griddim_z like this (z << 16) | y. To make it work, the 16 high bits of griddim_y are overwritten by griddim_z. Changes from v3: - add missing nouveau_p

[Mesa-dev] [PATCH v3 03/12] nvc0: bind user uniforms for compute on Kepler

Uniform buffer objects will be sticked to the driver constant buffer like buffers because the launch descriptor only allows 8 CBs. Input kernel parameters for OpenCL are still uploaded to screen->parm which is bound on c0, but this will be changed later with a new series. Signed-off-by: Samuel Pi

[Mesa-dev] [PATCH v3 12/12] nvc0: enable compute shaders on GK104 and GM107+

Compute support on GK110 is still unstable for weird reasons, but this can be fixed later as the NVF0_COMPUTE envvar prevent using compute. Note that GL3.txt is not updated yet because GL_ARB_compute_shader is a bit useless without ARB_shader_image_load_store. Signed-off-by: Samuel Pitoiset ---

[Mesa-dev] [PATCH v3 07/12] nvc0/ir: add support for compute UBOs on Kepler

Make sure to avoid out of bounds access in presence of indirect array indexing by loading the size from the driver constant buffer. Changes from v2: - add a todo for clamping the offset to the max possible const buf - rework the lowering pass Signed-off-by: Samuel Pitoiset --- .../nouveau/cod

[Mesa-dev] [PATCH v3 04/12] nvc0: store ubo info to the driver constbuf on Kepler

Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/codegen/nv50_ir_driver.h | 1 + src/gallium/drivers/nouveau/nvc0/nvc0_context.h| 3 +++ src/gallium/drivers/nouveau/nvc0/nvc0_program.c| 1 + src/gallium/drivers/nouveau/nvc0/nve4_compute.c| 26 +- 4 f

[Mesa-dev] [PATCH v3 10/12] nvc0/ir: do not lower shared+atomics on GM107+

For Maxwell, the ATOMS instruction can be used to perform atomic operations on shared memory instead of this load/store lowering pass. Changes from v2: - remove one branch Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 17 ++--- 1 file

[Mesa-dev] [PATCH v3 11/12] nvc0: bump the maximum number of UBOs for compute on Kepler

The maximum number of uniform blocks (MAX_COMPUTE_UNIFORM_BLOCKS) per compute program must be at least 12. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 -- src/gallium/drivers/nouveau/nvc0/nvc0_screen.h | 1 - 2 files changed, 3 deletions(-) diff --git a

Re: [Mesa-dev] [PATCH v3 01/12] nvc0: bind driver cb for compute on c7[] for Kepler

On Fri, Apr 1, 2016 at 12:55 PM, Samuel Pitoiset wrote: > Instead of using the screen->parm buffer object which will be removed, > upload auxiliary constants to uniform_bo to be consistent regarding > what we already do for Fermi. > > This breaks surfaces support (for compute only) but this will b

Re: [Mesa-dev] [PATCH v3 02/12] nvc0: bind shader buffers for compute on Kepler

Reviewed-by: Ilia Mirkin On Fri, Apr 1, 2016 at 12:55 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 4 +-- > src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 38 > + > 2 files changed, 39 inserti

Re: [Mesa-dev] [PATCH v3 03/12] nvc0: bind user uniforms for compute on Kepler

On Fri, Apr 1, 2016 at 12:55 PM, Samuel Pitoiset wrote: > Uniform buffer objects will be sticked to the driver constant buffer > like buffers because the launch descriptor only allows 8 CBs. > > Input kernel parameters for OpenCL are still uploaded to screen->parm > which is bound on c0, but this

Re: [Mesa-dev] [PATCH v3 04/12] nvc0: store ubo info to the driver constbuf on Kepler

Reviewed-by: Ilia Mirkin On Fri, Apr 1, 2016 at 12:56 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > .../drivers/nouveau/codegen/nv50_ir_driver.h | 1 + > src/gallium/drivers/nouveau/nvc0/nvc0_context.h| 3 +++ > src/gallium/drivers/nouveau/nvc0/nvc0_program.c

Re: [Mesa-dev] [PATCH v3 05/12] nvc0: reduce likelihood of collision for real buffers on Kepler

Reviewed-by: Ilia Mirkin On Fri, Apr 1, 2016 at 12:56 PM, Samuel Pitoiset wrote: > Reduce likelihood of collision with real buffers by placing the > hole at the top of the 4G area. This fixes some indirect draw+compute > tests with large buffers. > > Suggested by Ilia Mirkin. > > Signed-off-by:

Re: [Mesa-dev] [PATCH v3 06/12] nvc0: add indirect compute support on Kepler

On Fri, Apr 1, 2016 at 12:56 PM, Samuel Pitoiset wrote: > The grid size is stored as three 32-bits integers in the indirect > buffer but the launch descriptor uses a 32-bits integer for both > griddim_y and griddim_z like this (z << 16) | y. To make it work, > the 16 high bits of griddim_y are ove

Re: [Mesa-dev] [PATCH v3 07/12] nvc0/ir: add support for compute UBOs on Kepler

On Fri, Apr 1, 2016 at 12:56 PM, Samuel Pitoiset wrote: > Make sure to avoid out of bounds access in presence of indirect > array indexing by loading the size from the driver constant buffer. > > Changes from v2: > - add a todo for clamping the offset to the max possible const buf > - rework the

Re: [Mesa-dev] [PATCH v3 08/12] nvc0/ir: fix wrong pred emission for ld lock on GK104

Reviewed-by: Ilia Mirkin On Fri, Apr 1, 2016 at 12:56 PM, Samuel Pitoiset wrote: > This fixes 84b9b8f (nvc0/ir: add missing emission of locked load > predicate). > > Signed-off-by: Samuel Pitoiset > --- > src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 5 - > 1 file changed, 4

Re: [Mesa-dev] [PATCH v3 09/12] nvc0/ir: add atomics support on shared memory for Kepler

On Fri, Apr 1, 2016 at 12:56 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 114 > - > .../nouveau/codegen/nv50_ir_lowering_nvc0.h| 1 + > 2 files changed, 114 insertions(+), 1 deletion(-) >

Re: [Mesa-dev] [PATCH v3 10/12] nvc0/ir: do not lower shared+atomics on GM107+

Reviewed-by: Ilia Mirkin On Fri, Apr 1, 2016 at 12:56 PM, Samuel Pitoiset wrote: > For Maxwell, the ATOMS instruction can be used to perform atomic > operations on shared memory instead of this load/store lowering pass. > > Changes from v2: > - remove one branch > > Signed-off-by: Samuel Pitois

[Mesa-dev] [PATCH v3 01/12] nvc0: bind driver cb for compute on c7[] for Kepler

Instead of using the screen->parm buffer object which will be removed, upload auxiliary constants to uniform_bo to be consistent regarding what we already do for Fermi. This breaks surfaces support (for compute only) but this will be properly re-introduced later for ARB_shader_image_load_store. C

Re: [Mesa-dev] [PATCH v3 11/12] nvc0: bump the maximum number of UBOs for compute on Kepler

Reviewed-by: Ilia Mirkin On Fri, Apr 1, 2016 at 12:56 PM, Samuel Pitoiset wrote: > The maximum number of uniform blocks (MAX_COMPUTE_UNIFORM_BLOCKS) > per compute program must be at least 12. > > Signed-off-by: Samuel Pitoiset > --- > src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 -- > sr

Re: [Mesa-dev] [PATCH v3 12/12] nvc0: enable compute shaders on GK104 and GM107+

On 01/04/16 19:56, Samuel Pitoiset wrote: Compute support on GK110 is still unstable for weird reasons, but this can be fixed later as the NVF0_COMPUTE envvar prevent using compute. Note that GL3.txt is not updated yet because GL_ARB_compute_shader is a bit useless without ARB_shader_image_load_

Re: [Mesa-dev] [PATCH v3 12/12] nvc0: enable compute shaders on GK104 and GM107+

On Fri, Apr 1, 2016 at 1:26 PM, Martin Peres wrote: > On 01/04/16 19:56, Samuel Pitoiset wrote: >> >> Compute support on GK110 is still unstable for weird reasons, but >> this can be fixed later as the NVF0_COMPUTE envvar prevent using >> compute. >> >> Note that GL3.txt is not updated yet because

Re: [Mesa-dev] [PATCH v3 12/12] nvc0: enable compute shaders on GK104 and GM107+

On Fri, Apr 1, 2016 at 12:56 PM, Samuel Pitoiset wrote: > Compute support on GK110 is still unstable for weird reasons, but > this can be fixed later as the NVF0_COMPUTE envvar prevent using > compute. > > Note that GL3.txt is not updated yet because GL_ARB_compute_shader is > a bit useless withou

Re: [Mesa-dev] [PATCH v3 12/12] nvc0: enable compute shaders on GK104 and GM107+

On 01/04/16 20:28, Ilia Mirkin wrote: On Fri, Apr 1, 2016 at 1:26 PM, Martin Peres wrote: On 01/04/16 19:56, Samuel Pitoiset wrote: Compute support on GK110 is still unstable for weird reasons, but this can be fixed later as the NVF0_COMPUTE envvar prevent using compute. Note that GL3.txt is

Re: [Mesa-dev] [PATCH 08/16] nir: lower-io-types pass

On Sat, Mar 26, 2016 at 2:02 PM, Rob Clark wrote: > From: Rob Clark > > A pass to lower complex (struct/array/mat) inputs/outputs to primitive > types. This allows, for example, linking that removes unused components > of a larger type which is not indirectly accessed. > > In the near term, it

Re: [Mesa-dev] [PATCH 09/16] nir: move callsite of lower_outputs_to_temporaries

Reviewed-by: Jason Ekstrand On Sat, Mar 26, 2016 at 2:02 PM, Rob Clark wrote: > From: Rob Clark > > Going to convert this pass to parameterized lower_io_to_temporaries, and > we want the user to be able to specify whether to lower outputs or > inputs or both. The restriction of running this p

Re: [Mesa-dev] [PATCH 10/16] nir: rename lower_outputs_to_temporaries -> lower_io_to_temporaries

On Sat, Mar 26, 2016 at 2:02 PM, Rob Clark wrote: > From: Rob Clark > > Since it will gain support to lower inputs, give it a more generic name. > > Signed-off-by: Rob Clark > --- > src/compiler/Makefile.sources | 2 +- > src/compiler/nir/nir.h

Re: [Mesa-dev] [PATCH 11/16] nir/lower-io: split out some helper fxns

I don't know that I like the lower-io prefix. Maybe nir/io-to-temp? Doesn't really matter On Sat, Mar 26, 2016 at 2:02 PM, Rob Clark wrote: > From: Rob Clark > > Prep work to reduce the noise in the next patch. > > Signed-off-by: Rob Clark > --- > src/compiler/nir/nir_lower_io_to_temporaries

Re: [Mesa-dev] [PATCH 01/41] glapi: clean imports in python files

Quoting Michael Schellenberger Costa (2016-04-01 01:30:53) > Hi, > > minor nitpicks wrt ordering below > > Am 01.04.2016 um 02:04 schrieb Dylan Baker: > > Completely clean the imports: > > - Split so that one module is imported per line > > - Remove unused imports > > - Group stdlib imports, then

Re: [Mesa-dev] [PATCH 12/16] nir/lower-io: add support for lowering inputs

Assuming we get the previous patch sorted out, Reviewed-by: Jason Ekstrand On Sat, Mar 26, 2016 at 2:02 PM, Rob Clark wrote: > From: Rob Clark > > Signed-off-by: Rob Clark > --- > src/compiler/nir/nir.h | 2 +- > src/compiler/nir/nir_lower_io_to_temporaries.c | 55 >

[Mesa-dev] [PATCH 3/3] svga: remove unused svga_compile_key::texture_msaa field

--- src/gallium/drivers/svga/svga_shader.c | 1 - src/gallium/drivers/svga/svga_shader.h | 1 - 2 files changed, 2 deletions(-) diff --git a/src/gallium/drivers/svga/svga_shader.c b/src/gallium/drivers/svga/svga_shader.c index 78eb3f6..d56cce4 100644 --- a/src/gallium/drivers/svga/svga_shader.c

[Mesa-dev] [PATCH 1/3] tgsi: add simple tgsi_is_msaa_target() helper

--- src/gallium/auxiliary/tgsi/tgsi_util.h | 8 1 file changed, 8 insertions(+) diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.h b/src/gallium/auxiliary/tgsi/tgsi_util.h index 3a049ee..ca07bfd 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_util.h +++ b/src/gallium/auxiliary/tgsi/tgsi_u

[Mesa-dev] [PATCH 2/3] svga: check TXF instruction's target to determine MSAA

Rather than the currently bound texture. This goes along with the earlier patch to get away from examining bound textures and sampler views during shader translation. Fixes VMware bug 1632739. --- src/gallium/drivers/svga/svga_tgsi_vgpu10.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [Mesa-dev] [PATCH 13/16] glsl: export accessor for builtin-uniform descriptors

On Sat, Mar 26, 2016 at 2:02 PM, Rob Clark wrote: > From: Rob Clark > > We'll need this for a nir pass to lower builtin-uniform access. > > Signed-off-by: Rob Clark > --- > src/compiler/glsl/builtin_variables.cpp | 24 +++- > src/compiler/glsl/ir.h | 3 +++

Re: [Mesa-dev] [PATCH 15/16] mesa/st: add nir pass for lowering builtin uniforms

On Sat, Mar 26, 2016 at 2:02 PM, Rob Clark wrote: > From: Rob Clark > > Signed-off-by: Rob Clark > --- > src/mesa/Makefile.sources | 2 + > src/mesa/state_tracker/st_nir.h | 28 +++ > src/mesa/state_tracker/st_nir_lower_builtin.c | 242 > +++

Re: [Mesa-dev] [PATCH 13/16] glsl: export accessor for builtin-uniform descriptors

On Fri, Apr 1, 2016 at 11:24 AM, Rob Clark wrote: > On Fri, Apr 1, 2016 at 2:04 PM, Jason Ekstrand > wrote: > > > > > > On Sat, Mar 26, 2016 at 2:02 PM, Rob Clark wrote: > >> > >> From: Rob Clark > >> > >> We'll need this for a nir pass to lower builtin-uniform access. > >> > >> Signed-off-by:

Re: [Mesa-dev] [PATCH 22/41] glapi: gl_XML.py: convert gl_api.functionIterateByOffset to a generator

Quoting Ilia Mirkin (2016-04-01 08:46:19) > IMHO this is still quite fancy and unnecessarily complicated. > > How about > > temp = dict((f.offset, f) for f in self.functions_by_name.itervalues()) > return (temp[offset] for offset in sorted(temp)) > > That's all that's happening there, right?

Re: [Mesa-dev] [PATCH 22/41] glapi: gl_XML.py: convert gl_api.functionIterateByOffset to a generator

On Fri, Apr 1, 2016 at 2:41 PM, Dylan Baker wrote: > Quoting Ilia Mirkin (2016-04-01 08:46:19) >> IMHO this is still quite fancy and unnecessarily complicated. >> >> How about >> >> temp = dict((f.offset, f) for f in self.functions_by_name.itervalues()) >> return (temp[offset] for offset in so

Re: [Mesa-dev] [PATCH 22/41] glapi: gl_XML.py: convert gl_api.functionIterateByOffset to a generator

Quoting Ilia Mirkin (2016-04-01 11:47:49) > On Fri, Apr 1, 2016 at 2:41 PM, Dylan Baker wrote: > > Quoting Ilia Mirkin (2016-04-01 08:46:19) > > > > Something like this(?): > > > > temp = [(f.offset, f) for f in self.functions_by_name.itervalues() > > if f.offset != -1] > > return (func fo

Re: [Mesa-dev] [PATCH v2 03/23] nir: add bit_size info to nir_ssa_undef_instr_create()

On Thu, Mar 31, 2016 at 2:59 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > Signed-off-by: Samuel Iglesias Gonsálvez > --- > src/compiler/nir/glsl_to_nir.cpp | 2 +- > src/compiler/nir/nir.c | 6 -- > src/compiler/nir/nir.h | 3 ++-

Re: [Mesa-dev] [PATCH v2 07/23] nir/lower_load_const_to_scalar: suppport doubles and multiple bit sizes

On Thu, Mar 31, 2016 at 2:59 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > From: Iago Toral Quiroga > > --- > src/compiler/nir/nir_lower_load_const_to_scalar.c | 7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/src/compiler/nir/nir_lower_load_const_t

Re: [Mesa-dev] [PATCH v2 09/23] nir/print: add support for printing doubles and bitsize

On Thu, Mar 31, 2016 at 2:59 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > From: Connor Abbott > > v2: > - Squash the printing doubles related patches into one patch (Sam). > --- > src/compiler/nir/nir_print.c | 17 ++--- > 1 file changed, 14 insertions(+), 3 deletio

Re: [Mesa-dev] [PATCH v2 10/23] nir: handle doubles in nir_deref_get_const_initializer_load()

On Thu, Mar 31, 2016 at 2:59 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > From: Connor Abbott > > --- > src/compiler/nir/nir.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c > index 56a5009..35ad2b3 100644 > --- a/s

Re: [Mesa-dev] [PATCH v2 22/23] nir: add a pass for lowering (un)pack_double_2x32

On Thu, Mar 31, 2016 at 3:00 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > From: Connor Abbott > > v2: Undo unintended change to the signature of > nir_normalize_cubemap_coords (Iago). > > v3: Move to compiler/nir (Iago) > > v4: Remove Authors from copyright header (Michael S

Re: [Mesa-dev] [PATCH v2 23/23] nir: verify destination bit size when checking algebraic optimizations

Unless I'm missing something, this series doesn't contain anything that uses this patch. Let's drop it for now and put it in with whatever adds the actual nir_opt_algebraic changes. Another option would be to silently bail if nir_search tries to create an expression where the opcode has an explic

Re: [Mesa-dev] [PATCH 3/3] svga: remove unused svga_compile_key::texture_msaa field

On 01/04/16 19:01, Brian Paul wrote: --- src/gallium/drivers/svga/svga_shader.c | 1 - src/gallium/drivers/svga/svga_shader.h | 1 - 2 files changed, 2 deletions(-) diff --git a/src/gallium/drivers/svga/svga_shader.c b/src/gallium/drivers/svga/svga_shader.c index 78eb3f6..d56cce4 100644 ---

[Mesa-dev] [PATCH v4 06/12] nvc0: add indirect compute support on Kepler

The grid size is stored as three 32-bits integers in the indirect buffer but the launch descriptor uses a 32-bits integer for both griddim_y and griddim_z like this (z << 16) | y. To make it work, the 16 high bits of griddim_y are overwritten by griddim_z. Changes from v4: - move nouveau_pushbuf_

Re: [Mesa-dev] [PATCH v4 06/12] nvc0: add indirect compute support on Kepler

Reviewed-by: Ilia Mirkin On Fri, Apr 1, 2016 at 4:16 PM, Samuel Pitoiset wrote: > The grid size is stored as three 32-bits integers in the indirect > buffer but the launch descriptor uses a 32-bits integer for both > griddim_y and griddim_z like this (z << 16) | y. To make it work, > the 16 high

[Mesa-dev] [PATCH 0/6] mesa: support for EGL_ANDROID_native_fence_sync

From: Rob Clark This patchset implements support for EGL_ANDROID_native_fence_sync[1] for egl and gallium. This extension provides support for native fence fd's (file descriptors) for the GPU. In a similar way to dma-buf fd's, which provide a reference-counted userspace handle to buffers which

[Mesa-dev] [PATCH 1/6] egl: initialize SyncCondition after attr parsing

From: Rob Clark Reduce the noise in the next patch. For EGL_SYNC_NATIVE_FENCE_ANDROID the sync condition is conditional on EGL_SYNC_NATIVE_FENCE_FD_ANDROID attribute. Signed-off-by: Rob Clark --- src/egl/main/eglsync.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --g

[Mesa-dev] [PATCH 2/6] dri: extend fence extension to support native fd fences

From: Rob Clark Required to implement EGL_ANDROID_native_fence_sync. Signed-off-by: Rob Clark --- include/GL/internal/dri_interface.h | 44 - 1 file changed, 43 insertions(+), 1 deletion(-) diff --git a/include/GL/internal/dri_interface.h b/include/GL/inte

[Mesa-dev] [PATCH 3/6] egl: add EGL_ANDROID_native_fence_sync

From: Rob Clark Signed-off-by: Rob Clark --- src/egl/drivers/dri2/egl_dri2.c | 48 + src/egl/main/eglapi.c | 36 --- src/egl/main/eglapi.h | 2 ++ src/egl/main/egldisplay.h | 1 + src/egl/main/eglfal

[Mesa-dev] [PATCH 4/6] gallium: add way for drivers to create fences without flushing

From: Rob Clark Since current thing is kinda horrible for tilers. And that issue will be even worse with EGL_ANDROID_native_fence_sync. Not wired up yet for gl syncobj, which can come later. For now we just need this with EGL. Signed-off-by: Rob Clark --- src/gallium/include/pipe/p_context.

Re: [Mesa-dev] [android-x86-devel] Re: gralloc_drm_pipe

On Fri, Mar 25, 2016 at 8:38 PM, Stéphane Marchesin wrote: > On Wed, Mar 23, 2016 at 5:22 PM, Rob Herring wrote: >> On Fri, Mar 4, 2016 at 12:07 PM, Rob Clark wrote: >>> On Fri, Mar 4, 2016 at 12:59 PM, Rob Clark wrote: So, I've been advocating that for android, gallium drivers use gr

[Mesa-dev] [PATCH 5/6] gallium: wire up server_wait_sync

From: Rob Clark This will be needed for explicit synchronization with devices outside the gpu, ie. EGL_ANDROID_native_fence_sync. Signed-off-by: Rob Clark --- src/gallium/include/pipe/p_context.h | 6 ++ src/gallium/state_trackers/dri/dri2.c | 6 +- 2 files changed, 11 insertions(+),

[Mesa-dev] [PATCH 6/6] gallium: support for native fence fd's

From: Rob Clark This enables gallium support for EGL_ANDROID_native_fence_sync, for drivers which support PIPE_CAP_NATIVE_FENCE_FD. TODO: add PIPE_CAP_NATIVE_FENCE_FD to every's switch statement returning false.. but I'll leave that until this patchset is ready to push since that sort of thing m

Re: [Mesa-dev] [PATCH v2 13/23] nir/glsl_to_nir: set the bit-size in the result of evaluate_rvalue

On Thu, Mar 31, 2016 at 3:00 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > From: Iago Toral Quiroga > > Found while testing UBO loads in scenarios like this: > > (assign (x) (var_ref vec_ctor) > (expression float d2f > (expression double ubo_load (constant uint (0)) (cons

Re: [Mesa-dev] [PATCH v2 00/23] NIR: more bit-size related patches

On Thu, Mar 31, 2016 at 2:59 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > Hello, > > This is the second version of this patch series [0]. > > In case you prefer a repository, it is available here [1]: > > $ git clone -b nir-bit-size-fixes-2.0 https://github.com/Igalia/mesa.git >

Re: [Mesa-dev] [PATCH 01/41] glapi: clean imports in python files

Hi, minor nitpicks wrt ordering below Am 01.04.2016 um 02:04 schrieb Dylan Baker: > Completely clean the imports: > - Split so that one module is imported per line > - Remove unused imports > - Group stdlib imports, then 3rd party modules, and finally local > modules > - sort alphabetically wit

[Mesa-dev] [PATCH] xlib: fix memory leak on Display close

The XMesaVisual instances freed in the visuals table on display close are being freed with a free() call, instead of XMesaDestroyVisual(), causing a memory leak. --- src/mesa/drivers/x11/fakeglx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/x11/fakeglx.c b/

[Mesa-dev] [PATCH 3/4] gallium: add global buffer memory barrier bit

Currently radeonsi synchronizes after every dispatch and Clover does nothing to synchronize. This is overzealous, especially with GL compute, so add a barrier for global buffers. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/include/pipe/p_defines.h | 1 + src/gallium/state_track

[Mesa-dev] [PATCH 2/4] gallium: add threads per block TGSI property

The value 0 for unknown has been chosen to so that drivers using tgsi_scan_shader do not need to detect missing properties if they zero-initialize the struct. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/auxiliary/tgsi/tgsi_strings.c | 3 +++ src/gallium/docs/source/tgsi.rst | 6

[Mesa-dev] [PATCH 1/4] gallium: add compute shader IR type

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/trace/tr_dump_state.c | 4 +++- src/gallium/include/pipe/p_state.h| 1 + src/gallium/state_trackers/clover/core/kernel.cpp | 1 + src/gallium/tests/trivial/compute.c | 1 + src/mesa/state_tracker/st_pro

[Mesa-dev] [PATCH 4/4] gallium: distinguish between shader IR in get_compute_param

For radeonsi, native and TGSI use different compilers and this results in different limits for different IR's. The set we strictly need for radeonsi is only the MAX_BLOCK_SIZE and MAX_THREADS_PER_BLOCK params, but I added a few others as shader related that seemed like they would also typically de

Re: [Mesa-dev] [PATCH 2/4] gallium: add threads per block TGSI property

On Fri, Apr 1, 2016 at 6:32 PM, Bas Nieuwenhuizen wrote: > The value 0 for unknown has been chosen to so that > drivers using tgsi_scan_shader do not need to detect > missing properties if they zero-initialize the struct. > > Signed-off-by: Bas Nieuwenhuizen > --- > src/gallium/auxiliary/tgsi/tg

Re: [Mesa-dev] [PATCH 4/4] gallium: distinguish between shader IR in get_compute_param

On Fri, Apr 1, 2016 at 6:32 PM, Bas Nieuwenhuizen wrote: > For radeonsi, native and TGSI use different compilers and this results > in different limits for different IR's. > > The set we strictly need for radeonsi is only the MAX_BLOCK_SIZE > and MAX_THREADS_PER_BLOCK params, but I added a few oth

Re: [Mesa-dev] [PATCH 2/4] gallium: add threads per block TGSI property

On Fri, Apr 1, 2016 at 6:37 PM, Ilia Mirkin wrote: > On Fri, Apr 1, 2016 at 6:32 PM, Bas Nieuwenhuizen > wrote: >> The value 0 for unknown has been chosen to so that >> drivers using tgsi_scan_shader do not need to detect >> missing properties if they zero-initialize the struct. >> >> Signed-off-

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