Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
On Fri, Apr 1, 2016 at 12:56 PM, Samuel Pitoiset
<samuel.pitoi...@gmail.com> wrote:
> For Maxwell, the ATOMS instruction can be used to perform atomic
> operations on shared memory instead of this load/store lowering pass.
>
> Changes from v2:
> - remove one branch
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
> ---
> .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 17
> ++++++++++-------
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> index 26fc27f..1a542d3 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> @@ -1294,11 +1294,12 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
> sv = SV_LBASE;
> break;
> case FILE_MEMORY_SHARED:
> - if (targ->getChipset() >= NVISA_GK104_CHIPSET) {
> - handleSharedATOMNVE4(atom);
> - } else {
> + // For Fermi/Kepler, we have to use ld lock/st unlock to perform atomic
> + // operations on shared memory. For Maxwell, ATOMS is enough.
> + if (targ->getChipset() < NVISA_GK104_CHIPSET)
> handleSharedATOM(atom);
> - }
> + else if (targ->getChipset() < NVISA_GM107_CHIPSET)
> + handleSharedATOMNVE4(atom);
> return true;
> default:
> assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
> @@ -1326,9 +1327,11 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
> bool
> NVC0LoweringPass::handleCasExch(Instruction *cas, bool needCctl)
> {
> - if (cas->src(0).getFile() == FILE_MEMORY_SHARED) {
> - // ATOM_CAS and ATOM_EXCH are handled in handleSharedATOM().
> - return false;
> + if (targ->getChipset() < NVISA_GM107_CHIPSET) {
> + if (cas->src(0).getFile() == FILE_MEMORY_SHARED) {
> + // ATOM_CAS and ATOM_EXCH are handled in handleSharedATOM().
> + return false;
> + }
> }
>
> if (cas->subOp != NV50_IR_SUBOP_ATOM_CAS &&
> --
> 2.7.4
>
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