Re: [Mesa-dev] [PATCH] radv: using tls to store llvm related info and speed up compiles (v8)

Tested-by: Dieter Nützel on RX580 with F1 2017 and 'smoketest': cpupower frequency-set -g ondemand /home/dieter> smoketest 5172 presents in 5.00043 seconds (FPS: 1034.31) 5426 presents in 5.00098 seconds (FPS: 1084.99) 5304 presents in 5.2 seconds (FPS: 1060.8) 5338 presents in 5.00085 se

Re: [Mesa-dev] [PATCH 6/6] radv/winsys: remove the max IBs per submit limit for the sysmem path

For the series: Tested-by: Dieter Nützel on RX580 with F1 2017 Dieter Am 04.07.2018 15:06, schrieb Samuel Pitoiset: This path will be eventually improved later but as it's only used on SI (or with RADV_DEBUG=noibs), I'm not sure if that matters much. Signed-off-by: Samuel Pitoiset --- src

Re: [Mesa-dev] [PATCH] mesa: enable ARB_direct_state_access in OpenGL 4.5 compat profile

Reviewed-by: Marek Olšák Marek On Tue, Jul 3, 2018 at 9:09 PM, Timothy Arceri wrote: > Its unlikely anyone will add proper ARB_direct_state_access compat > support before we branch 18.2. Enabling the extension in 4.5 at > least allows users to make use of MESA_GL_VERSION_OVERRIDE=4.5COMPAT > fo

Re: [Mesa-dev] [PATCH] util/drirc: turn on force_glsl_extensions_warn for No Mans Sky

Reviewed-by: Marek Olšák Marek On Tue, Jul 3, 2018 at 8:41 PM, Timothy Arceri wrote: > The game forgets to enable multiple extensions in its shaders, one > of those extesions is EXT_texture_array. But enabling this config > entry fixes at least one other rendering issue that enabling > EXT_text

[Mesa-dev] [PATCH rfc 2/3] gallium: add PIPE_CAP_BUFFER_AGE

For gallium drivers to expose EGL/GLX_EXT_buffer_age. Signed-off-by: Qiang Yu --- src/gallium/docs/source/screen.rst | 1 + src/gallium/drivers/etnaviv/etnaviv_screen.c| 1 + src/gallium/drivers/freedreno/freedreno_screen.c| 1 + src/gallium/drivers/i915/i915_screen.

[Mesa-dev] [PATCH rfc 0/3] Be able to disable EGL/GLX_EXT_buffer_age

For GPU like ARM mali Utgard EGL/GLX_EXT_buffer_age will make performace worse. But mesa has no way to disable it. This patch series make driver be able to disable it and add a gallium pipe cap for gallium driver usage. Due to currently only out of tree lima driver need it, and not sure if this is

[Mesa-dev] [PATCH rfc 3/3] egl: fix query buffer age fail when EGL_KHR_partial_update

When no EGL_EXT_buffer_age but has EGL_KHR_partial_update, query buffer age should not fail. Signed-off-by: Qiang Yu --- src/egl/main/eglsurface.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/egl/main/eglsurface.c b/src/egl/main/eglsurface.c index 3bd14a8cd0..222

[Mesa-dev] [PATCH rfc 1/3] egl, glx: query dri integer to expose EGL/GLX_EXT_buffer_age

Add __DRI2_RENDERER_EXPOSE_BUFFER_AGE dri integer query for driver to determine if want to expose EGL/GLX_EXT_buffer_age. Without knowing damage region first, some tile buffer based GPU like ARM Mali Utgard has to load whole render target to tile buffer before partitial update, then write them bac

Re: [Mesa-dev] [PATCH 2/2] radv: add the trace BO to the list when starting a new cmdbuf

This series bring the anomaly back, that 'ondemand' is _faster_ than 'performance': cpupower frequency-set -g ondemand /home/dieter> smoketest 5905 presents in 5.00014 seconds (FPS: 1180.97) 6101 presents in 5.00115 seconds (FPS: 1219.92) 6020 presents in 5.00038 seconds (FPS: 1203.91) 6021 pre

[Mesa-dev] [PATCH] radv: using tls to store llvm related info and speed up compiles (v8)

From: Dave Airlie This uses the common compiler passes abstraction to help radv avoid fixed cost compiler overheads. This uses a linked list per thread stored in thread local storage, with an entry in the list for each target machine. This should remove all the fixed overheads setup costs of cre

[Mesa-dev] [Bug 107116] [OpenCL] [llvm-svn] [meson] build failure C++ library 'clangCodeGen' not found

https://bugs.freedesktop.org/show_bug.cgi?id=107116 Bug ID: 107116 Summary: [OpenCL] [llvm-svn] [meson] build failure C++ library 'clangCodeGen' not found Product: Mesa Version: git Hardware: x86-64 (AMD64)

Re: [Mesa-dev] [PATCH v2 2/3] nir: Add a discard optimization pass

On July 4, 2018 15:35:15 Bas Nieuwenhuizen wrote: On Wed, Jul 4, 2018 at 11:00 PM, Jason Ekstrand wrote: On Wed, Jul 4, 2018 at 1:20 PM, Francisco Jerez wrote: Jason Ekstrand writes: Many fragment shaders do a discard using relatively little information but still put the discard fairly

Re: [Mesa-dev] [PATCH v2 2/3] nir: Add a discard optimization pass

On Wed, Jul 4, 2018 at 11:00 PM, Jason Ekstrand wrote: > On Wed, Jul 4, 2018 at 1:20 PM, Francisco Jerez > wrote: >> >> Jason Ekstrand writes: >> >> > Many fragment shaders do a discard using relatively little information >> > but still put the discard fairly far down in the shader for no good >

Re: [Mesa-dev] [PATCH v2 2/3] nir: Add a discard optimization pass

On Wed, Jul 4, 2018 at 1:20 PM, Francisco Jerez wrote: > Jason Ekstrand writes: > > > Many fragment shaders do a discard using relatively little information > > but still put the discard fairly far down in the shader for no good > > reason. If the discard is moved higher up, we can possibly avo

Re: [Mesa-dev] [PATCH v2 2/3] nir: Add a discard optimization pass

Jason Ekstrand writes: > Many fragment shaders do a discard using relatively little information > but still put the discard fairly far down in the shader for no good > reason. If the discard is moved higher up, we can possibly avoid doing > some or almost all of the work in the shader. When thi

[Mesa-dev] [Bug 105255] Waiting for fences without waitAll is not implemented

https://bugs.freedesktop.org/show_bug.cgi?id=105255 thsniel...@gmail.com changed: What|Removed |Added CC||thsniel...@gmail.com -- You are

[Mesa-dev] New EGL extension in mesa and 'adriconf' packaging - EVoC'18

Dear developers, I'm an undergraduate student in India. I've great enthusiasm to contribute to mesa and I've already done a few contributions to adriconf . Currently, adriconf isn't able to c

Re: [Mesa-dev] [PATCH 1/6] configure: bump libdrm for AMDGPU to 2.4.92

Hi Samuel, On 4 July 2018 at 14:06, Samuel Pitoiset wrote: > This will allow us to submit more IBs at once because the limit > has been removed in libdrm 2.4.92. > > Signed-off-by: Samuel Pitoiset > --- > configure.ac | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/conf

Re: [Mesa-dev] [PATCH v2 2/3] nir: Add a discard optimization pass

On Wed, Jul 4, 2018 at 10:00 AM, Matt Turner wrote: > On Wed, Jul 4, 2018 at 9:59 AM Jason Ekstrand > wrote: > > > > Many fragment shaders do a discard using relatively little information > > but still put the discard fairly far down in the shader for no good > > reason. If the discard is moved

Re: [Mesa-dev] [PATCH v2 2/3] nir: Add a discard optimization pass

On Wed, Jul 4, 2018 at 9:59 AM Jason Ekstrand wrote: > > Many fragment shaders do a discard using relatively little information > but still put the discard fairly far down in the shader for no good > reason. If the discard is moved higher up, we can possibly avoid doing > some or almost all of th

[Mesa-dev] [PATCH v2 2/3] nir: Add a discard optimization pass

Many fragment shaders do a discard using relatively little information but still put the discard fairly far down in the shader for no good reason. If the discard is moved higher up, we can possibly avoid doing some or almost all of the work in the shader. When this lets us skip texturing operatio

[Mesa-dev] [PATCH 1.5/3] nir: Add a nir_instr_move helper

Removes an instruction from one place and inserts it at another while working around a weird cursor corner-case. --- src/compiler/nir/nir.c | 15 +++ src/compiler/nir/nir.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c index c5

Re: [Mesa-dev] [PATCH 2/3] nir: Add a discard optimization pass

On Wed, Jul 4, 2018 at 2:22 AM, Grazvydas Ignotas wrote: > On Wed, Jul 4, 2018 at 9:13 AM, Jason Ekstrand > wrote: > > Many fragment shaders do a discard using relatively little information > > but still put the discard fairly far down in the shader for no good > > reason. If the discard is mov

Re: [Mesa-dev] [PATCH v2] nvc0: implement multisampled images on Maxwell+

it passes all the CTS tests, which is good :) Thanks! Reviewed-by: Karol Herbst On Wed, Jul 4, 2018 at 11:21 AM, Rhys Perry wrote: > Changes in v2: > - make loadSuInfo32() protected without making the rest protected > - move NVC0_SU_INFO_* into nv50_ir_lowering_nvc0.h instead of duplicating >

[Mesa-dev] [PATCH 6/6] radv/winsys: remove the max IBs per submit limit for the sysmem path

This path will be eventually improved later but as it's only used on SI (or with RADV_DEBUG=noibs), I'm not sure if that matters much. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 46 --- 1 file changed, 29 insertions(+), 17 deletions(-) dif

[Mesa-dev] [PATCH 5/6] radv/winsys: fix buffer deletion in the sysmem path

In case we failed to submit the CS correctly. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c i

[Mesa-dev] [PATCH 2/6] radv/winsys: remove the max IBs per submit limit for the fallback path

The chained submission is the fastest path and it should now be used more often than before. This breaks some CTS when HiZ is enabled, flushing DB_META at the end of cmdbufs fixes the regressions. I guess there is a missing flush somewhere. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/wins

[Mesa-dev] [PATCH 4/6] radv/winsys: do not assign last submission when chained path failed

I don't think we want to wait for something that hasn't been correctly submitted. This is similar to the fallback path. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/winsys/a

[Mesa-dev] [PATCH 3/6] radv/winsys: cleanup the chained submission path

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 28 +++ 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c index d99fffd431..7112819e56 10

[Mesa-dev] [PATCH 1/6] configure: bump libdrm for AMDGPU to 2.4.92

This will allow us to submit more IBs at once because the limit has been removed in libdrm 2.4.92. Signed-off-by: Samuel Pitoiset --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index f135d05736..7c58a5a8f1 100644 --- a/configure.a

[Mesa-dev] [PATCH 3/3] egl/dri: Use __DRI2_DAMAGE extension for KHR_partial_update

Use the DRI2 interface callback to pass the damage rects to the driver. Signed-off-by: Harish Krupo --- src/egl/drivers/dri2/egl_dri2.c | 46 ++--- src/egl/drivers/dri2/egl_dri2.h | 1 + 2 files changed, 43 insertions(+), 4 deletions(-) diff --git a/src/egl/drivers/

[Mesa-dev] [PATCH 1/3] egl/android: Delete set_damage_region from egl dri vtbl

The intension of the KHR_partial_update was not to send the damage back to the platform but to send the damage to the driver to ensure that the following rendering could be restricted to those regions. This patch removes the set_damage_region from the egl_dri vtbl and all the platfrom_*.c files. Th

[Mesa-dev] [PATCH 2/3] dri_interface: add an interface for setting damage region

Implementors of this interface provide ability to render only to damaged regions on the framebuffer. Signed-off-by: Harish Krupo --- include/GL/internal/dri_interface.h | 25 + 1 file changed, 25 insertions(+) diff --git a/include/GL/internal/dri_interface.h b/include/G

[Mesa-dev] [PATCH 0/3] Rectify KHR_partial_update extension implementation

Based on the discussion in the thread starting at: https://lists.freedesktop.org/archives/mesa-dev/2018-June/198846.html it was identified that the implementation of the KHR_partial_update was incorrect and in that the damages were sent to the egl backends instead of the driver. This patch series

[Mesa-dev] [Bug 106151] [amdgpu][vulkan] GPU hang (Vega 56) while running game (Rise of the Tomb Raider)

https://bugs.freedesktop.org/show_bug.cgi?id=106151 --- Comment #23 from Samuel Pitoiset --- Can you also try with RADV_PERFTEST=nobatchchain please? -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug.

Re: [Mesa-dev] [PATCH 3/4] util/queue: add a process name into a thread name

On Tuesday, 2018-07-03 19:16:11 -0400, Marek Olšák wrote: > From: Marek Olšák > > --- > src/util/u_queue.c | 35 +-- > src/util/u_queue.h | 2 +- > 2 files changed, 34 insertions(+), 3 deletions(-) > > diff --git a/src/util/u_queue.c b/src/util/u_queue.c > index

Re: [Mesa-dev] [PATCH 2/4] gallium/os: use util_get_process_name when possible

On Tuesday, 2018-07-03 19:16:10 -0400, Marek Olšák wrote: > From: Marek Olšák > Reviewed-by: Eric Engestrom > --- > src/gallium/auxiliary/os/os_process.c | 16 ++-- > src/util/process.c| 2 ++ > 2 files changed, 4 insertions(+), 14 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH 1/4] util: extract get_process_name from xmlconfig.c

On Tuesday, 2018-07-03 19:16:09 -0400, Marek Olšák wrote: > From: Marek Olšák > > --- > src/util/Makefile.sources | 2 + > src/util/process.c| 116 ++ > src/util/process.h| 34 +++ > src/util/xmlconfig.c | 86 +-

Re: [Mesa-dev] [PATCH 2/3] nir: Add a discard optimization pass

On Wed, Jul 4, 2018 at 9:13 AM, Jason Ekstrand wrote: > Many fragment shaders do a discard using relatively little information > but still put the discard fairly far down in the shader for no good > reason. If the discard is moved higher up, we can possibly avoid doing > some or almost all of the

[Mesa-dev] [PATCH v2] nvc0: implement multisampled images on Maxwell+

Changes in v2: - make loadSuInfo32() protected without making the rest protected - move NVC0_SU_INFO_* into nv50_ir_lowering_nvc0.h instead of duplicating NVC0_SU_INFO_MS Signed-off-by: Rhys Perry --- .../nouveau/codegen/nv50_ir_lowering_gm107.cpp | 13 + .../nouveau/codegen/nv50_i

[Mesa-dev] [Bug 105139] Assertion in Dying Light

https://bugs.freedesktop.org/show_bug.cgi?id=105139 --- Comment #8 from Mike Lothian --- Correct, I've only ever used debug builds when debugging issues -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug._

[Mesa-dev] [Bug 107098] Segfault after munmap(kms_sw_dt->ro_mapped)

https://bugs.freedesktop.org/show_bug.cgi?id=107098 --- Comment #1 from Nubosch --- I can confirm this issue. Using tinydrm display with weston 4.0.90 linux 4.17.2 KMS-DEBUG: unmapped buffer 2 (was 0x69eaa000) KMS-DEBUG: unmapped buffer 2 (was (nil)) KMS-DEBUG: destroyed buffer 2 The process sh

[Mesa-dev] [Bug 105139] Assertion in Dying Light

https://bugs.freedesktop.org/show_bug.cgi?id=105139 --- Comment #7 from Grazvydas Ignotas --- It seems the patches have landed, and while GL version overrides are no longer needed, the assert still triggers for me. Perhaps you've built a non-debug version when you tested? -- You are receiving t

Re: [Mesa-dev] [PATCH] anv/icl: Don't set float blend optimization bit in CACHE_MODE_SS

Reviewed-by: Lionel Landwerlin On 03/07/18 21:24, Anuj Phogat wrote: Bump On Fri, Jun 1, 2018 at 2:40 PM Anuj Phogat wrote: CACHE_MODE_SS is not listed in gfxspecs table for user mode non-privileged registers. So, making any changes from Mesa will do nothing. Kernel is already setting this bi

[Mesa-dev] [PATCH] anv/pipeline: honor the pipeline_cache_enabled run-time flag

--- src/intel/vulkan/anv_pipeline_cache.c | 37 +++ 1 file changed, 20 insertions(+), 17 deletions(-) diff --git a/src/intel/vulkan/anv_pipeline_cache.c b/src/intel/vulkan/anv_pipeline_cache.c index d4c7262dc0..5825bf9f01 100644 --- a/src/intel/vulkan/anv_pipeline

[Mesa-dev] [PATCH 2/2] spirv: implement support for OpAtomicLoad for image pointers

Signed-off-by: Samuel Iglesias Gonsálvez --- src/compiler/spirv/spirv_to_nir.c | 33 +++ 1 file changed, 33 insertions(+) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index e8ab48012f5..dc00d853c39 100644 --- a/src/compiler/spirv

[Mesa-dev] [PATCH 1/2] spirv: implement support for OpAtomicStore for image pointers

Signed-off-by: Samuel Iglesias Gonsálvez --- src/compiler/spirv/spirv_to_nir.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index fb4211193fb..e8ab48012f5 100644 --- a/src/compiler/spirv/spirv_to_nir

Re: [Mesa-dev] [PATCH 3/3] intel/compiler: add an optimization pass for booleans

On Tue, 2018-07-03 at 18:45 -0700, Caio Marcelo de Oliveira Filho wrote: > Hi, > > > > + /* Look for any follow-up instructions that sources from the > > boolean > > +* result of the producer instruction and rewrite them to use > > the correct > > +* bit-size. > > +*/ > > + foreac