On Fri, Jun 15, 2018 at 4:44 PM, Eric Anholt wrote:
> Michel Dänzer writes:
>
> > On 2018-06-15 05:25 PM, Jason Ekstrand wrote:
> >> On June 15, 2018 01:14:24 Michel Dänzer wrote:
> >>> On 2018-06-15 07:31 AM, Jason Ekstrand wrote:
>
> I did some testing and x11perf -copywinwin500 is.
https://bugs.freedesktop.org/show_bug.cgi?id=106915
--- Comment #5 from Jason Ekstrand ---
(In reply to Ian Romanick from comment #4)
> I don't think this text has anything to do with this bug. s[] is not
> declared an explicit size.
Exactly. My point is that the spec seems to explicitly allow
https://bugs.freedesktop.org/show_bug.cgi?id=106915
--- Comment #4 from Ian Romanick ---
(In reply to Jason Ekstrand from comment #3)
> I really hate it, but I fear they may be allowed. From the GLSL 4.60 spec
> in the section on UBO and SSBO layouts:
>
> > The shared qualifier overrides only t
https://bugs.freedesktop.org/show_bug.cgi?id=106915
--- Comment #3 from Jason Ekstrand ---
I really hate it, but I fear they may be allowed. From the GLSL 4.60 spec in
the section on UBO and SSBO layouts:
> The shared qualifier overrides only the std140, std430, and packed
> qualifiers; other q
https://bugs.freedesktop.org/show_bug.cgi?id=106915
Ian Romanick changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #2 from Ian Romanic
https://bugs.freedesktop.org/show_bug.cgi?id=106915
--- Comment #1 from Ian Romanick ---
(In reply to Eleni Maria Stea from comment #0)
> From GLSLang Spec 4.60 Section 4.2 Scoping:
Please refer to this as the "OpenGL Shading Language specification". GLSLang
is a particular implementation of th
Build mesa 7940 failed
Commit 355868dbfc by Ian Romanick on 6/6/2018 2:00 AM:
nir: Document a couple instances of parent_instr\n\nnir_ssa_def::parent_instr and nir_src::parent_instr have the same name,\nbut they mean really different things. I choose to save t
Build mesa 7939 completed
Commit 4467040cb6 by Ian Romanick on 6/13/2018 5:36 PM:
i965/fs: Propagate conditional modifiers from not instructions\n\nSkylake\ntotal instructions in shared programs: 14399081 -> 14399010 (<.01%)\ninstructions in affected programs:
Cc: Keith Packard
---
src/amd/vulkan/radv_extensions.py | 1 +
src/amd/vulkan/radv_wsi_display.c | 57 +
src/intel/vulkan/anv_extensions.py | 1 +
src/intel/vulkan/anv_wsi_display.c | 56
src/vulkan/wsi/wsi_common_display.c | 192
src/vulk
Build mesa 7938 failed
Commit 4106f6ce54 by Eric Anholt on 6/15/2018 1:05 AM:
v3d: Handle a no-intersection scissor even if it's outside of the VP.\n\nThe min/maxes ended up producing a negative clip width/height for\ndEQP-GLES3.functional.fragment_ops.scissor.
Series is
Reviewed-by: Jason Ekstrand
On Fri, Jun 15, 2018 at 4:54 PM, Rafael Antognolli <
rafael.antogno...@intel.com> wrote:
> If we are on gen8+ and have context isolation support, just make that
> constant buffer address be absolute, so we can use it for push UBOs too.
>
> v2: Do not duplic
If we are on gen8+ and have context isolation support, just make that
constant buffer address be absolute, so we can use it for push UBOs too.
v2: Do not duplicate constant_buffer_0_is_relative flag (Jason)
---
src/intel/vulkan/anv_device.c | 3 ++-
src/intel/vulkan/genX_state.c | 27 +++
Michel Dänzer writes:
> On 2018-06-15 05:25 PM, Jason Ekstrand wrote:
>> On June 15, 2018 01:14:24 Michel Dänzer wrote:
>>> On 2018-06-15 07:31 AM, Jason Ekstrand wrote:
I did some testing and x11perf -copywinwin500 is... exactly the same
with
or without my patches. If anyth
Series:
Reviewed-by: Timothy Arceri
On 16/06/18 06:13, Rob Clark wrote:
Save the next person from digging through the code to figure out what
the indirect_mask parameter actually does.
Signed-off-by: Rob Clark
---
src/compiler/nir/nir_opt_loop_unroll.c | 4
1 file changed, 4 insertio
Eric,
Thanks for finding that command to shut off copyright. I've updated the
series to add it.
Laura
On Fri, Jun 1, 2018 at 7:29 AM, Dylan Baker wrote:
> Quoting Eric Engestrom (2018-06-01 02:41:36)
> > On Thursday, 2018-05-31 14:00:24 -0700, Dylan Baker wrote:
> > > Quoting Laura Ekstrand (
On 06/15/2018 03:09 AM, Iago Toral wrote:
> On Thu, 2018-06-14 at 17:43 -0700, Ian Romanick wrote:
>> From: Ian Romanick
>>
>> Skylake
>> total instructions in shared programs: 14399081 -> 14399010 (<.01%)
>> instructions in affected programs: 26961 -> 26890 (-0.26%)
>> helped: 57
>> HURT: 0
>> he
Eric,
Thanks for picking up on this; I have updated the link:
https://mesa-test.freedesktop.org/relnotes.html. The 18.2.0.html page
exists even though it's not released yet. It's a stub that Emil added.
Laura
2018-05-31 6:50 GMT-07:00 Eric Engestrom :
> On Wednesday, 2018-05-30 15:53:22 -0700
On 06/15/2018 02:27 AM, Iago Toral wrote:
> On Thu, 2018-06-14 at 17:43 -0700, Ian Romanick wrote:
>> From: Ian Romanick
>>
>> fs_visitor::set_gs_stream_control_data_bits generates some code like
>> "control_data_bits | stream_id << ((2 * (vertex_count - 1)) % 32)" as
>> part of EmitVertex. The f
Stuart,
We are now running on our own Docker image:
https://mesa-test.freedesktop.org/.
This should have fixed both of the issues you encountered.
Thanks.
Laura
On Mon, Jun 11, 2018 at 3:24 PM, Laura Ekstrand
wrote:
> I really like the rotate on hover effect for the gears. I would rather
>
On Tue, Jun 12, 2018 at 12:28 PM Chad Versace wrote:
>
> On Thu 07 Jun 2018, Fritz Koenig wrote:
> > Adds an extension to glFramebufferParameteri
> > that will specify if the framebuffer is vertically
> > flipped. Historically system framebuffers are
> > vertically flipped and user framebuffers ar
Signed-off-by: Rhys Perry
---
src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 +
src/gallium/drivers/freedreno/freedreno_screen.c | 1 +
src/gallium/drivers/i915/i915_screen.c | 1 +
src/gallium/drivers/llvmpipe/lp_screen.c | 1 +
src/gallium/drivers/nouveau/nv30/nv30_scree
Signed-off-by: Rhys Perry
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 +--
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c| 3 ++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
Signed-off-by: Rhys Perry
---
src/mesa/state_tracker/st_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index 467d9b0759..115472d790 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa
Changes in v2:
- Change from PIPE_SHADER_CAP_* to PIPE_CAP_*
- Fix broken feature detection in the state tracker
- Move code in AlgebraicOpt::handleSULDP() to nv50_ir_ra.cpp
This patch series implements EXT_shader_image_load_formatted on Maxwell+.
It should implement all of the spec except, if th
Signed-off-by: Rhys Perry
---
src/compiler/glsl/ast_to_hir.cpp | 5 +
src/compiler/glsl/glsl_parser_extras.cpp | 1 +
src/compiler/glsl/glsl_parser_extras.h | 7 +++
src/mesa/main/extensions_table.h | 1 +
src/mesa/main/mtypes.h | 1 +
5 files changed,
Signed-off-by: Rhys Perry
---
src/gallium/drivers/nouveau/codegen/nv50_ir.h | 4 +++
.../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 34 ++
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 --
.../drivers/nouveau/codegen/nv50_ir_print.cpp | 17 ++
On Fri, Jun 15, 2018 at 4:31 PM, Ilia Mirkin wrote:
> On Fri, Jun 15, 2018 at 4:24 PM, Rhys Perry wrote:
>> Signed-off-by: Rhys Perry
>> ---
>> src/compiler/glsl/ast_to_hir.cpp | 5 +
>> src/compiler/glsl/glsl_parser_extras.cpp | 1 +
>> src/compiler/glsl/glsl_parser_extras.h | 7
From: Roland Scheidegger
The sampleMaskIn workaround (b936f4d1ca0d2ab1e828ff6a6e617f12469687fa)
tries to figure out if the shader is running at per-sample frequency, but
there's a typo bug so it will only recognize per-sample linar inputs,
not per-sample perspective ones.
Spotted by Eric Engestr
On Fri, Jun 15, 2018 at 1:31 PM, Rafael Antognolli <
rafael.antogno...@intel.com> wrote:
> On Fri, Jun 15, 2018 at 01:21:17PM -0700, Jason Ekstrand wrote:
> > On Fri, Jun 15, 2018 at 1:12 PM, Rafael Antognolli <
> rafael.antogno...@intel.com
> > > wrote:
> >
> > If we are on gen8+ and have con
Build mesa 7937 completed
Commit 0d4f338a11 by Dylan Baker on 6/15/2018 8:53 PM:
docs: Update release-notes and calendar
Configure your notification preferences
___
mesa-dev mailing list
mesa-dev@lists.free
Yeah, I think that's right.
I must have misread something.
On Fri, Jun 15, 2018 at 9:31 PM, Ilia Mirkin wrote:
> On Fri, Jun 15, 2018 at 4:24 PM, Rhys Perry wrote:
>> Signed-off-by: Rhys Perry
>> ---
>> src/compiler/glsl/ast_to_hir.cpp | 5 +
>> src/compiler/glsl/glsl_parser_extras
Hi List,
Mesa 18.1.2 is now available for download.
In this release we have:
- Fixes for libatomic checks on non-arm and non-x86 platforms
- porting of additional libatomic checks to meson from autotools
- numerous radv fixes
- numerous intel fix
- several files added to the release tarball
On Fri, Jun 15, 2018 at 4:24 PM, Rhys Perry wrote:
> Signed-off-by: Rhys Perry
> ---
> src/gallium/drivers/nouveau/codegen/nv50_ir.h | 4 +++
> .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 34
> ++
> .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 --
>
On Fri, Jun 15, 2018 at 4:24 PM, Rhys Perry wrote:
> Signed-off-by: Rhys Perry
> ---
> src/gallium/auxiliary/gallivm/lp_bld_limits.h | 1 +
> src/gallium/auxiliary/tgsi/tgsi_exec.h | 1 +
> src/gallium/drivers/nouveau/nv30/nv30_screen.c | 1 +
> src/gallium/drivers/nouveau/nv50/nv50_scr
On Fri, Jun 15, 2018 at 4:24 PM, Rhys Perry wrote:
> Signed-off-by: Rhys Perry
> ---
> src/compiler/glsl/ast_to_hir.cpp | 5 +
> src/compiler/glsl/glsl_parser_extras.cpp | 1 +
> src/compiler/glsl/glsl_parser_extras.h | 7 +++
> src/mesa/main/extensions_table.h | 1 +
>
On Fri, Jun 15, 2018 at 01:21:17PM -0700, Jason Ekstrand wrote:
> On Fri, Jun 15, 2018 at 1:12 PM, Rafael Antognolli
> > wrote:
>
> If we are on gen8+ and have context isolation support, just make that
> constant buffer address be absolute, so we can use it for push UBOs too.
> ---
>
Signed-off-by: Rhys Perry
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 +--
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c| 3 ++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
Signed-off-by: Rhys Perry
---
src/gallium/auxiliary/gallivm/lp_bld_limits.h | 1 +
src/gallium/auxiliary/tgsi/tgsi_exec.h | 1 +
src/gallium/drivers/nouveau/nv30/nv30_screen.c | 1 +
src/gallium/drivers/nouveau/nv50/nv50_screen.c | 1 +
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 1
Signed-off-by: Rhys Perry
---
src/gallium/drivers/nouveau/codegen/nv50_ir.h | 4 +++
.../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 34 ++
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 --
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 27 ++
This patch series implements EXT_shader_image_load_formatted on Maxwell+.
It should implement all of the spec except, if the extension is enabled,
passing image variables without a format qualifier to atomic operations
will not raise a compilation error like it should.
This is because knowing the
Signed-off-by: Rhys Perry
---
src/compiler/glsl/ast_to_hir.cpp | 5 +
src/compiler/glsl/glsl_parser_extras.cpp | 1 +
src/compiler/glsl/glsl_parser_extras.h | 7 +++
src/mesa/main/extensions_table.h | 1 +
src/mesa/main/mtypes.h | 1 +
5 files changed,
Signed-off-by: Rhys Perry
---
src/mesa/state_tracker/st_extensions.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index 467d9b0759..10342c1be2 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/m
On Fri, Jun 15, 2018 at 1:12 PM, Rafael Antognolli <
rafael.antogno...@intel.com> wrote:
> If we are on gen8+ and have context isolation support, just make that
> constant buffer address be absolute, so we can use it for push UBOs too.
> ---
> src/intel/vulkan/anv_device.c | 5 -
> src/inte
Just something I stumbled across.
Signed-off-by: Rob Clark
---
src/compiler/glsl/link_uniform_blocks.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/glsl/link_uniform_blocks.cpp
b/src/compiler/glsl/link_uniform_blocks.cpp
index e9e29d13a17..0ab9687b7fb 10064
Save the next person from digging through the code to figure out what
the indirect_mask parameter actually does.
Signed-off-by: Rob Clark
---
src/compiler/nir/nir_opt_loop_unroll.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/compiler/nir/nir_opt_loop_unroll.c
b/src/compiler/nir/
---
src/intel/genxml/gen10.xml | 4
src/intel/genxml/gen11.xml | 4
src/intel/genxml/gen6.xml | 5 +
src/intel/genxml/gen7.xml | 5 +
src/intel/genxml/gen75.xml | 5 +
src/intel/genxml/gen8.xml | 5 +
src/intel/genxml/gen9.xml | 4
7 files changed, 32 insertions(
If we are on gen8+ and have context isolation support, just make that
constant buffer address be absolute, so we can use it for push UBOs too.
---
src/intel/vulkan/anv_device.c | 5 -
src/intel/vulkan/anv_private.h | 1 +
src/intel/vulkan/genX_state.c | 27 +++
3 fi
---
src/intel/vulkan/anv_device.c | 3 +++
src/intel/vulkan/anv_private.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 63d5876edb1..d1637f097e8 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device
Oops.
Reviewed-by: Samuel Pitoiset
On 06/15/2018 07:00 PM, Eric Engestrom wrote:
Fixes: 922cd38172b8a2bc286bd "radv: implement out-of-order rasterization when it's
safe on VI+"
Cc: Samuel Pitoiset
Signed-off-by: Eric Engestrom
---
src/amd/vulkan/radv_pipeline.c | 2 +-
1 file changed, 1
On Fri, 2018-06-15 at 11:23 -0600, Kyle Brenneman wrote:
> The Khronos repository basically is a package for the headers. The
> challenge is that the pkg-config file has to specify an include path and
> a library path. The include path depends on where you put the header
> files (which are in t
Hi Emil,
Am Freitag, den 08.06.2018, 16:28 +0100 schrieb Emil Velikov:
> On 8 June 2018 at 12:02, Gert Wollny wrote:
> > From: Gert Wollny
> >
[...]
> Out of curiosity: how many warnings are we walking about - is it
> something like 20-50 or it's in the 100+ region?
>
> There's a small commen
Reviewed-by: Sinclair Yeh
On Tue, Jun 12, 2018 at 03:27:04PM +0100, Ross Burton wrote:
> From: Khem Raj
>
> vmw_screen.h uses dev_t which is defines in sys/types.h
> this header is required to be included for getting dev_t
> definition. This issue happens on musl C library, it is hidden
> on gl
Quoting Kyle Brenneman (2018-06-15 11:02:37)
> On 06/15/2018 11:41 AM, Dylan Baker wrote:
> > Quoting Kyle Brenneman (2018-06-15 10:23:24)
> >> On 06/15/2018 10:46 AM, Dylan Baker wrote:
> >>> Quoting Kyle Brenneman (2018-05-30 06:18:27)
> On 05/29/2018 12:04 PM, Adam Jackson wrote:
> > On
On 06/15/2018 11:41 AM, Dylan Baker wrote:
Quoting Kyle Brenneman (2018-06-15 10:23:24)
On 06/15/2018 10:46 AM, Dylan Baker wrote:
Quoting Kyle Brenneman (2018-05-30 06:18:27)
On 05/29/2018 12:04 PM, Adam Jackson wrote:
On Tue, 2018-05-29 at 09:54 -0700, Dylan Baker wrote:
Quoting Adam Jacks
Sent from my iPhone...
> On Jun 15, 2018, at 09:35, Eric Engestrom wrote:
>
>> On Friday, 2018-06-15 08:14:40 -0700, Jeremy Huddleston Sequoia wrote:
>> I think we can instead revert c7f3657450683827446072ad6b1e8fce04078162.
>
> If you think the issue is resolved, then please feel free to sen
Quoting Kyle Brenneman (2018-06-15 10:23:24)
> On 06/15/2018 10:46 AM, Dylan Baker wrote:
> > Quoting Kyle Brenneman (2018-05-30 06:18:27)
> >> On 05/29/2018 12:04 PM, Adam Jackson wrote:
> >>> On Tue, 2018-05-29 at 09:54 -0700, Dylan Baker wrote:
> Quoting Adam Jackson (2018-05-29 06:50:46)
>
On 06/15/2018 10:46 AM, Dylan Baker wrote:
Quoting Kyle Brenneman (2018-05-30 06:18:27)
On 05/29/2018 12:04 PM, Adam Jackson wrote:
On Tue, 2018-05-29 at 09:54 -0700, Dylan Baker wrote:
Quoting Adam Jackson (2018-05-29 06:50:46)
GL_LIB expands to GLX_mesa, but applications should not link aga
Quoting Jon Turney (2018-06-15 09:51:31)
> On 11/06/2018 23:56, Dylan Baker wrote:
> > We need to add an extra flag (/SUBSYSTEM:CONSOLE) to get the msvc linker
> > to find main() in a static library.
> > ---
> > src/gtest/meson.build | 7 +++
> > 1 file changed, 7 insertions(+)
> >
> > diff
Fixes: 922cd38172b8a2bc286bd "radv: implement out-of-order rasterization when
it's safe on VI+"
Cc: Samuel Pitoiset
Signed-off-by: Eric Engestrom
---
src/amd/vulkan/radv_pipeline.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulka
It's a bit late to round up after an integer division.
Fixes: de889794134e6245e08a2 "radv: Implement VK_AMD_shader_info"
Cc: Alex Smith
Signed-off-by: Eric Engestrom
---
src/amd/vulkan/radv_shader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_shader.c
On 11/06/2018 23:56, Dylan Baker wrote:
We need to add an extra flag (/SUBSYSTEM:CONSOLE) to get the msvc linker
to find main() in a static library.
---
src/gtest/meson.build | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/gtest/meson.build b/src/gtest/meson.build
index 91a49240
On Fri, Jun 15, 2018 at 12:36 PM, Dylan Baker wrote:
> I don't even understand why we make these announcements TBH. I have a public
> 18.1-proposed branch that I push to *every weekday*. Anyone can pull that
> branch
> *anytime* to get the latest version. The only thing the announce email really
Quoting Kyle Brenneman (2018-05-30 06:18:27)
> On 05/29/2018 12:04 PM, Adam Jackson wrote:
> > On Tue, 2018-05-29 at 09:54 -0700, Dylan Baker wrote:
> >> Quoting Adam Jackson (2018-05-29 06:50:46)
> >>> GL_LIB expands to GLX_mesa, but applications should not link against
> >>> that. -lGL is never w
Reviewed-by: Dylan Baker
Quoting Eric Engestrom (2018-06-15 04:15:31)
> Shouldn't make any functional difference, just that `liblibanv_gen90.a`
> will now be called `libanv_gen90.a`.
>
> Fixes: 3218056e0eb375eeda470 "meson: Build i965 and dri stack"
> Fixes: d1992255bb29054fa5176 "meson: Add bui
Quoting Juan A. Suarez Romero (2018-06-15 07:26:18)
> On Thu, 2018-06-14 at 10:16 -0700, Dylan Baker wrote:
> > Quoting Bas Nieuwenhuizen (2018-06-14 09:21:49)
> > > On Thu, Jun 14, 2018 at 6:13 PM, wrote:
> > > > Hello list,
> > > >
> > > > The candidate for the Mesa 18.1.2 is now available. Cu
On Friday, 2018-06-15 08:14:40 -0700, Jeremy Huddleston Sequoia wrote:
> I think we can instead revert c7f3657450683827446072ad6b1e8fce04078162.
If you think the issue is resolved, then please feel free to send that
revert :)
Is there a way for someone without a Mac to test this?
> I believe the
Build mesa 7933 failed
Commit 9e1f208795 by Rafael Antognolli on 6/12/2018 7:18 PM:
intel/aubinator: Use int to store getopt_long flags.\n\ngetopt_long flag parameter is an int pointer, so if we use bool to store\nthose values, when getopt_long writes to one of
On Fri, Jun 15, 2018 at 8:31 AM, Michel Dänzer wrote:
> On 2018-06-15 05:25 PM, Jason Ekstrand wrote:
> > On June 15, 2018 01:14:24 Michel Dänzer wrote:
> >> On 2018-06-15 07:31 AM, Jason Ekstrand wrote:
> >>>
> >>> I did some testing and x11perf -copywinwin500 is... exactly the same
> >>> with
On 15 June 2018 at 15:26, Juan A. Suarez Romero wrote:
> On Thu, 2018-06-14 at 10:16 -0700, Dylan Baker wrote:
>> Quoting Bas Nieuwenhuizen (2018-06-14 09:21:49)
>> > On Thu, Jun 14, 2018 at 6:13 PM, wrote:
>> > > Hello list,
>> > >
>> > > The candidate for the Mesa 18.1.2 is now available. Curr
On 2018-06-15 05:25 PM, Jason Ekstrand wrote:
> On June 15, 2018 01:14:24 Michel Dänzer wrote:
>> On 2018-06-15 07:31 AM, Jason Ekstrand wrote:
>>>
>>> I did some testing and x11perf -copywinwin500 is... exactly the same
>>> with
>>> or without my patches. If anything they might improve it by jus
I think we can instead revert c7f3657450683827446072ad6b1e8fce04078162. I
believe the underlying issue should instead be addressed by
a087a09fa86f9617af98f6294dd2228555a4891c. If any issues remain, we should
address them properly rather than masking them with this.
A quick audit makes me susp
On 12 June 2018 at 01:21, Laura Ekstrand wrote:
> It's done already, it was a one-liner:
> https://gitlab.freedesktop.org/ldeks/mesa/commits/website1_75_v2
>
Thanks for the great work Laura and thanks to Jean for the initial
poke in this direction.
I'm a huge fan of the script and separate steps
On Thu, Jun 14, 2018 at 11:13 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> If we want to upload 16k 32-bit consts we need a bit of overhead
> to faciliate that.
>
> Fixes crash in:
> KHR-GL44.geometry_shader.limits.max_uniform_components
> ---
> src/gallium/drivers/virgl/virgl_winsys.h | 2 +-
On June 15, 2018 01:14:24 Michel Dänzer wrote:
On 2018-06-15 07:31 AM, Jason Ekstrand wrote:
On Thu, Jun 14, 2018 at 10:55 AM, Jason Ekstrand
wrote:
On June 14, 2018 01:43:12 Michel Dänzer wrote:
On 2018-06-13 10:26 PM, Jason Ekstrand wrote:
The current BO cache puts BOs back into the re
Build mesa 7932 completed
Commit f8e2c4c57c by Samuel Pitoiset on 6/15/2018 2:50 PM:
Revert "radv: always set/load both depth and stencil clear values"\n\nThis fixes a rendering regression with RoTR.\n\nThis reverts commit 4bdad9faddc82a4560603936ce5ade5707ecb2
Reviewed-by: Bas Nieuwenhuizen
On Fri, Jun 15, 2018 at 4:50 PM, Samuel Pitoiset
wrote:
> This fixes a rendering regression with RoTR.
>
> This reverts commit 4bdad9faddc82a4560603936ce5ade5707ecb254.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 33 +
This fixes a rendering regression with RoTR.
This reverts commit 4bdad9faddc82a4560603936ce5ade5707ecb254.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 33 +++-
1 file changed, 28 insertions(+), 5 deletions(-)
diff --git a/src/amd/vulkan/rad
On Thu, 2018-06-14 at 10:16 -0700, Dylan Baker wrote:
> Quoting Bas Nieuwenhuizen (2018-06-14 09:21:49)
> > On Thu, Jun 14, 2018 at 6:13 PM, wrote:
> > > Hello list,
> > >
> > > The candidate for the Mesa 18.1.2 is now available. Currently we have:
> > > - 42 queued
> > > - 6 nominated (outsta
https://bugs.freedesktop.org/show_bug.cgi?id=106905
Emil Velikov changed:
What|Removed |Added
Version|git |unspecified
Assignee|mesa-dev@
Build mesa 7931 failed
Commit a2f6e72138 by Samuel Pitoiset on 6/15/2018 1:53 PM:
radv: don't check for linear images in emit_fast_color_clear()\n\nWe don't enable CMASK for linear surfaces and addrlib only\nenables DCC for tiling surfaces.\n\nSigned-off-by: Sa
On 12/06/2018 16:53, Dylan Baker wrote:
Quoting Eric Engestrom (2018-06-12 04:25:10)
Copied from configure.ac:1950
Signed-off-by: Eric Engestrom
---
Is it still needed? We've been building on MacOS for a while,
yet nobody noticed anything (Dylan?)
If not, we should probably avoid unnecessary d
Reviewed-by: Tapani Pälli
On 15.06.2018 14:15, Eric Engestrom wrote:
Shouldn't make any functional difference, just that `liblibanv_gen90.a`
will now be called `libanv_gen90.a`.
Fixes: 3218056e0eb375eeda470 "meson: Build i965 and dri stack"
Fixes: d1992255bb29054fa5176 "meson: Add build Intel
On Thu, Jun 14, 2018 at 05:57:01PM -0700, Keith Packard wrote:
> We sorted out what 'vscan' means and are trying to use it correctly.
>
> vscan = 0 is the same as vscan = 1, which is slightly annoying; we use
> MAX2(vscan, 1) everywhere.
>
> randr doesn't pass vscan at all, so we set wsi mode vsc
Reviewed-by: Samuel Pitoiset
On 06/15/2018 12:51 AM, Dave Airlie wrote:
From: Dave Airlie
This wasn't being used anywhere inside the shader from what I can see.
---
src/amd/vulkan/radv_pipeline.c | 2 --
src/amd/vulkan/radv_private.h | 1 -
src/amd/vulkan/radv_shader.h | 1 -
3 files
Build mesa 7930 completed
Commit efae127993 by Christian Gmeiner on 6/15/2018 10:18 AM:
util/bitset: include util/macro.h\n\nBITSET_FFS(x) macro makes use of ARRAY_SIZE(x) macro which is\ndefined in util/macro.h. Include it directy to make usage more\nstraightf
On Friday, 2018-06-15 12:18:56 +0200, Christian Gmeiner wrote:
> BITSET_FFS(x) macro makes use of ARRAY_SIZE(x) macro which is
> defined in util/macro.h. Include it directy to make usage more
> straightforward.
>
> Fixes: 692bd4a1ab9 ("util: replace Elements() with ARRAY_SIZE()")
> Signed-off-by:
Shouldn't make any functional difference, just that `liblibanv_gen90.a`
will now be called `libanv_gen90.a`.
Fixes: 3218056e0eb375eeda470 "meson: Build i965 and dri stack"
Fixes: d1992255bb29054fa5176 "meson: Add build Intel "anv" vulkan driver"
Signed-off-by: Eric Engestrom
---
src/intel/isl/me
Reviewed-by: Samuel Pitoiset
On 06/15/2018 12:08 AM, Bas Nieuwenhuizen wrote:
Somehow valgrind misses that the value is initialized by the ioctl.
---
src/amd/common/ac_gpu_info.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common
v1 -> v2:
- nv30 is _NOT_ scalar as suggested by Ilia Mirkin.
- Change from a screen cap to a shader cap as suggested
by Eric Anholt.
- radeonsi is scalar as suggested by Marek Olšák.
- Change missing ones to be scalar.
v2 -> v3:
- r600 prefers vec4 as suggested by Marek Olšák.
Signed-off
As not every (upcoming) backend compiler is happy with
nir_lower_xxx_to_scalar lowerings do them only if the backend
is scalar (and not vec4) based.
Signed-off-by: Christian Gmeiner
Reviewed-by: Eric Anholt
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 39 +--
1 file chang
BITSET_FFS(x) macro makes use of ARRAY_SIZE(x) macro which is
defined in util/macro.h. Include it directy to make usage more
straightforward.
Fixes: 692bd4a1ab9 ("util: replace Elements() with ARRAY_SIZE()")
Signed-off-by: Christian Gmeiner
---
src/util/bitset.h | 1 +
1 file changed, 1 insertio
On 15/06/18 06:50, Jason Ekstrand wrote:
> On Thu, Jun 14, 2018 at 6:06 PM, Jose Maria Casanova Crespo
> mailto:jmcasan...@igalia.com>> wrote:
>
> This new function takes care of shuffle/unshuffle components of a
> particular bit-size in components with a different bit-size.
>
> If so
I dropped a suggestion in patch 1 that also applies to patch 3, feel
free to take it or not, and then I pointed out a small issue in patch 6
that I think should be addressed that I think should be fixed.
Otherwise, the series is:
Reviewed-by: Iago Toral Quiroga
On Thu, 2018-06-14 at 17:43 -0700,
On Thu, 2018-06-14 at 17:43 -0700, Ian Romanick wrote:
> From: Ian Romanick
>
> Skylake
> total instructions in shared programs: 14399081 -> 14399010 (<.01%)
> instructions in affected programs: 26961 -> 26890 (-0.26%)
> helped: 57
> HURT: 0
> helped stats (abs) min: 1 max: 6 x̄: 1.25 x̃: 1
> hel
Build mesa 7929 failed
Commit 4cfc4cef80 by Lukas Rusak on 6/4/2018 7:38 PM:
meson: fix private libs when building without glx\n\nI noticed that the generated pkg-config files will include\nglx and x11 dependencies even when x11 isn't a selected platform.\n\nTh
On Thursday, 2018-06-14 10:25:20 -0700, Lukas Rusak wrote:
> How can I get some traction on this?
Sorry about that, it fell through the cracks.
Pushed now with my r-b and Fixes: 108d257a16859898f5ce0 "meson: build libEGL"
>
> On Mon, Jun 4, 2018 at 12:38 PM Lukas Rusak wrote:
>
> > I noticed
On Thu, 2018-06-14 at 17:43 -0700, Ian Romanick wrote:
> From: Ian Romanick
>
> fs_visitor::set_gs_stream_control_data_bits generates some code like
> "control_data_bits | stream_id << ((2 * (vertex_count - 1)) % 32)" as
> part of EmitVertex. The first time this (dynamically) occurs in the
> sha
https://bugs.freedesktop.org/show_bug.cgi?id=106774
--- Comment #20 from Iago Toral ---
FWIW, this sounds a lot like the problem we tried to address in NIR with a
load-combine pass some time ago here:
https://lists.freedesktop.org/archives/mesa-dev/2016-April/112925.html
--
You are receiving t
Any movement on one of these solutions ending up in master and 18.1.x
anytime soon?
On Thu, 31 May 2018 at 05:09, Kyle Brenneman
wrote:
> On 05/29/2018 12:04 PM, Adam Jackson wrote:
> > On Tue, 2018-05-29 at 09:54 -0700, Dylan Baker wrote:
> >> Quoting Adam Jackson (2018-05-29 06:50:46)
> >>> GL
On 2018-06-15 07:31 AM, Jason Ekstrand wrote:
> On Thu, Jun 14, 2018 at 10:55 AM, Jason Ekstrand
> wrote:
>> On June 14, 2018 01:43:12 Michel Dänzer wrote:
>> On 2018-06-13 10:26 PM, Jason Ekstrand wrote:
>>>
The current BO cache puts BOs back into the recycle bucket the moment the
refc
1 - 100 of 102 matches
Mail list logo