On 06/15/2018 03:09 AM, Iago Toral wrote:
> On Thu, 2018-06-14 at 17:43 -0700, Ian Romanick wrote:
>> From: Ian Romanick <ian.d.roman...@intel.com>
>>
>> Skylake
>> total instructions in shared programs: 14399081 -> 14399010 (<.01%)
>> instructions in affected programs: 26961 -> 26890 (-0.26%)
>> helped: 57
>> HURT: 0
>> helped stats (abs) min: 1 max: 6 x̄: 1.25 x̃: 1
>> helped stats (rel) min: 0.16% max: 0.80% x̄: 0.30% x̃: 0.18%
>> 95% mean confidence interval for instructions value: -1.50 -0.99
>> 95% mean confidence interval for instructions %-change: -0.35% -0.25%
>> Instructions are helped.
>>
>> total cycles in shared programs: 532978307 -> 532976050 (<.01%)
>> cycles in affected programs: 468629 -> 466372 (-0.48%)
>> helped: 33
>> HURT: 20
>> helped stats (abs) min: 3 max: 360 x̄: 116.52 x̃: 98
>> helped stats (rel) min: 0.06% max: 3.63% x̄: 1.66% x̃: 1.27%
>> HURT stats (abs) min: 2 max: 172 x̄: 79.40 x̃: 43
>> HURT stats (rel) min: 0.04% max: 3.02% x̄: 1.48% x̃: 0.44%
>> 95% mean confidence interval for cycles value: -81.29 -3.88
>> 95% mean confidence interval for cycles %-change: -1.07% 0.12%
>> Inconclusive result (%-change mean confidence interval includes 0).
>>
>> All Gen6+ platforms, except Ivy Bridge, had similar results. (Haswell
>> shown)
>> total instructions in shared programs: 12973897 -> 12973838 (<.01%)
>> instructions in affected programs: 25970 -> 25911 (-0.23%)
>> helped: 55
>> HURT: 0
>> helped stats (abs) min: 1 max: 2 x̄: 1.07 x̃: 1
>> helped stats (rel) min: 0.16% max: 0.62% x̄: 0.28% x̃: 0.18%
>> 95% mean confidence interval for instructions value: -1.14 -1.00
>> 95% mean confidence interval for instructions %-change: -0.32% -0.24%
>> Instructions are helped.
>>
>> total cycles in shared programs: 410355841 -> 410352067 (<.01%)
>> cycles in affected programs: 578454 -> 574680 (-0.65%)
>> helped: 47
>> HURT: 5
>> helped stats (abs) min: 3 max: 360 x̄: 85.74 x̃: 18
>> helped stats (rel) min: 0.05% max: 3.68% x̄: 1.18% x̃: 0.38%
>> HURT stats (abs) min: 2 max: 242 x̄: 51.20 x̃: 4
>> HURT stats (rel) min: <.01% max: 0.45% x̄: 0.15% x̃: 0.11%
>> 95% mean confidence interval for cycles value: -104.89 -40.27
>> 95% mean confidence interval for cycles %-change: -1.45% -0.66%
>> Cycles are helped.
>>
>> Ivy Bridge
>> total instructions in shared programs: 11679351 -> 11679301 (<.01%)
>> instructions in affected programs: 28208 -> 28158 (-0.18%)
>> helped: 50
>> HURT: 0
>> helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
>> helped stats (rel) min: 0.12% max: 0.54% x̄: 0.23% x̃: 0.16%
>> 95% mean confidence interval for instructions value: -1.00 -1.00
>> 95% mean confidence interval for instructions %-change: -0.27% -0.19%
>> Instructions are helped.
>>
>> total cycles in shared programs: 257445362 -> 257444662 (<.01%)
>> cycles in affected programs: 419338 -> 418638 (-0.17%)
>> helped: 40
>> HURT: 3
>> helped stats (abs) min: 1 max: 170 x̄: 65.05 x̃: 24
>> helped stats (rel) min: 0.02% max: 3.51% x̄: 1.26% x̃: 0.41%
>> HURT stats (abs) min: 2 max: 1588 x̄: 634.00 x̃: 312
>> HURT stats (rel) min: 0.05% max: 2.97% x̄: 1.21% x̃: 0.62%
>> 95% mean confidence interval for cycles value: -97.96 65.41
>> 95% mean confidence interval for cycles %-change: -1.56% -0.62%
>> Inconclusive result (value mean confidence interval includes 0).
>>
>> No changes on Iron Lake or GM45.
>>
>> Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
>> ---
>> src/intel/compiler/brw_fs_cmod_propagation.cpp | 63
>> +++++++++++++++++++++++++-
>> 1 file changed, 62 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/intel/compiler/brw_fs_cmod_propagation.cpp
>> b/src/intel/compiler/brw_fs_cmod_propagation.cpp
>> index b4f05613e98..c935cc66c81 100644
>> --- a/src/intel/compiler/brw_fs_cmod_propagation.cpp
>> +++ b/src/intel/compiler/brw_fs_cmod_propagation.cpp
>> @@ -111,6 +111,61 @@ cmod_propagate_cmp_to_add(const gen_device_info
>> *devinfo, bblock_t *block,
>> return false;
>> }
>>
>> +/**
>> + * Propagate conditional modifiers from NOT instructions
>> + *
>> + * Attempt to convert sequences like
>> + *
>> + * or(8) g78<8,8,1> g76<8,8,1>UD g77<8,8,1>UD
>> + * ...
>> + * not.nz.f0(8) null g78<8,8,1>UD
>> + *
>> + * into
>> + *
>> + * or.z.f0(8) g78<8,8,1> g76<8,8,1>UD g77<8,8,1>UD
>> + */
>> +static bool
>> +cmod_propagate_not(const gen_device_info *devinfo, bblock_t *block,
>> + fs_inst *inst)
>> +{
>> + const enum brw_conditional_mod cond = brw_negate_cmod(inst-
>>> conditional_mod);
>> + bool read_flag = false;
>> +
>> + foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst,
>> inst) {
>> + if (regions_overlap(scan_inst->dst, scan_inst->size_written,
>> + inst->src[0], inst->size_read(0))) {
>> + if (cond != BRW_CONDITIONAL_Z &&
>> + cond != BRW_CONDITIONAL_NZ)
>> + break;
>
> Looks like we can do this before the loop.
Yes... I have another patch that adds support for propagating
conditional modifiers from a NOT instruction to a CMP instruction with
the opposite condition. That patch didn't help anything, so I didn't
send it out.
I can pull this out of the loop now, and if we ever add support for more
scan_inst opcodes, we can move it back inside.
>> +
>> + if (scan_inst->opcode != BRW_OPCODE_OR &&
>> + scan_inst->opcode != BRW_OPCODE_AND)
>> + break;
>> +
>> + if (scan_inst->is_partial_write() ||
>> + scan_inst->dst.offset != inst->src[0].offset ||
>> + scan_inst->exec_size != inst->exec_size)
>> + break;
>> +
>> + if (scan_inst->can_do_cmod() &&
>> + ((!read_flag && scan_inst->conditional_mod ==
>> BRW_CONDITIONAL_NONE) ||
>> + scan_inst->conditional_mod == cond)) {
>> + scan_inst->conditional_mod = cond;
>> + inst->remove(block);
>> + return true;
>> + }
>> + break;
>> + }
>> +
>> + if (scan_inst->flags_written())
>> + break;
>> +
>> + read_flag = read_flag || scan_inst->flags_read(devinfo);
>> + }
>> +
>> + return false;
>> +}
>> +
>> static bool
>> opt_cmod_propagation_local(const gen_device_info *devinfo, bblock_t
>> *block)
>> {
>> @@ -122,7 +177,8 @@ opt_cmod_propagation_local(const gen_device_info
>> *devinfo, bblock_t *block)
>>
>> if ((inst->opcode != BRW_OPCODE_AND &&
>> inst->opcode != BRW_OPCODE_CMP &&
>> - inst->opcode != BRW_OPCODE_MOV) ||
>> + inst->opcode != BRW_OPCODE_MOV &&
>> + inst->opcode != BRW_OPCODE_NOT) ||
>> inst->predicate != BRW_PREDICATE_NONE ||
>> !inst->dst.is_null() ||
>> (inst->src[0].file != VGRF && inst->src[0].file != ATTR &&
>> @@ -162,6 +218,11 @@ opt_cmod_propagation_local(const gen_device_info
>> *devinfo, bblock_t *block)
>> continue;
>> }
>>
>> + if (inst->opcode == BRW_OPCODE_NOT) {
>> + progress = cmod_propagate_not(devinfo, block, inst) ||
>> progress;
>> + continue;
>> + }
>> +
>> bool read_flag = false;
>> foreach_inst_in_block_reverse_starting_from(fs_inst,
>> scan_inst, inst) {
>> if (regions_overlap(scan_inst->dst, scan_inst-
>>> size_written,
>
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
