Reviewed-by: Samuel Iglesias Gonsálvez
On 06/07/16 05:14, Timothy Arceri wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vs.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vs.c
> b/src/mesa/drivers/dri/i965/brw_vs.c
> index 8f3
On Tue, Jul 05, 2016 at 07:12:49AM -0700, Jason Ekstrand wrote:
>On Jul 5, 2016 6:32 AM, "Pohjolainen, Topi"
><[1]topi.pohjolai...@intel.com> wrote:
>>
>> On Wed, Jun 29, 2016 at 05:14:51PM -0700, Jason Ekstrand wrote:
>> > Reviewed-by: Topi Pohjolainen <[2]topi.pohjolai...@inte
ping?
This patch put away the compiler warning:
"comparison of constant -1 with expression of type 'gl_buffer_index' is
always false"
2016-06-28 19:31 GMT+02:00 Francesco Ansanelli :
> ---
> src/mesa/main/buffers.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff
On 06/30/2016 04:55 PM, Francisco Jerez wrote:
> Ian Romanick writes:
>
>> From: Ian Romanick
>>
>> Signed-off-by: Ian Romanick
>> ---
>> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 50 ++--
>> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 52
>> +++
On Wednesday, July 6, 2016 12:41:02 PM PDT Timothy Arceri wrote:
> These workarounds are not required for HSW and above so stop
> copying them at VS key generation which is called at draw time.
> ---
> src/mesa/drivers/dri/i965/brw_vs.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
On Wednesday, July 6, 2016 1:14:37 PM PDT Timothy Arceri wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vs.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vs.c
> b/src/mesa/drivers/dri/i965/brw_vs.c
> index 8f3c7eb..b0a0f23 1006
---
src/mesa/drivers/dri/i965/brw_vs.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c
b/src/mesa/drivers/dri/i965/brw_vs.c
index 8f3c7eb..b0a0f23 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/br
From: Mathias Fröhlich
Hi,
Since the function is exported like any other
public api fucnntion and put in the header
as if you could link against it export it also
from shared objects.
Please review!
Thanks!
Mathias
---
src/gallium/targets/osmesa/osmesa.def | 1 +
src/gallium/targets/os
Hi Brian,
On Tuesday, July 05, 2016 08:46:05 Brian Paul wrote:
> Feel free to post a patch to add it to the exports list.
Thanks, is on the way!
Mathias
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On Tuesday, July 05, 2016 15:47:45 Rob Clark wrote:
> In bc4e0c4 (vbo: Use a bitmask to track the active arrays in vbo_exec*.)
> we stopped looping over all the attributes and resetting all slots.
> Which exposed an issue in vbo_exec_bind_arrays() for handling GENERIC0
> vs. POS.
>
> Split out a h
These workarounds are not required for HSW and above so stop
copying them at VS key generation which is called at draw time.
---
src/mesa/drivers/dri/i965/brw_vs.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c
b/src/mesa/drivers/dri/i
https://bugs.freedesktop.org/show_bug.cgi?id=96765
Ian Romanick changed:
What|Removed |Added
CC||i...@freedesktop.org
--
You are receivin
https://bugs.freedesktop.org/show_bug.cgi?id=96765
--- Comment #1 from Ilia Mirkin ---
Are you sure that's correct? It's unclear from the spec that you should be able
to set arbitrary array indices' frag data locations/index values. Your test
case works with:
diff --git a/blend_func_extended_arr
Hi Jason,
Am 30.06.2016 um 01:22 schrieb Jason Ekstrand:
> v2: Switch on the usage when filling out formats
>
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 119
> ++
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 ++
> 2
From: Ian Romanick
Every valid intrinsic function name starts with "__intrinsic_". Compare
and store the string once instead of 41 times.
textdata bss dec hex filename
7529283 273096 28584 7830963 777db3 /tmp/i965_dri-64bit-before.so
7529067 273096 28584 7830747 777cd
From: Ian Romanick
Right now the generator generates nearly identical code. There is no
change in the binary size.
textdata bss dec hex filename
7529283 273096 28584 7830963 777db3 /tmp/i965_dri-64bit-before.so
7529283 273096 28584 7830963 777db3 /tmp/i965_dri-64bit-a
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 23 ---
src/mesa/drivers/dri/i965/brw_shader.cpp | 16
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 16 +---
src/mesa/drivers/dri/i965/intel_e
From: Ian Romanick
Otherwise grepping for where atomic_counter_inc and friends are defined
is a very frustrating experience.
Signed-off-by: Ian Romanick
---
src/compiler/nir/nir_intrinsics.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/compiler/nir/nir_int
The first 7 patches in this series put GLSL-to-NIR on a small diet. I
looked at the giant sequense of 'if (strcmp(...) == 0) { ... } else if
(strcmp(...) == 0) { ...' and said, "Oh hell no." I don't think we care
much about the performance of this code, so I opted to tune for size.
Using an in-co
From: Ian Romanick
The next patches are going to significantly change the implementation,
so I really want a unit test.
textdata bss dec hex filename
7529123 273096 28584 7830803 777d13 /tmp/i965_dri-64bit-before.so
7529283 273096 28584 7830963 777db3 /tmp/i965_dri-64b
From: Ian Romanick
textdata bss dec hex filename
7529067 273096 28584 7830747 777cdb /tmp/i965_dri-64bit-before.so
7529003 273096 28584 7830683 777c9b /tmp/i965_dri-64bit-after.so
Signed-off-by: Ian Romanick
---
src/compiler/glsl/nir_intrinsic_map.py | 20 +++
From: Ian Romanick
This will make it easier to add more operations.
Signed-off-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 19 ---
src/mesa/drivers/dri/i965/brw_shader.cpp | 16
src/mesa/drivers/dri/i965/brw_shader.h | 3 +++
src/me
From: Ian Romanick
If there is a way to do this cleanly in mako, I'm very interested to
hear about it.
textdata bss dec hex filename
7529003 273096 28584 7830683 777c9b /tmp/i965_dri-64bit-before.so
7528883 273096 28584 7830563 777c23 /tmp/i965_dri-64bit-after.so
Sign
From: Ian Romanick
All of this code operates on the assumption that get_intrinsic_opcode
will only be called with valid names. If the first character of every
node in the trie level is unique, the prefix can be uniquely identified
by switching on just that first character. Otherwise we have to
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/compiler/glsl/glsl_to_nir.cpp | 43 +++---
src/compiler/glsl/nir_intrinsic_map.py | 8
.../glsl/tests/get_intrinsic_opcode_test.cpp | 8
src/compiler/nir/nir.c
From: Ian Romanick
I think this makes the next patch more clear.
textdata bss dec hex filename
7528883 273096 28584 7830563 777c23 /tmp/i965_dri-64bit-before.so
7528835 273096 28584 7830515 777bf3 /tmp/i965_dri-64bit-after.so
Signed-off-by: Ian Romanick
---
src/comp
Fixes my CI builds. :)
Tested-by: Ian Romanick
On 07/05/2016 02:13 PM, Kenneth Graunke wrote:
> Otherwise it doesn't get automatically generated in a clean build.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96825
> Signed-off-by: Kenneth Graunke
> ---
> src/intel/vulkan/Makefil
v5 of this makes our CI very angry:
15:36:20
/home/jenkins/workspace/Leeroy_3/repos/mesa/src/intel/vulkan/anv_device.c:31:27:
fatal error: anv_timestamp.h: No such file or directory
15:36:20 compilation terminated.
15:36:20 Makefile:1304: recipe for target 'anv_device.lo' failed
15:36:20 make[4]:
ping
On Fri, Jun 24, 2016 at 1:42 AM, Ilia Mirkin wrote:
> Previously we were only restricting based on ES/non-ES-ness and whether
> the overall enable bit had been flipped on. However we have been adding
> more fine-grained restrictions, such as based on compat profiles, as
> well as specific ES
https://bugs.freedesktop.org/show_bug.cgi?id=90264
--- Comment #64 from Maciej Lisiewski ---
I'm seeing it too:
Chrome 51.0.2704.84
Ubuntu 16.04
Kernel 4.6.2
Mesa 12.1~git1606270730.d20b89~gd~t (oibaf)
radeonsi (r9 390x)
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https://bugs.freedesktop.org/show_bug.cgi?id=90264
--- Comment #65 from Thomas Hellström ---
Hi!
I'm on vacation and will be back on Monday August 8. For vmware linux graphics
driver issues, please contact
Thanks,
Thomas Hellstr?m
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Reviewed-by: Jason Ekstrand
On Tue, Jul 5, 2016 at 2:13 PM, Kenneth Graunke
wrote:
> Otherwise it doesn't get automatically generated in a clean build.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96825
> Signed-off-by: Kenneth Graunke
> ---
> src/intel/vulkan/Makefile.sources |
Otherwise it doesn't get automatically generated in a clean build.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96825
Signed-off-by: Kenneth Graunke
---
src/intel/vulkan/Makefile.sources | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/Makefile.sou
In bc4e0c4 (vbo: Use a bitmask to track the active arrays in vbo_exec*.)
we stopped looping over all the attributes and resetting all slots.
Which exposed an issue in vbo_exec_bind_arrays() for handling GENERIC0
vs. POS.
Split out a helper which can reset a particular slot, so that
vbo_exec_bind_a
https://bugs.freedesktop.org/show_bug.cgi?id=96825
--- Comment #4 from Vinson Lee ---
The build error occurs on both Ubuntu and Fedora.
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On Wed, Jun 29, 2016 at 05:12:45PM -0700, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
>
> v3: Various fixes, mostly involving alignment, found when porting blorp
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 170
> +-
> src/mesa/drivers/dri/i965/intel
https://bugs.freedesktop.org/show_bug.cgi?id=96825
--- Comment #3 from Emil Velikov ---
Jason, guess that your "a bit" was taken too literally ;-)
Vinson, which distribution is this on, does any other platforms have this issue
?
Does the system in question have access to 'date' ? If not I'd str
ok, so either (or both) of:
---
diff --git a/src/mesa/vbo/vbo_exec_api.c b/src/mesa/vbo/vbo_exec_api.c
index e02bb90..a7ae50b 100644
--- a/src/mesa/vbo/vbo_exec_api.c
+++ b/src/mesa/vbo/vbo_exec_api.c
@@ -1278,9 +1278,11 @@ void vbo_exec_FlushVertices( struct gl_context
*ctx, GLuint fl
So, this is a bit sad, but this breaks things for 0ad.. and maybe
others. I have an api-trace:
https://people.freedesktop.org/~robclark/0ad-cycladic-archipelago.trace.xz
The problem is the interaction with the VERT_ATTRIB_POS /
VERT_ATTRIB_GENERIC0 switcharoo in vbo_exec_bind_arrays(), althoug
Since pixel center lies at 0.5, add half_pixel to vtex
before adding offsets to it.
Signed-off-by: Nayan Deshmukh
---
src/gallium/auxiliary/vl/vl_bicubic_filter.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/auxiliary/vl/vl_bicubic_filter.c
b/src/gallium/auxiliary/vl/vl_bic
https://bugs.freedesktop.org/show_bug.cgi?id=96825
--- Comment #2 from Vinson Lee ---
$ ./autogen.sh --with-dri-drivers=i965 --with-gallium-drivers=
--with-vulkan-drivers=intel
$ make
[...]
CC anv_gem.lo
CC anv_entrypoints.lo
CC anv_allocator.lo
CC anv_batch_chain.
https://bugs.freedesktop.org/show_bug.cgi?id=96825
Jason Ekstrand changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |emil.l.veli...@gmail.com
On Tue, Jul 5, 2016 at 6:26 PM, Tom Stellard wrote:
> On Tue, Jul 05, 2016 at 11:36:03AM +0200, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> RadeonSI stats: Mostly 0% difference, but Valley shows a small improvement:
>>
>
> Do you know which intrinsic this made a difference for? I'm guessing
>
https://bugs.freedesktop.org/show_bug.cgi?id=96825
Bug ID: 96825
Summary: anv_device.c:31:27: fatal error: anv_timestamp.h: No
such file or directory
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: L
On Tue, Jul 05, 2016 at 11:36:03AM +0200, Marek Olšák wrote:
> From: Marek Olšák
>
> RadeonSI stats: Mostly 0% difference, but Valley shows a small improvement:
>
Do you know which intrinsic this made a difference for? I'm guessing
this is required for all the intrinsics defined in the backend
On 06/30/2016 11:34 PM, Mathias Fröhlich wrote:
Hi,
Is OSMesaCreateContextAttribs supposed to be an extension function
that should not be linked against and queried for using
OSMesaGetProcAddress or is that a public api function?
Either. If the application is sure to be linked against a new
On Jul 5, 2016 6:44 AM, "Pohjolainen, Topi"
wrote:
>
> On Wed, Jun 29, 2016 at 04:22:22PM -0700, Jason Ekstrand wrote:
> > v2: Switch on the usage when filling out formats
> >
> > Reviewed-by: Topi Pohjolainen
> > ---
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 119
++
On Jul 5, 2016 6:32 AM, "Pohjolainen, Topi"
wrote:
>
> On Wed, Jun 29, 2016 at 05:14:51PM -0700, Jason Ekstrand wrote:
> > Reviewed-by: Topi Pohjolainen
> >
> > v3: Stomp more surface state fields
> > ---
> > src/mesa/drivers/dri/i965/brw_blorp.c | 163
++
> > src
On Wed, Jun 29, 2016 at 04:22:22PM -0700, Jason Ekstrand wrote:
> v2: Switch on the usage when filling out formats
>
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 119
> ++
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 ++
Am 05.07.2016 um 11:36 schrieb Marek Olšák:
> From: Marek Olšák
>
> RadeonSI stats: Mostly 0% difference, but Valley shows a small improvement:
>
> ApplicationFilesSGPRs VGPRs SpillSGPR SpillVGPR Code
> SizeLDSMax Waves Waits
> unigine_valley 2780
On Tue, Jul 05, 2016 at 04:03:54PM +0300, Pohjolainen, Topi wrote:
> On Tue, Jul 05, 2016 at 05:10:53PM +1000, Timothy Arceri wrote:
> > ---
> > src/mesa/drivers/dri/i965/brw_cs.c | 3 +--
> > src/mesa/drivers/dri/i965/brw_gs.c | 4 +---
> > src/mesa/drivers/dri/i965/brw_program.h | 1
On Wed, Jun 29, 2016 at 05:14:51PM -0700, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
>
> v3: Stomp more surface state fields
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c | 163
> ++
> src/mesa/drivers/dri/i965/brw_blorp.h | 6 ++
> 2 files changed,
On Tue, Jul 05, 2016 at 05:10:53PM +1000, Timothy Arceri wrote:
> ---
> src/mesa/drivers/dri/i965/brw_cs.c | 3 +--
> src/mesa/drivers/dri/i965/brw_gs.c | 4 +---
> src/mesa/drivers/dri/i965/brw_program.h | 1 -
> src/mesa/drivers/dri/i965/brw_tcs.c | 5 +
> src/mesa/drivers/
Signed-off-by: Samuel Pitoiset
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 124 +++--
.../nouveau/codegen/nv50_ir_lowering_nvc0.h| 2 +-
2 files changed, 44 insertions(+), 82 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc
Signed-off-by: Samuel Pitoiset
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 24 --
.../nouveau/codegen/nv50_ir_lowering_nvc0.h| 4
2 files changed, 28 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gall
Signed-off-by: Samuel Pitoiset
---
.../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv
On Tue, Jul 05, 2016 at 11:21:22AM +0200, Iago Toral Quiroga wrote:
> ---
> src/mesa/drivers/dri/i965/brw_blorp.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Topi Pohjolainen
>
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
> b/src/mesa/drivers/dri/i965/brw_blor
On Tue, Jul 05, 2016 at 11:21:21AM +0200, Iago Toral Quiroga wrote:
> Without this the i965 driver fails to load.
> ---
> src/mesa/drivers/dri/i965/brw_blorp.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
> b/src/mesa/drivers/dri/
https://bugs.freedesktop.org/show_bug.cgi?id=96770
--- Comment #1 from Emil Velikov ---
Yay, I broke things ;-)
There's a couple of routes we can take:
- Bring back the EGL/GLX includes - I would strongly advice against that.
- guard the typedefs with ifdef macros - fragile, we'll also need to
Hi Akihiko Odaki,
Thanks for the patch. I have a question below
On 26 June 2016 at 02:54, Akihiko Odaki
wrote:
> Signed-off-by: Akihiko Odaki
>
> diff --git a/configure.ac b/configure.ac
> index cc9bc47..320781a 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -1060,6 +1060,7 @@ xno)
>
Am 01.07.2016 um 18:18 schrieb Andy Furniss:
Christian König wrote:
Am 01.07.2016 um 18:02 schrieb Andy Furniss:
Christian König wrote:
Am 01.07.2016 um 16:42 schrieb Andy Furniss:
Boyuan Zhang wrote:
Signed-off-by: Boyuan Zhang
Is this supposed to be the same functionally as the first ve
On 05/07/16 10:36, Marek Olšák wrote:
From: Marek Olšák
RadeonSI stats: Mostly 0% difference, but Valley shows a small improvement:
ApplicationFilesSGPRs VGPRs SpillSGPR SpillVGPR Code
SizeLDSMax Waves Waits
unigine_valley 2780.00 % -0.29 %
https://bugs.freedesktop.org/show_bug.cgi?id=96358
--- Comment #11 from Arek Ruśniak ---
Np, thx for quick fix.
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On Tue, Jul 5, 2016 at 12:13 PM, Jon Turney wrote:
> On 01/07/2016 00:21, Marek Olšák wrote:
> [...]
>>
>> diff --git a/src/gallium/drivers/ddebug/dd_util.h
>> b/src/gallium/drivers/ddebug/dd_util.h
>> index 093bdff..3649644 100644
>> --- a/src/gallium/drivers/ddebug/dd_util.h
>> +++ b/src/gallium
On 01/07/2016 00:21, Marek Olšák wrote:
[...]
diff --git a/src/gallium/drivers/ddebug/dd_util.h
b/src/gallium/drivers/ddebug/dd_util.h
index 093bdff..3649644 100644
--- a/src/gallium/drivers/ddebug/dd_util.h
+++ b/src/gallium/drivers/ddebug/dd_util.h
@@ -71,4 +71,27 @@ dd_get_debug_file(bool ver
From: Marek Olšák
replaced by MESA_SHADER_CAPTURE_PATH in core Mesa
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 66 --
1 file changed, 66 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 6d0
From: Marek Olšák
RadeonSI stats: Mostly 0% difference, but Valley shows a small improvement:
ApplicationFilesSGPRs VGPRs SpillSGPR SpillVGPR Code
SizeLDSMax Waves Waits
unigine_valley 2780.00 % -0.29 %0.00 %0.00 %0.01 %
0.00 %
Without this the i965 driver fails to load.
---
src/mesa/drivers/dri/i965/brw_blorp.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
b/src/mesa/drivers/dri/i965/brw_blorp.h
index 751e082..cf1ba63 100644
--- a/src/mesa/drivers/dri/i965/brw
---
src/mesa/drivers/dri/i965/brw_blorp.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
b/src/mesa/drivers/dri/i965/brw_blorp.h
index cf1ba63..4947843 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw
https://bugs.freedesktop.org/show_bug.cgi?id=96358
--- Comment #10 from Timothy Arceri ---
(In reply to Arek Ruśniak from comment #9)
> Hi Gregory, I have a problem with building mesa with:
> https://cgit.freedesktop.org/mesa/mesa/commit/
> ?id=6a524c76f502fe15bb3612065a23ece693aed237
>
> Is tha
https://bugs.freedesktop.org/show_bug.cgi?id=96358
--- Comment #9 from Arek Ruśniak ---
Hi Gregory, I have a problem with building mesa with:
https://cgit.freedesktop.org/mesa/mesa/commit/?id=6a524c76f502fe15bb3612065a23ece693aed237
Is that commit related to this bug? If not just tell me then I
Reviewed-by: Samuel Iglesias Gonsálvez
On 05/07/16 09:10, Timothy Arceri wrote:
> ---
> src/mesa/drivers/dri/i965/brw_cs.c | 3 +--
> src/mesa/drivers/dri/i965/brw_gs.c | 4 +---
> src/mesa/drivers/dri/i965/brw_program.h | 1 -
> src/mesa/drivers/dri/i965/brw_tcs.c | 5 +
>
On 02/07/16 12:02, Timothy Arceri wrote:
> This just stops counting and assigning a storage location for
> these uniforms, the count is only used to create the uniform storage.
>
> This uniform types don't use this storage.
s/This/These
Reviewed-by: Samuel Iglesias Gonsálvez
> ---
> src/compi
Reviewed-by: Samuel Iglesias Gonsálvez
On 02/07/16 05:36, Timothy Arceri wrote:
> Missed this when doing 6d1a59d15b.
> ---
> src/compiler/glsl/link_uniform_blocks.cpp | 2 +-
> src/compiler/glsl/linker.h| 4
> 2 files changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a
Reviewed-by: Samuel Iglesias Gonsálvez
On 03/07/16 11:16, Timothy Arceri wrote:
> The call to _mesa_update_shader_textures_used() already takes
> care of copying for us.
> ---
> src/mesa/main/uniform_query.cpp | 4
> 1 file changed, 4 deletions(-)
>
> diff --git a/src/mesa/main/uniform_que
---
src/mesa/drivers/dri/i965/brw_cs.c | 3 +--
src/mesa/drivers/dri/i965/brw_gs.c | 4 +---
src/mesa/drivers/dri/i965/brw_program.h | 1 -
src/mesa/drivers/dri/i965/brw_tcs.c | 5 +
src/mesa/drivers/dri/i965/brw_tes.c | 5 +
src/mesa/drivers/dri/i965/brw_vs.c |
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