On Thu, Dec 17, 2015 at 10:09 PM, Boris Peterbarg
wrote:
> Woah, this brought back memories of fighting with X and mesa!
>
> If you want to list me, I'd prefer you use re...@users.sourceforge.net
Actually, your comment just gave me a _brilliant_ idea. If mesa was
hosted on SF's svn, I'm ready to
Hello Boris,
On Thu, Dec 17, 2015 at 10:09 PM, Boris Peterbarg
wrote:
> Woah, this brought back memories of fighting with X and mesa!
>
> If you want to list me, I'd prefer you use re...@users.sourceforge.net
Thanks, I've added the mapping. Unless of course you'd rather want to
remain anonymous
On Thu, 2015-12-17 at 16:29 +0200, Francisco Jerez wrote:
> Iago Toral Quiroga writes:
>
> > Some drivers can disable the FS unit if there is nothing in the shader code
> > that writes to an output (i.e. color, depth, etc). Right now, mesa has
> > a function to check for atomic buffers and the i9
On Thursday, December 17, 2015 01:21:26 PM Ben Widawsky wrote:
> As per the docs.
>
> Cc: Kenneth Graunke
> Signed-off-by: Ben Widawsky
> ---
> src/mesa/drivers/dri/i965/brw_pipe_control.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/
On 18.12.2015 07:00, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Unify the cleanup paths of the function rather than duplicating code.
This should probably be backported to the stable branches? If so, add
Cc: "11.0 11.1"
to the commit log, no need to actually send the patch to the mesa-s
On Dec 17, 2015 1:21 AM, "Eero Tamminen" wrote:
>
> Hi,
>
>
> On 12/17/2015 01:52 AM, Matt Turner wrote:
>>
>> On Tue, Dec 15, 2015 at 1:16 AM, Eduardo Lima Mitev
wrote:
>>>
>>> On 12/15/2015 09:28 AM, Kristian Høgsberg Kristensen wrote:
This optimizes a + b - b to just a. Modest shader
On Thu, Dec 17, 2015 at 11:53:03AM -0800, Nanley Chery wrote:
> On Thu, Dec 17, 2015 at 11:25 AM, Matt Turner wrote:
>
> > On Thu, Dec 17, 2015 at 11:04 AM, Nanley Chery
> > wrote:
> > > On Thu, Dec 17, 2015 at 12:05:46PM +0100, Glenn Kennard wrote:
> > >> On Wed, 16 Dec 2015 20:57:51 +0100, Nan
Erik Faye-Lund writes:
>> Probably "Sven M. Hallberg "
>> (Sources: http://sourceforge.net/p/mesa3d/mailman/message/5416179/ and
>> https://github.com/jwiegley/lambdabot-1/blob/master/AUTHORS#L17)
>
> OK, this address bounced (or rather, mailer-dae...@kundenserver.de
> buonced pe...@gmx.de, so I g
From: Nicolai Hähnle
This changes the count slightly (because of si_generate_gs_copy_shader), but
this is only relevant for the driver-specific num-compilations query. It sets
the stage for the next commit.
---
src/gallium/drivers/radeonsi/si_shader.c| 2 ++
src/gallium/drivers/radeonsi/
From: Nicolai Hähnle
This option allows replacing a single shader by a pre-compiled ELF object
as generated by LLVM's llc, for example. This can be useful for debugging a
deterministically occuring error in shaders (and has in fact helped find
the causes of https://bugs.freedesktop.org/show_bug.c
From: Nicolai Hähnle
Unify the cleanup paths of the function rather than duplicating code.
---
src/gallium/drivers/radeon/radeon_llvm_emit.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/radeon_llvm_emit.c
b/src/gallium/drivers/radeon/radeon
As per the docs.
Cc: Kenneth Graunke
Signed-off-by: Ben Widawsky
---
src/mesa/drivers/dri/i965/brw_pipe_control.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c
b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index ae3d818.
Android builds with -Werror=pointer-to-int-cast causing an error on 32-bit
builds.
Signed-off-by: Rob Herring
---
src/gallium/drivers/freedreno/ir3/ir3_print.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_print.c
b/src/gallium/drivers
Woah, this brought back memories of fighting with X and mesa!
If you want to list me, I'd prefer you use re...@users.sourceforge.net
On Thu, Dec 17, 2015 at 12:27 PM, Erik Faye-Lund
wrote:
> On Thu, Dec 17, 2015 at 10:39 AM, Erik Faye-Lund
> wrote:
> > On Thu, Dec 17, 2015 at 10:09 AM, Giusepp
This is just a copy-n-paste and rename of vc4 Android makefiles.
Signed-off-by: Rob Herring
---
Android.mk | 4 ++--
src/gallium/Android.mk | 5 +
src/gallium/drivers/virgl/Android.mk| 35 +
src/gallium/targe
Add the virtio-gpu PCI ID so the driver probing works.
Signed-off-by: Rob Herring
---
include/pci_ids/virtio_gpu_pci_ids.h | 1 +
src/loader/pci_id_driver_map.h | 7 +++
2 files changed, 8 insertions(+)
create mode 100644 include/pci_ids/virtio_gpu_pci_ids.h
diff --git a/include/pci_
On Thu, Dec 17, 2015 at 12:30 PM, Sven M. Hallberg wrote:
> Erik Faye-Lund writes:
>>> Probably "Sven M. Hallberg "
>>> (Sources: http://sourceforge.net/p/mesa3d/mailman/message/5416179/ and
>>> https://github.com/jwiegley/lambdabot-1/blob/master/AUTHORS#L17)
>>
>> OK, this address bounced (or ra
Am 17.12.2015 um 20:22 schrieb Matt Turner:
> On Thu, Dec 17, 2015 at 11:19 AM, Roland Scheidegger
> wrote:
>> Am 17.12.2015 um 19:13 schrieb Brian Paul:
>>> On 12/17/2015 09:58 AM, srol...@vmware.com wrote:
From: Roland Scheidegger
NaNs mean it should be clipped, otherwise the Na
On Thu, Dec 17, 2015 at 11:25 AM, Matt Turner wrote:
> On Thu, Dec 17, 2015 at 11:04 AM, Nanley Chery
> wrote:
> > On Thu, Dec 17, 2015 at 12:05:46PM +0100, Glenn Kennard wrote:
> >> On Wed, 16 Dec 2015 20:57:51 +0100, Nanley Chery
> wrote:
> >>
> >> >From: Nanley Chery
> >> >
> >> >Commit 648
On Thu, Dec 17, 2015 at 4:46 PM, Matt Turner wrote:
> On Thu, Dec 17, 2015 at 1:09 AM, Giuseppe Bilotta
> wrote:
>> This adds a first tentative .mailmap file, to canonicize contributor
>> name/emails in shortlogs and other statistical endeavours.
>
> If we want this kind of information, should we
On Thu, Dec 17, 2015 at 11:04 AM, Nanley Chery wrote:
> On Thu, Dec 17, 2015 at 12:05:46PM +0100, Glenn Kennard wrote:
>> On Wed, 16 Dec 2015 20:57:51 +0100, Nanley Chery
>> wrote:
>>
>> >From: Nanley Chery
>> >
>> >Commit 64880d073ab21ae1abad0c049ea2d6a1169a3cfa consolidated two
>> >DIV_ROUND_
On Thu, Dec 17, 2015 at 11:19 AM, Roland Scheidegger wrote:
> Am 17.12.2015 um 19:13 schrieb Brian Paul:
>> On 12/17/2015 09:58 AM, srol...@vmware.com wrote:
>>> From: Roland Scheidegger
>>>
>>> NaNs mean it should be clipped, otherwise the NaNs might get passed to
>>> the
>>> next stages (if cli
Am 17.12.2015 um 19:13 schrieb Brian Paul:
> On 12/17/2015 09:58 AM, srol...@vmware.com wrote:
>> From: Roland Scheidegger
>>
>> NaNs mean it should be clipped, otherwise the NaNs might get passed to
>> the
>> next stages (if clipping didn't happen for another reason already), which
>> might cause
On Thu, Dec 17, 2015 at 12:05:46PM +0100, Glenn Kennard wrote:
> On Wed, 16 Dec 2015 20:57:51 +0100, Nanley Chery
> wrote:
>
> >From: Nanley Chery
> >
> >Commit 64880d073ab21ae1abad0c049ea2d6a1169a3cfa consolidated two
> >DIV_ROUND_UP() definitions to one, but chose the more
> >compute-intensiv
On 12/17/2015 09:58 AM, srol...@vmware.com wrote:
From: Roland Scheidegger
NaNs mean it should be clipped, otherwise the NaNs might get passed to the
next stages (if clipping didn't happen for another reason already), which
might cause all kind of problems.
The llvm path got this right already
On Dec 17, 2015 9:10 AM, "Francisco Jerez" wrote:
>
> Jason Ekstrand writes:
>
> > On Dec 14, 2015 6:24 AM, "Francisco Jerez"
wrote:
> >>
> >> Jason Ekstrand writes:
> >>
> >> > On Dec 11, 2015 5:44 AM, "Francisco Jerez"
> > wrote:
> >> >>
> >> >> Jason Ekstrand writes:
> >> >>
> >> >> > On D
On Thu, Dec 17, 2015 at 12:31 PM, Connor Abbott wrote:
> On Thu, Dec 17, 2015 at 11:44 AM, Matt Turner wrote:
>> On Wed, Dec 9, 2015 at 4:15 AM, Iago Toral Quiroga wrote:
>>> Right now we rely on the code at the bottom of brw_set_dest to set the
>>> correct execution size for anything that does
On Thu, Dec 17, 2015 at 11:44 AM, Matt Turner wrote:
> On Wed, Dec 9, 2015 at 4:15 AM, Iago Toral Quiroga wrote:
>> Right now we rely on the code at the bottom of brw_set_dest to set the
>> correct execution size for anything that does not operate on a full SIMD
>> register (dst.width < BRW_EXE
Jason Ekstrand writes:
> On Dec 14, 2015 6:24 AM, "Francisco Jerez" wrote:
>>
>> Jason Ekstrand writes:
>>
>> > On Dec 11, 2015 5:44 AM, "Francisco Jerez"
> wrote:
>> >>
>> >> Jason Ekstrand writes:
>> >>
>> >> > On Dec 10, 2015 6:58 AM, "Francisco Jerez"
>> > wrote:
>> >> >>
>> >> >> Jason
From: Roland Scheidegger
NaNs mean it should be clipped, otherwise the NaNs might get passed to the
next stages (if clipping didn't happen for another reason already), which
might cause all kind of problems.
The llvm path got this right already (possibly by luck), but this isn't used
when there's
On 17/12/15 04:59, srol...@vmware.com wrote:
From: Roland Scheidegger
Those stages only really work for OGL-style texturing (so number of samplers
and views mostly the same, certainly for the max values).
These get often set up all at once, thus there might be max number of both
even if all of
On Wed, Dec 9, 2015 at 4:15 AM, Iago Toral Quiroga wrote:
> Right now we rely on the code at the bottom of brw_set_dest to set the
> correct execution size for anything that does not operate on a full SIMD
> register (dst.width < BRW_EXECUTE_8). However, this won't work with fp64,
> where opera
Reviewed-by: Matt Turner
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
https://bugs.freedesktop.org/show_bug.cgi?id=80183
Roland Scheidegger changed:
What|Removed |Added
Status|REOPENED|RESOLVED
Resolution|---
On 12/16/2015 09:59 PM, srol...@vmware.com wrote:
From: Roland Scheidegger
Those stages only really work for OGL-style texturing (so number of samplers
and views mostly the same, certainly for the max values).
These get often set up all at once, thus there might be max number of both
even if al
On Thu, Dec 17, 2015 at 1:09 AM, Giuseppe Bilotta
wrote:
> This adds a first tentative .mailmap file, to canonicize contributor
> name/emails in shortlogs and other statistical endeavours.
>
> Signed-off-by: Giuseppe Bilotta
> ---
If we want this kind of information, should we just go with Ken's
Iago Toral Quiroga writes:
> Some drivers can disable the FS unit if there is nothing in the shader code
> that writes to an output (i.e. color, depth, etc). Right now, mesa has
> a function to check for atomic buffers and the i965 driver also checks for
> images. Refactor this logic into a gener
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.c
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index e3f9
From: Iago Toral Quiroga
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 3d24010..88e2f71 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mes
From: Iago Toral Quiroga
This code in brw_set_dest adjusts the execution size of any instruction
with a dst.width < 8. However, we don't want to do this with instructions
operating on doubles, since these will have a width of 4, but still
need an execution size of 8 (for SIMD8). Unfortunately, we
From: Iago Toral Quiroga
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 9a3b0a2..3d24010 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mes
From: Iago Toral Quiroga
v2: NOP should have an execsize of 1 (Matt)
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 5fb9662..9a3b0a2 1006
Hello,
This patch series is a updated version of the one Iago sent last
week [0] that includes patches for gen6 too, as suggested by Jason.
We checked the gen9 code paths that work with a horizontal width of 4
and we think there won't be any regression on gen9... but we don't
have any gen9 machin
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index c3426dd
From: Iago Toral Quiroga
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index c25da07..42b5e86 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/brw_ff_gs_emit.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c
b/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c
index 8589
On Wed, Dec 16, 2015 at 11:30 PM, Miklós Máté wrote:
> On 12/16/2015 05:27 PM, Marek Olšák wrote:
>>
>> What is this good for?
>>
>> Marek
>
> KotOR uses a series of scratch framebuffers for drawing the framebuffer
> effects. These have no depth and no stencil, so check_compatible() rejects
> them
On Wed, 16 Dec 2015 20:57:51 +0100, Nanley Chery wrote:
From: Nanley Chery
Commit 64880d073ab21ae1abad0c049ea2d6a1169a3cfa consolidated two
DIV_ROUND_UP() definitions to one, but chose the more
compute-intensive version in the process. Use the simpler version
instead. Reduces .text size by 13
On Thu, Dec 17, 2015 at 5:13 AM, Matt Turner wrote:
> On Wed, Dec 16, 2015 at 7:41 PM, Edward O'Callaghan
> wrote:
>> Fix silly issue with MSVC case fall-though support to need
>> a extra 'break;'
>>
>> Found-by: Coccinelle
>> Signed-off-by: Edward O'Callaghan
>> Reviewed-by: Brian Paul
>> ---
On Thu, Dec 17, 2015 at 10:39 AM, Erik Faye-Lund wrote:
> On Thu, Dec 17, 2015 at 10:09 AM, Giuseppe Bilotta
> wrote:
>> +# missing svn authors:
>
> I'm not sure this is useful, but just for kicks, I decided to try to
> track down these contributors, and this is what I came up with
> (suspected c
https://bugs.freedesktop.org/show_bug.cgi?id=80183
--- Comment #19 from Jose Fonseca ---
(In reply to cgerlach42 from comment #18)
> I also tried to replay an apitrace generated with hardware rendering, but I
> can't get the glretrace to use software rendering. It always uses the
> systems opengl
On Thu, Dec 17, 2015 at 10:09 AM, Giuseppe Bilotta
wrote:
> +# missing svn authors:
I'm not sure this is useful, but just for kicks, I decided to try to
track down these contributors, and this is what I came up with
(suspected contributors CC'ed, so they can confirm or deny if they
want):
> +pes
Hi,
On 12/17/2015 01:52 AM, Matt Turner wrote:
On Tue, Dec 15, 2015 at 1:16 AM, Eduardo Lima Mitev wrote:
On 12/15/2015 09:28 AM, Kristian Høgsberg Kristensen wrote:
This optimizes a + b - b to just a. Modest shader-db results (BDW):
total instructions in shared programs: 7842452 -> 78418
This adds a first tentative .mailmap file, to canonicize contributor
name/emails in shortlogs and other statistical endeavours.
Signed-off-by: Giuseppe Bilotta
---
.mailmap | 462 +++
1 file changed, 462 insertions(+)
create mode 10064
On Thu, Dec 17, 2015 at 4:57 AM, Kenneth Graunke wrote:
>
> Absolutely. Feel free to send them to me personally. Or, I could
> include the files upstream if that's of interest to people, and then
> people could just update stuff themselves.
>
> I just threw together a best-effort set of configur
On Wed, 2015-12-16 at 11:39 -0800, Kenneth Graunke wrote:
> On Wednesday, December 16, 2015 10:02:16 AM Iago Toral Quiroga wrote:
> > The BDW PRM Vol2a: Command Reference: Instructions, section
> > MEDIA_CURBE_LOAD,
> > says that 'CURBE Total Data Length' and 'CURBE Data Start Address' are
> > 64-
On Wed, 2015-12-16 at 14:48 -0800, Jordan Justen wrote:
> On 2015-12-16 11:39:00, Kenneth Graunke wrote:
> > On Wednesday, December 16, 2015 10:02:16 AM Iago Toral Quiroga wrote:
> > > The BDW PRM Vol2a: Command Reference: Instructions, section
> > > MEDIA_CURBE_LOAD,
> > > says that 'CURBE Total
https://bugs.freedesktop.org/show_bug.cgi?id=80183
--- Comment #18 from cgerlac...@gmail.com ---
You were right, the latest mesa version fixes this problem :-)
Latest git hash from my checkout is:
e97b207654a1c0b2c27b6ad6579b5570a83ce8cd
I also tried to replay an apitrace generated with hardware
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