On 02/08/2015 06:54 AM, Ilia Mirkin wrote:
On Fri, Feb 6, 2015 at 4:15 AM, Ian Romanick wrote:
On 02/06/2015 06:56 AM, Ilia Mirkin wrote:
From: Tapani Pälli
Patch fixes Piglit test:
arb_gpu_shader_fp64/preprocessor/fs-output-double.frag
and adds additional validation for shader output
Signed-off-by: Alex Henrie
---
src/mesa/drivers/dri/common/xmlpool/ca.po | 52 ---
1 file changed, 34 insertions(+), 18 deletions(-)
diff --git a/src/mesa/drivers/dri/common/xmlpool/ca.po
b/src/mesa/drivers/dri/common/xmlpool/ca.po
index 23e9f42..f89690a 100644
--- a
Signed-off-by: Alex Henrie
---
src/mesa/drivers/dri/common/xmlpool/es.po | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/common/xmlpool/es.po
b/src/mesa/drivers/dri/common/xmlpool/es.po
index a68c329..23aa37c 100644
--- a/src/m
Yeah, I find it really surprising that GLSL doesn't have per-compoent
and or, and xor, given that it already has per-component not. I didn't
even realize this was the case until I just looked at the spec. At the
very least, we can relax the restriction as long as st/glsl_to_tgsi
will work. NIR shou
I am sorry. I don't mean it in conventional sense. I'll describe it soon.
On Sunday, February 8, 2015, Matt Turner wrote:
> On Sun, Feb 8, 2015 at 3:45 PM, Aditya Avinash > wrote:
> > I think using softfloat at GLSL compilation stage will be a good idea
> > (atleast saves time on runtime compil
On Sunday, February 08, 2015 02:52:40 PM Francisco Jerez wrote:
> Kenneth Graunke writes:
[snip]
> > Wow, I don't like the name of that macro at all. I would expect it to
> > do the well known mathematical function, ceil(). It doesn't.
> >
> It does, well, sort of... I'm not sure who came up wi
The GLSL IR ir_binop_logic_* operations match the source language
operators in that they only operate on scalars.
In talking to Ilia, I realized that the vectorizer pass doesn't know
about that, and so it will happily vectorize the vertex shader in the
piglit test below.
The i965 driver emits per
On Sun, Feb 8, 2015 at 3:45 PM, Aditya Avinash wrote:
> I think using softfloat at GLSL compilation stage will be a good idea
> (atleast saves time on runtime compiler). Having both soft and hard floats
> in the binary can help as you can discard which ever you want depending on
> the backend. Thi
On Sun, Feb 8, 2015 at 6:30 PM, Matt Turner wrote:
> On Sun, Feb 8, 2015 at 2:51 PM, Dave Airlie wrote:
> > On 9 February 2015 at 08:44, Aditya Avinash
> wrote:
> >> Ya. I just want to know that part "only some r600".
> >> I believe some of the nv0 cards doesn't support double. You have any
> i
On 9 February 2015 at 09:30, Matt Turner wrote:
> On Sun, Feb 8, 2015 at 2:51 PM, Dave Airlie wrote:
>> On 9 February 2015 at 08:44, Aditya Avinash wrote:
>>> Ya. I just want to know that part "only some r600".
>>> I believe some of the nv0 cards doesn't support double. You have any ideas
>>> or
On Sun, Feb 8, 2015 at 2:51 PM, Dave Airlie wrote:
> On 9 February 2015 at 08:44, Aditya Avinash wrote:
>> Ya. I just want to know that part "only some r600".
>> I believe some of the nv0 cards doesn't support double. You have any ideas
>> or suggestions to make it possible?
>
> For AMD
> http://
If softfloat is implemented, where can be a right place to put it?
On Sun, Feb 8, 2015 at 6:17 PM, Ilia Mirkin wrote:
> On Sun, Feb 8, 2015 at 5:51 PM, Dave Airlie wrote:
> > On 9 February 2015 at 08:44, Aditya Avinash
> wrote:
> >> Ya. I just want to know that part "only some r600".
> >> I be
On Sun, Feb 8, 2015 at 5:51 PM, Dave Airlie wrote:
> On 9 February 2015 at 08:44, Aditya Avinash wrote:
>> Ya. I just want to know that part "only some r600".
>> I believe some of the nv0 cards doesn't support double. You have any ideas
>> or suggestions to make it possible?
>
> For AMD
> http://
Yes. All the low end cards of AMD does not support native double precision.
(Until the most recent SI).
Are there any good papers or documentation to do soffloat? Or emulate fglrx
stuff?
On Sun, Feb 8, 2015 at 5:51 PM, Dave Airlie wrote:
> On 9 February 2015 at 08:44, Aditya Avinash
> wrote:
On Sun, Feb 8, 2015 at 1:00 AM, Ilia Mirkin wrote:
> From: Tapani Pälli
>
> Patch fixes Piglit test:
>arb_gpu_shader_fp64/preprocessor/fs-output-double.frag
>
> and adds additional validation for shader outputs.
>
> Signed-off-by: Tapani Pälli
> Signed-off-by: Dave Airlie
> ---
> src/glsl/
Reviewed-by: Matt Turner
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Reviewed-by: Matt Turner
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On 9 February 2015 at 08:44, Aditya Avinash wrote:
> Ya. I just want to know that part "only some r600".
> I believe some of the nv0 cards doesn't support double. You have any ideas
> or suggestions to make it possible?
For AMD
http://en.wikipedia.org/wiki/List_of_AMD_graphics_processing_units
h
Reviewed-by: Matt Turner
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On Sun, Feb 8, 2015 at 1:59 PM, Ben Widawsky
wrote:
> Certain platforms support the ability to sample from a texture, and write it
> out
> to the file RT - thus saving a costly send instructions (and before Topi's
> recent patch, excess MOVs),
>
> On BSW, the performance data isn't quite what I w
Matt Turner writes:
> On Fri, Feb 6, 2015 at 6:43 AM, Francisco Jerez wrote:
>> ---
>> src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp
>> b/src/me
Ya. I just want to know that part "only some r600".
I believe some of the nv0 cards doesn't support double. You have any ideas
or suggestions to make it possible?
On Sun, Feb 8, 2015 at 3:28 PM, Ilia Mirkin wrote:
> Yes. nvc0+ (fermi+) has fp64 support [and the G200 chip also has a
> bunch, tbd
Matt Turner writes:
> On Fri, Feb 6, 2015 at 4:17 PM, Francisco Jerez wrote:
>> Matt Turner writes:
>>
>>> On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez
>>> wrote:
If the source type differs from the original type of the constant we
need to bit-cast it before propagating, otherwis
26 - Doesn't seem right to me.
27 - R-b
28 - Have to think about it more
29-31 - yet unreviewed
32 - Minor comments
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On Fri, Feb 6, 2015 at 6:43 AM, Francisco Jerez wrote:
> Some instruction bits don't have a mapping defined to any compacted
> instruction field. If they're ever set and we end up compacting the
> instruction they will be forced to zero. Avoid using compaction in such
> cases.
Nice find!
> ---
On Fri, Feb 6, 2015 at 6:43 AM, Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_d
Certain platforms support the ability to sample from a texture, and write it out
to the file RT - thus saving a costly send instructions (and before Topi's
recent patch, excess MOVs),
On BSW, the performance data isn't quite what I was hoping for. Statistically,
it is an improvement. Several micro
On Fri, Feb 6, 2015 at 4:17 PM, Francisco Jerez wrote:
> Matt Turner writes:
>
>> On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez
>> wrote:
>>> If the source type differs from the original type of the constant we
>>> need to bit-cast it before propagating, otherwise the original type
>>> inform
On Sun, Feb 8, 2015 at 2:26 PM, Matt Turner wrote:
> On Sun, Feb 8, 2015 at 1:00 AM, Ilia Mirkin wrote:
>> @@ -886,6 +953,25 @@ ir_constant::get_float_component(unsigned i) const
>> case GLSL_TYPE_INT: return (float) this->value.i[i];
>> case GLSL_TYPE_FLOAT: return this->value.f[i];
>>
Yes. nvc0+ (fermi+) has fp64 support [and the G200 chip also has a
bunch, tbd whether we'll bother supporting it]. radeon si/cik also has
it. Only some r600 eg/ni-based cards have hw support (generally
speaking, the higher end ones), the rest will have to emulate it. I
believe that intel gen7 (ivb)
Interesting... Does the actual hardware support double? (atleast for nv0)
Thank you!
On Sun, Feb 8, 2015 at 12:20 PM, Ilia Mirkin wrote:
> It all works fine on nvc0 and softpipe with my branch at
>
> https://github.com/imirkin/mesa/commits/fp64-4
>
> This branch also includes Dave's preliminary
As I said earlier on this thread, it's not that simple: u_math.c depends on
u_cpu_detect.c and more. I wish it was a matter of merely moving u_math.[ch]
to src/util, but it's not.
And because I don't believe I have the time to untangle u_math.[ch] from
everything else, I'm restrictied to more
On Sun, Feb 8, 2015 at 11:37 AM, Ilia Mirkin wrote:
> On Sun, Feb 8, 2015 at 2:29 PM, Matt Turner wrote:
>>> + case ir_unop_d2b:
>>> + assert(op[0]->type->base_type == GLSL_TYPE_DOUBLE);
>>> + for (unsigned c = 0; c < op[0]->type->components(); c++) {
>>> + data.b[c] = op[0]->
On Sun, Feb 8, 2015 at 2:29 PM, Matt Turner wrote:
>> + case ir_unop_d2b:
>> + assert(op[0]->type->base_type == GLSL_TYPE_DOUBLE);
>> + for (unsigned c = 0; c < op[0]->type->components(); c++) {
>> + data.b[c] = op[0]->value.d[c] != 0.0 ? true : false;
>
> ? true : false is a n
On Sun, Feb 8, 2015 at 1:00 AM, Ilia Mirkin wrote:
> @@ -667,32 +679,81 @@ ir_expression::constant_expression_value(struct
> hash_table *variable_context)
> data.b[0] = true;
>}
>break;
> -
> - case ir_unop_trunc:
> + case ir_unop_d2f:
> + assert(op[0]->type->
On Sun, Feb 8, 2015 at 1:00 AM, Ilia Mirkin wrote:
> @@ -886,6 +953,25 @@ ir_constant::get_float_component(unsigned i) const
> case GLSL_TYPE_INT: return (float) this->value.i[i];
> case GLSL_TYPE_FLOAT: return this->value.f[i];
> case GLSL_TYPE_BOOL: return this->value.b[i] ? 1.0f
On Sun, Feb 8, 2015 at 4:52 AM, Francisco Jerez wrote:
> Kenneth Graunke writes:
>
>> On Saturday, February 07, 2015 02:10:19 AM Francisco Jerez wrote:
>>> Matt Turner writes:
>>>
>>> > On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez
>>> > wrote:
>>> >> Scalar registers are required to have ze
It all works fine on nvc0 and softpipe with my branch at
https://github.com/imirkin/mesa/commits/fp64-4
This branch also includes Dave's preliminary work on r600/cayman, not
sure how far along it is, I believe it's still missing a few things.
The nvc0 implementation needs a few more finishing tou
Hi,
How far is glsl compiler working for fp64 shader?
On Sun, Feb 8, 2015 at 4:00 AM, Ilia Mirkin wrote:
> From: Dave Airlie
>
> v2: add define bit (Tapani Pälli)
>
> Patch makes following Piglit tests pass:
>arb_gpu_shader_fp64/preprocessor/define.vert
>arb_gpu_shader_fp64/preprocessor
On Sun, Feb 8, 2015 at 12:04 AM, Jose Fonseca wrote:
> I think we decided not to support unreleased LLVM builds on stable releases.
>
> This is because building without errors is not enough -- there are often
> other changes that need to go with this. Furthermore it's often a moving
> target.
>
>
Just as a hint:
You need to cherry-pick...
commit ef7e0b39a24966526b102643523feac765771842
"gallivm: Update for RTDyldMemoryManager becoming an unique_ptr."
...from mesa upstream to build v10.4.4 successfully.
- Sedat -
On Sat, Feb 7, 2015 at 11:42 PM, Sedat Dilek wrote:
> [ Please CC me I a
Hi,
I was building mesa v10.4.4 with my llvm-toolchain v3.6.0rc2.
My build breaks like this...
...
gallivm/lp_bld_misc.cpp:503:38: error: no viable conversion from
'ShaderMemoryManager *' to 'std::unique_ptr'
builder.setMCJITMemoryManager(MM);
^~
/usr/
Kenneth Graunke writes:
> On Saturday, February 07, 2015 02:10:19 AM Francisco Jerez wrote:
>> Matt Turner writes:
>>
>> > On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez
>> > wrote:
>> >> Scalar registers are required to have zero stride, fix the
>> >> regs_written calculation not to assume
I kind of like the "util_" prefix everywhere. u_math only depends on
p_config.h and p_compiler.h. I don't think it would be hard to move
those two into src/util as well. We have always wanted Mesa to use
more of Gallium. This might be a good start.
Just my 2 cents.
Marek
On Sat, Feb 7, 2015 at 3
From: Tapani Pälli
Patch fixes Piglit test:
arb_gpu_shader_fp64/preprocessor/fs-output-double.frag
and adds additional validation for shader outputs.
Signed-off-by: Tapani Pälli
Signed-off-by: Dave Airlie
---
src/glsl/ast_to_hir.cpp | 45 +
1 fi
From: Dave Airlie
Signed-off-by: Dave Airlie
Reviewed-by: Matt Turner
Reviewed-by: Ian Romanick
---
src/glsl/builtin_type_macros.h | 16 ++
src/glsl/builtin_types.cpp | 30
src/glsl/glsl_parser_extras.h | 5 ++
src/glsl/glsl_types.cpp| 109 +++
From: Dave Airlie
Signed-off-by: Dave Airlie
---
src/glsl/ast.h | 2 ++
src/glsl/ast_function.cpp | 66 +
src/glsl/ast_to_hir.cpp | 33 +++--
src/glsl/glsl_parser_extras.cpp | 4 +++
4 files changed, 90 ins
From: Dave Airlie
v2: add define bit (Tapani Pälli)
Patch makes following Piglit tests pass:
arb_gpu_shader_fp64/preprocessor/define.vert
arb_gpu_shader_fp64/preprocessor/define.frag
Reviewed-by: Ian Romanick
Signed-off-by: Dave Airlie
Reviewed-by: Matt Turner
---
src/glsl/glcpp/glcpp
From: Dave Airlie
Signed-off-by: Dave Airlie
Reviewed-by: Ian Romanick
---
src/glsl/link_uniform_initializers.cpp | 8 +++-
src/glsl/link_varyings.cpp | 3 ++-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/glsl/link_uniform_initializers.cpp
b/src/glsl/link
From: Dave Airlie
Signed-off-by: Dave Airlie
Reviewed-by: Matt Turner
---
src/glsl/opt_algebraic.cpp| 26 ++
src/glsl/opt_constant_propagation.cpp | 3 +++
src/glsl/opt_minmax.cpp | 13 +
3 files changed, 38 insertions(+), 4 deleti
Signed-off-by: Ilia Mirkin
---
src/glsl/tests/uniform_initializer_utils.cpp | 12
1 file changed, 12 insertions(+)
diff --git a/src/glsl/tests/uniform_initializer_utils.cpp
b/src/glsl/tests/uniform_initializer_utils.cpp
index 6f47acd..272266f 100644
--- a/src/glsl/tests/uniform_ini
From: Dave Airlie
Signed-off-by: Dave Airlie
---
src/glsl/link_uniforms.cpp | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index de2f6c9..0abb858 100644
--- a/src/glsl/link_uniforms.cpp
+++ b/src/glsl/link_unif
From: Dave Airlie
This just adds the entries to extensions.c and mtypes.h
v2: use core profile only (Ian)
Signed-off-by: Dave Airlie
Reviewed-by: Ian Romanick
---
src/mesa/main/extensions.c | 1 +
src/mesa/main/mtypes.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/mesa/main/
From: Dave Airlie
This is a helper to return if a type is based on a double.
v2: GLboolean->bool (Ian)
Reviewed-by: Ian Romanick
Signed-off-by: Dave Airlie
---
src/mesa/program/prog_parameter.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/src/mesa/program/prog
From: Dave Airlie
Signed-off-by: Dave Airlie
---
src/glsl/ir_set_program_inouts.cpp | 28
1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/src/glsl/ir_set_program_inouts.cpp
b/src/glsl/ir_set_program_inouts.cpp
index 97ead75..e877a20 100644
--- a/src/
From: Dave Airlie
Just add the xml file covering this extension,
and dummy interface files in mesa, and fix up
sanity tests.
v2:
Enable ProgramUniform*d* from ARB_separate_shader_objects (Ian)
use 40 instead of 43 for dispatch_sanity.cpp (Chris)
uncomment PU sanity tests.
Signed-off-by: Dave Ai
From: Dave Airlie
Signed-off-by: Dave Airlie
Reviewed-by: Matt Turner
Reviewed-by: Ian Romanick
---
src/glsl/ir_clone.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/glsl/ir_clone.cpp b/src/glsl/ir_clone.cpp
index dffa578..5c7279c 100644
--- a/src/glsl/ir_clone.cpp
+++ b/src/glsl/
From: Dave Airlie
This adds support for the new uniform interfaces
from ARB_gpu_shader_fp64.
v2:
support ARB_separate_shader_objects ProgramUniform*d* (Ian)
don't allow boolean uniforms to be updated (issue 15) (Ian)
v3: fix size_mul
v4: Teach uniform update to take into account double precisio
From: Dave Airlie
v2: add d2b, more ir_constant stuff (Ilia)
Signed-off-by: Dave Airlie
---
src/glsl/ir.cpp | 111 ++--
src/glsl/ir.h | 22
src/glsl/ir_validate.cpp| 72 +++---
src/mesa
Signed-off-by: Ilia Mirkin
---
src/glsl/ir_optimization.h | 1 +
src/glsl/lower_instructions.cpp | 279 +++-
2 files changed, 279 insertions(+), 1 deletion(-)
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
index 9f91e2f..7eb861a 10
This causes a lot of warnings about unchecked type in
switch statements - fix them later.
Signed-off-by: Dave Airlie
Reviewed-by: Matt Turner
---
src/glsl/glsl_types.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/glsl/glsl_types.h b/src/glsl/glsl_types.h
index 441015c..f0d4ea8 100644
This is v3 of the patchset which includes fixes based on Ian's
feedback with the exception of his comment on patch 23 (glsl: validate
output types for shader stages), i.e. whether it needs to exist at all
and isn't that being checked elsewhere. I am unfortunately not
familiar enough with the overal
From: Dave Airlie
Signed-off-by: Dave Airlie
Reviewed-by: Ian Romanick
---
src/glsl/lower_mat_op_to_vec.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/glsl/lower_mat_op_to_vec.cpp b/src/glsl/lower_mat_op_to_vec.cpp
index 105ee0d..dda754f 100644
--- a/src/glsl/lower_mat_op_to_vec
From: Dave Airlie
This implements the bulk of the builtin functions for fp64 support.
Signed-off-by: Dave Airlie
---
src/glsl/builtin_functions.cpp | 751 +++--
1 file changed, 492 insertions(+), 259 deletions(-)
diff --git a/src/glsl/builtin_functions.cpp
From: Dave Airlie
Signed-off-by: Dave Airlie
---
src/glsl/loop_controls.cpp | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/glsl/loop_controls.cpp b/src/glsl/loop_controls.cpp
index 1c1d34f..2459fc1 100644
--- a/src/glsl/loop_controls.cpp
+++ b/src/glsl/loop_cont
From: Dave Airlie
Signed-off-by: Dave Airlie
Reviewed-by: Ian Romanick
---
src/glsl/glsl_lexer.ll | 31 +++
1 file changed, 27 insertions(+), 4 deletions(-)
diff --git a/src/glsl/glsl_lexer.ll b/src/glsl/glsl_lexer.ll
index 57c46be..7656e42 100644
--- a/src/glsl/gl
From: Dave Airlie
These lowering passes are optional for the backend to request, currently
the TGSI softpipe backend most likely the r600g backend would want to use
these passes as is. They aim to hit the gallium opcodes from the standard
rounding/truncation functions.
v2: also lower floor in mo
From: Dave Airlie
Signed-off-by: Dave Airlie
Reviewed-by: Matt Turner
Reviewed-by: Ian Romanick
---
src/glsl/glsl_parser.yy | 33 +
1 file changed, 29 insertions(+), 4 deletions(-)
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index 7fb8c38..5
From: Dave Airlie
Signed-off-by: Dave Airlie
Reviewed-by: Matt Turner
Reviewed-by: Ian Romanick
---
src/glsl/ir_builder.cpp | 23 +++
src/glsl/ir_builder.h | 5 +
2 files changed, 28 insertions(+)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index
From: Dave Airlie
This lowers double dot product and lrp to fma.
Signed-off-by: Dave Airlie
---
src/glsl/lower_instructions.cpp | 65 +
1 file changed, 65 insertions(+)
diff --git a/src/glsl/lower_instructions.cpp b/src/glsl/lower_instructions.cpp
index
From: Dave Airlie
Signed-off-by: Dave Airlie
---
src/glsl/ir_constant_expression.cpp | 247 +++-
1 file changed, 215 insertions(+), 32 deletions(-)
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index 1e8b3a3..2346004 100
From: Dave Airlie
Signed-off-by: Dave Airlie
Reviewed-by: Matt Turner
---
src/glsl/lower_ubo_reference.cpp | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/src/glsl/lower_ubo_reference.cpp b/src/glsl/lower_ubo_reference.cpp
index 43dd067..9d13241 100644
-
From: Dave Airlie
Signed-off-by: Dave Airlie
Reviewed-by: Matt Turner
Reviewed-by: Ian Romanick
---
src/glsl/ir_print_visitor.cpp | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/glsl/ir_print_visitor.cpp b/src/glsl/ir_print_visitor.cpp
index bd39805..3600827 100644
--- a/
From: Dave Airlie
We want to restrict some lowering passes to floats only,
and enable other for doubles.
Signed-off-by: Dave Airlie
---
src/glsl/lower_instructions.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/glsl/lower_instructions.cpp b/src/glsl/lower_ins
On Fri, Feb 6, 2015 at 3:54 AM, Ian Romanick wrote:
> On 02/06/2015 06:56 AM, Ilia Mirkin wrote:
>> From: Dave Airlie
>>
>> Signed-off-by: Dave Airlie
>> ---
>> src/glsl/ir_set_program_inouts.cpp | 28 +---
>> 1 file changed, 25 insertions(+), 3 deletions(-)
>>
>> diff -
On Fri, Feb 6, 2015 at 4:46 AM, Ian Romanick wrote:
> On 02/06/2015 06:56 AM, Ilia Mirkin wrote:
>> From: Dave Airlie
>>
>> These lowering passes are optional for the backend to request, currently
>> the TGSI softpipe backend most likely the r600g backend would want to use
>> these passes as is.
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