https://bugs.freedesktop.org/show_bug.cgi?id=79629
--- Comment #9 from XiongZhang ---
Created attachment 113030
--> https://bugs.freedesktop.org/attachment.cgi?id=113030&action=edit
it should fix this issue
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Glenn,
Fixed in the version of this patch which landed (d36fa601913 on master).
- Chris
On Mon, Feb 2, 2015 at 2:08 PM, Glenn Kennard wrote:
> On Wed, 31 Dec 2014 21:43:51 +0100, Micah Fedke
> wrote:
>
>> ---
>> src/glsl/glcpp/glcpp-parse.y| 3 +++
>> src/glsl/glsl_parser_extras.cpp | 1 +
On Wed, 31 Dec 2014 21:43:51 +0100, Micah Fedke
wrote:
---
src/glsl/glcpp/glcpp-parse.y| 3 +++
src/glsl/glsl_parser_extras.cpp | 1 +
src/glsl/glsl_parser_extras.h | 2 ++
src/mesa/main/extensions.c | 1 +
src/mesa/main/mtypes.h | 1 +
5 files changed, 8 insertions(+)
d
Ok I see. I am not sure if it was good choice from VPG not to support dedicated
region for constant cache, but if that is what it is there is little we can do
for it.
Thank,
Harri
-Original Message-
From: Kenneth Graunke [mailto:kenn...@whitecape.org]
Sent: Wednesday, January 28, 2015
Previously PTHREAD_MUTEX_RECURSIVE_NP had been used on linux for
compatibility with old glibc. Now fall back to the nonstandard
version only if the standard version is not defined. This makes
mesa compile with musl libc.
---
include/c11/threads_posix.h | 11 +--
1 file changed, 5 insertion
On Sun, Feb 1, 2015 at 6:54 PM, Eric Anholt wrote:
> Connor Abbott writes:
>
>> On Sun, Feb 1, 2015 at 4:17 PM, Eric Anholt wrote:
>>> We've probably never seen this ridiculous pattern in the wild, so it
>>> didn't matter.
>>
>> I don't think this pattern is 'ridiculous' at all -- GLSL doesn't h
Connor Abbott writes:
> On Sun, Feb 1, 2015 at 4:17 PM, Eric Anholt wrote:
>> We've probably never seen this ridiculous pattern in the wild, so it
>> didn't matter.
>
> I don't think this pattern is 'ridiculous' at all -- GLSL doesn't have
> a sat operation, so shaders wanting to do a saturate h
On 2015-01-29 20:54:27, Kristian Høgsberg wrote:
> Here's take two of the fast mutex path. This version has a check for
> linux/futex.h and it split into two patches. First patch introduces
> full_mtx_t and updates callers. Second patch adds the inline mtx_t.
>
> Kristian Høgsberg (2):
> mesa
On Sun, Feb 1, 2015 at 2:07 PM, Connor Abbott wrote:
> On Sun, Feb 1, 2015 at 4:17 PM, Eric Anholt wrote:
>> We've probably never seen this ridiculous pattern in the wild, so it
>> didn't matter.
>
> I don't think this pattern is 'ridiculous' at all -- GLSL doesn't have
> a sat operation, so shad
https://bugs.freedesktop.org/show_bug.cgi?id=86837
John changed:
What|Removed |Added
CC||john.etted...@gmail.com
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On Feb 1, 2015 2:07 PM, "Connor Abbott" wrote:
>
> On Sun, Feb 1, 2015 at 4:17 PM, Eric Anholt wrote:
> > We've probably never seen this ridiculous pattern in the wild, so it
> > didn't matter.
>
> I don't think this pattern is 'ridiculous' at all -- GLSL doesn't have
> a sat operation, so shader
On Sun, Feb 1, 2015 at 5:06 PM, Marek Olšák wrote:
> No. The image descriptor really has 8 dwords, therefore the slot can
> contain either a texture or a buffer, but not both.
Gotcha. Seemed like a typo, so figured I'd point it out. Sounds like
it was intentional though.
_
Yes. I think the tests should segfault on most drivers, because they
test something that has never been used before.
Marek
On Sun, Feb 1, 2015 at 9:10 PM, Glenn Kennard wrote:
> On Sun, 01 Feb 2015 18:15:53 +0100, Marek Olšák wrote:
>
>> From: Marek Olšák
>>
>> ---
>> src/gallium/auxiliary/tg
On Sun, Feb 1, 2015 at 4:17 PM, Eric Anholt wrote:
> We've probably never seen this ridiculous pattern in the wild, so it
> didn't matter.
I don't think this pattern is 'ridiculous' at all -- GLSL doesn't have
a sat operation, so shaders wanting to do a saturate have to do this
already. Rather, w
Wow...
Reviewed-by: Jason Ekstrand
On Feb 1, 2015 1:17 PM, "Eric Anholt" wrote:
> ---
> src/glsl/nir/nir_algebraic.py | 9 +++--
> 1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/src/glsl/nir/nir_algebraic.py b/src/glsl/nir/nir_algebraic.py
> index ea7f5fc..4929745 100644
No. The image descriptor really has 8 dwords, therefore the slot can
contain either a texture or a buffer, but not both.
The "NULL" descriptor is different for buffers and textures, therefore
it seemed textures and buffers couldn't occupy the same slot if we
wanted to have both. Since the last 4 d
Reviewed-by: Jason Ekstrand
On Feb 1, 2015 1:17 PM, "Eric Anholt" wrote:
> We've probably never seen this ridiculous pattern in the wild, so it
> didn't matter.
> ---
> src/glsl/nir/nir_opt_algebraic.py | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/glsl/nir/nir_op
https://bugs.freedesktop.org/show_bug.cgi?id=5
Chris Forbes changed:
What|Removed |Added
CC||chr...@ijw.co.nz
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I think this logic should be flipped around... you should have a flag
'lower_sub' which is false for vc4 but true for i965, and then if the
flag is true we lower sub to add+neg and if false we try and
reconstruct sub (and do other things like pulling neg's out of
multiplies). That way, eventually w
I don't think it matters.
Generally, all drivers should support mapping all formats, but some
drivers can't map certain formats with more than 1 sample.
Marek
On Sun, Feb 1, 2015 at 8:28 PM, Axel Davy wrote:
> I checked, and the application is allowed to lock the backbuffer if it
> specified a
I'm pretty happy with how it turned out. What I'm not sure on is that
I've got a couple of places where I replicated another transformation,
like fsat(fsat(a)) -> fsat(a) but with a lowered fsat. I could see
potentially having only the canonical form appear in nir_opt_algebraic,
and I'd have two
vc4 cse/algebraic-disabled stats:
total uniforms in shared programs: 13972 -> 13966 (-0.04%)
uniforms in affected programs: 408 -> 402 (-1.47%)
total instructions in shared programs: 44973 -> 44911 (-0.14%)
instructions in affected programs: 1551 -> 1489 (-4.00%)
---
src/gallium/drivers/vc
No effect on vc4 shader-db.
---
src/glsl/nir/nir_opt_algebraic.py | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 9542ef3..fc7e47c 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.
We've probably never seen this ridiculous pattern in the wild, so it
didn't matter.
---
src/glsl/nir/nir_opt_algebraic.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 8a14fe0..84c60ec 100644
--- a/s
---
src/glsl/nir/nir_algebraic.py | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/src/glsl/nir/nir_algebraic.py b/src/glsl/nir/nir_algebraic.py
index ea7f5fc..4929745 100644
--- a/src/glsl/nir/nir_algebraic.py
+++ b/src/glsl/nir/nir_algebraic.py
@@ -179,10 +179,7 @@ st
vc4 cse/algebraic-disabled stats:
total instructions in shared programs: 44356 -> 44354 (-0.00%)
instructions in affected programs: 55 -> 53 (-3.64%)
---
src/gallium/drivers/vc4/vc4_program.c | 1 +
src/glsl/nir/nir.h| 1 +
src/glsl/nir/nir_opt_algebraic.py | 3 ++-
3 f
vc4 cse/algebraic-disabled stats:
total uniforms in shared programs: 13966 -> 13791 (-1.25%)
uniforms in affected programs: 435 -> 260 (-40.23%)
total instructions in shared programs: 44732 -> 44356 (-0.84%)
instructions in affected programs: 9599 -> 9223 (-3.92%)
---
src/gallium/drivers/v
vc4 cse/algebraic-disabled stats:
total instructions in shared programs: 44911 -> 44732 (-0.40%)
instructions in affected programs: 11371 -> 11192 (-1.57%)
---
src/gallium/drivers/vc4/vc4_program.c | 1 +
src/glsl/nir/nir.h| 2 ++
src/glsl/nir/nir_opt_algebraic.py | 1
Mesa has a shader compiler struct flagging whether GLSL IR's opt_algebraic
and other passes should try and generate certain types of opcodes or
patterns. Extend that to NIR by defining our own struct, which is
automatically generated from the Mesa struct in glsl_to_nir and provided
directly by the
This could be done in a separate pass like we do in GLSL IR, but it seems
to me like having the definitions of the transformations in the two
directions next to each other makes a lot of sense.
---
src/glsl/nir/nir_opt_algebraic.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/glsl/nir/n
https://bugs.freedesktop.org/show_bug.cgi?id=5
Felix Schwarz changed:
What|Removed |Added
CC||felix.schwarz@oss.schwarz.e
https://bugs.freedesktop.org/show_bug.cgi?id=5
--- Comment #1 from Felix Schwarz ---
This works for me on r600g but I see a crash in your reproducer on Intel (gen4)
using both mesa 10.4.2. Problem might be specific to Intel.
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On Sun, 01 Feb 2015 18:15:53 +0100, Marek Olšák wrote:
From: Marek Olšák
---
src/gallium/auxiliary/tgsi/tgsi_parse.c | 12
src/gallium/auxiliary/tgsi/tgsi_parse.h | 2 ++
src/gallium/drivers/radeon/r600_pipe_common.c | 11 ---
3 files changed, 14 insertions(
On Sun, 01 Feb 2015 18:36:58 +0100, Marek Olšák wrote:
From: Marek Olšák
The FILLED_SIZE counter is uninitialized at the beginning, so we can't
use it.
Instead, use offset = 0, which is what we always do when not appending.
This unexpectedly fixes spec/ARB_texture_multisample/sample-posit
https://bugs.freedesktop.org/show_bug.cgi?id=87076
Laurent carlier changed:
What|Removed |Added
CC||v10la...@myway.de
--- Comment #3 from
I checked, and the application is allowed to lock the backbuffer if it
specified a specific flag.
However it seems locking a multisampled buffer is forbidden.
So probably here the PIPE_BIND_TRANSFER_* flags could be removed for
multisampling,
should I add that behaviour ? Does it matter for s
Ian Romanick writes:
> On 02/01/2015 01:15 PM, Francisco Jerez wrote:
>> Ian Romanick writes:
>>
>>> On 01/31/2015 09:54 PM, Francisco Jerez wrote:
---
src/glsl/ast_to_hir.cpp | 12
1 file changed, 12 insertions(+)
diff --git a/src/glsl/ast_to_hir.cpp b/sr
On Sun, Feb 1, 2015 at 12:37 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> This will allow supporting NULL textures.
> ---
> src/gallium/drivers/radeonsi/si_descriptors.c | 2 +-
> src/gallium/drivers/radeonsi/si_pipe.h| 2 ++
> src/gallium/drivers/radeonsi/si_shader.c | 4 ++--
>
One more thing. Polygon stippling should be disabled for lines and
points (if a GS is bound, the GS out primitive matters).
BTW, I have sent out a patch that adds the ability to specify a fixed
texture slot for u_pstipple.
Marek
On Sat, Jan 31, 2015 at 1:42 AM, Marek Olšák wrote:
> Hi Dave,
>
>
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_descriptors.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
b/src/gallium/drivers/radeonsi/si_descriptors.c
index 15b4da1..372782f 100644
--- a/src/gallium/drivers/radeonsi/
From: Marek Olšák
Fixes piglit ARB_base_instance/arb_base_instance-drawarrays.
Cc: 10.3 10.4
---
src/gallium/drivers/radeonsi/si_shader.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader
Patch summary:
These are bug fixes and one cleanup patch:
r600g,radeonsi: don't append to streamout buffers that haven't been used yet
radeonsi: fix instanced arrays with non-zero start instance
radeonsi: don't use tgsi_parse_context to get processor type
We previously supported NULL buffer
From: Marek Olšák
This used to hang.
---
src/gallium/drivers/radeonsi/si_descriptors.c | 30 +--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
b/src/gallium/drivers/radeonsi/si_descriptors.c
index 372782f..81
From: Marek Olšák
The stipple texture is bound to slot 16, so there are 17 sampler states and
34 sampler views now (17 normal slots + 17 fmask slots).
---
src/gallium/drivers/radeonsi/si_pipe.c | 2 +
src/gallium/drivers/radeonsi/si_pipe.h | 1 +
src/gallium/drivers/radeonsi/
From: Marek Olšák
We need a slot for the stipple texture and the pixel shader already uses
32 textures (16 API slots + 16 FMASK slots).
---
src/gallium/drivers/radeonsi/si_descriptors.c | 64 +--
src/gallium/drivers/radeonsi/si_state.h | 4 +-
2 files changed, 34 i
From: Marek Olšák
This will allow supporting NULL textures.
---
src/gallium/drivers/radeonsi/si_descriptors.c | 2 +-
src/gallium/drivers/radeonsi/si_pipe.h| 2 ++
src/gallium/drivers/radeonsi/si_shader.c | 4 ++--
src/gallium/drivers/radeonsi/si_state.c | 8
4 files
From: Marek Olšák
The hardware obeys swizzles even if the resource is NULL.
This will be used by set_polygon_stipple.
---
src/gallium/drivers/radeonsi/si_descriptors.c | 13 +
src/gallium/drivers/radeonsi/si_state.c | 15 +--
2 files changed, 22 insertions(+), 6 del
From: Marek Olšák
I will need this for polygon stippling.
---
src/gallium/drivers/radeonsi/si_pipe.h | 1 +
src/gallium/drivers/radeonsi/si_state_draw.c | 29 +++-
2 files changed, 17 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_pipe
From: Marek Olšák
The FILLED_SIZE counter is uninitialized at the beginning, so we can't use it.
Instead, use offset = 0, which is what we always do when not appending.
This unexpectedly fixes spec/ARB_texture_multisample/sample-position/*.
Yes, the test does use transform feedback.
Cc: 10.3 10
From: Marek Olšák
Also remove unused "tokens".
---
src/gallium/drivers/radeonsi/si_shader.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 4b1279c..52f1fa4 100644
--- a/src/gall
From: Marek Olšák
Same as u_bit_scan, but for uint64_t.
---
src/gallium/auxiliary/util/u_math.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/gallium/auxiliary/util/u_math.h
b/src/gallium/auxiliary/util/u_math.h
index 19c7343..f5d3487 100644
--- a/src/gallium/auxiliary/util/u_m
From: Marek Olšák
For drivers that use higher slots not to crash in tgsi_shader_info.
---
src/gallium/include/pipe/p_state.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/include/pipe/p_state.h
b/src/gallium/include/pipe/p_state.h
index 43bc48b..e15860c 100644
From: Marek Olšák
E.g. r600g can use slot 17, which is outside of the API range.
---
src/gallium/auxiliary/util/u_pstipple.c| 25 ++---
src/gallium/auxiliary/util/u_pstipple.h| 3 ++-
src/gallium/drivers/softpipe/sp_state_shader.c | 2 +-
3 files changed, 21
From: Marek Olšák
---
src/gallium/auxiliary/tgsi/tgsi_parse.c | 12
src/gallium/auxiliary/tgsi/tgsi_parse.h | 2 ++
src/gallium/drivers/radeon/r600_pipe_common.c | 11 ---
3 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/src/gallium/auxiliary/tgs
From: Marek Olšák
---
src/gallium/auxiliary/target-helpers/inline_debug_helper.h | 4
src/gallium/auxiliary/util/u_tests.c | 9 -
src/gallium/auxiliary/util/u_tests.h | 4 ++--
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git
From: Marek Olšák
It shouldn't crash the GPU and it should return (0, 0, 0, 1).
This is r300 behavior, so I assume it's also DX9 behavior.
Radeonsi can support this easily.
---
src/gallium/auxiliary/util/u_tests.c | 39
1 file changed, 39 insertions(+)
diff
From: Marek Olšák
This expects (0,0,0,0), though it can be changed to something else or allow
more than one set of values to be considered correct.
This is currently the radeonsi behavior.
---
src/gallium/auxiliary/util/u_tests.c | 57
1 file changed, 57 ins
From: Marek Olšák
---
src/gallium/auxiliary/util/u_simple_shaders.c | 12 ++---
src/gallium/auxiliary/util/u_tests.c | 37 +--
2 files changed, 38 insertions(+), 11 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_simple_shaders.c
b/src/gallium/auxili
From: Marek Olšák
---
src/gallium/auxiliary/util/u_tests.c | 110 +--
1 file changed, 79 insertions(+), 31 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_tests.c
b/src/gallium/auxiliary/util/u_tests.c
index 764c4c3..89ae840 100644
--- a/src/gallium/auxil
On Sun, 01 Feb 2015 16:18:51 +0100, Ilia Mirkin
wrote:
Signed-off-by: Ilia Mirkin
---
src/mapi/glapi/gen/gl_API.xml | 11 +++
src/mesa/main/polygon.c | 6 ++
src/mesa/main/polygon.h | 5 -
src/mesa/main/tests/dispatch_sanity.cpp |
On Sun, Feb 1, 2015 at 10:18 AM, Ilia Mirkin wrote:
> Signed-off-by: Ilia Mirkin
> ---
>
> Thoroughly untested, beyond compilation. Don't have the HW, nor am I
> particularly familiar with the i965 driver in general. Should be easy enough
> to test though for someone with the hw.
>
> src/mesa/dr
On Sun, Feb 1, 2015 at 10:18 AM, Ilia Mirkin wrote:
> diff --git a/src/mesa/main/polygon.c b/src/mesa/main/polygon.c
> index e3b9073..2aa8f31 100644
> --- a/src/mesa/main/polygon.c
> +++ b/src/mesa/main/polygon.c
> @@ -235,25 +235,33 @@ _mesa_GetPolygonStipple( GLubyte *dest )
> _mesa_GetnPoly
Signed-off-by: Ilia Mirkin
---
v1 -> v2:
- rely on cap rather than turning it on for everything
docs/relnotes/10.5.0.html | 2 +-
src/mesa/state_tracker/st_atom_rasterizer.c | 1 +
src/mesa/state_tracker/st_extensions.c | 1 +
3 files changed, 3 insertions(+), 1 deletion
Signed-off-by: Ilia Mirkin
---
Thoroughly untested, beyond compilation. Don't have the HW, nor am I
particularly familiar with the i965 driver in general. Should be easy enough
to test though for someone with the hw.
src/mesa/drivers/dri/i965/brw_clip.c | 1 +
src/mesa/drivers/dri/i96
Replace the hard-coded 0's with the context clamp value.
Signed-off-by: Ilia Mirkin
---
docs/relnotes/10.5.0.html| 1 +
src/mesa/drivers/dri/i965/gen6_sf_state.c| 2 +-
src/mesa/drivers/dri/i965/gen7_sf_state.c| 2 +-
src/mesa/drivers/dri/i965/gen8_sf_state.c| 2 +
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/freedreno/freedreno_screen.c | 1 +
src/gallium/drivers/i915/i915_screen.c | 1 +
src/gallium/drivers/ilo/ilo_screen.c | 2 ++
src/gallium/drivers/llvmpipe/lp_screen.c | 2 ++
src/gallium/drivers/nouveau/nv30/nv30_sc
Signed-off-by: Ilia Mirkin
---
src/mapi/glapi/gen/gl_API.xml | 11 +++
src/mesa/main/polygon.c | 6 ++
src/mesa/main/polygon.h | 5 -
src/mesa/main/tests/dispatch_sanity.cpp | 3 +++
4 files changed, 24 insertions(+), 1 deletion(-)
dif
Nothing enables the extension yet, but the values are now available.
The spec calls for it to only be exposed for GL 3.3+, which is core-only
in mesa. Instead we allow any driver to enable it, including in a compat
context for any GL version.
Signed-off-by: Ilia Mirkin
---
v1 -> v2:
- removed c
On 02/01/2015 01:15 PM, Francisco Jerez wrote:
> Ian Romanick writes:
>
>> On 01/31/2015 09:54 PM, Francisco Jerez wrote:
>>> ---
>>> src/glsl/ast_to_hir.cpp | 12
>>> 1 file changed, 12 insertions(+)
>>>
>>> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
>>> index 1
Ian Romanick writes:
> On 01/31/2015 09:54 PM, Francisco Jerez wrote:
>> Cubemap array images are unlike cubemap array samplers in that they don't
>> need
>> an additional coordinate to index individual cubemaps in the array, instead
>> they behave like a 2D array of 6n layers, with n the number
Ian Romanick writes:
> On 01/31/2015 09:54 PM, Francisco Jerez wrote:
>> ---
>> src/glsl/ast_to_hir.cpp | 12
>> 1 file changed, 12 insertions(+)
>>
>> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
>> index 1ba29f7..783384e 100644
>> --- a/src/glsl/ast_to_hir.cpp
>
On 01/31/2015 09:54 PM, Francisco Jerez wrote:
> ---
> src/glsl/ast_to_hir.cpp | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> index 1ba29f7..783384e 100644
> --- a/src/glsl/ast_to_hir.cpp
> +++ b/src/glsl/ast_to_hir.cpp
>
This patch is
Reviewed-by: Ian Romanick
On 01/31/2015 09:54 PM, Francisco Jerez wrote:
> The spec doesn't define any opaque type constructors.
> ---
> src/glsl/ast_function.cpp | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/glsl/ast_function.cpp b/src/glsl/a
On 01/31/2015 09:54 PM, Francisco Jerez wrote:
> Cubemap array images are unlike cubemap array samplers in that they don't need
> an additional coordinate to index individual cubemaps in the array, instead
> they behave like a 2D array of 6n layers, with n the number of cubemaps in the
> array. Ta
https://bugs.freedesktop.org/show_bug.cgi?id=84019
Martin Peres changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
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