Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.338 -> 1.339
---
Log message:
Allow targets to custom lower their own intrinsics if desired.
---
Diffs of the changes: (+7 -0)
LegalizeDAG.cpp |7 +++
1 files changed, 7 insertions(+)
Index: llvm/lib/C
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.283 -> 1.284
---
Log message:
Add ISD::isBuildVectorAllZeros predicate
---
Diffs of the changes: (+24 -0)
SelectionDAG.cpp | 24
1 files changed, 24 insertions(+)
Index: llvm/lib/Cod
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.121 -> 1.122
---
Log message:
Add ISD::isBuildVectorAllZeros predicate
---
Diffs of the changes: (+4 -1)
SelectionDAGNodes.h |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/include/llv
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.112 -> 1.113
PPCISelLowering.h updated: 1.33 -> 1.34
PPCInstrAltivec.td updated: 1.8 -> 1.9
---
Log message:
Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead
---
Diffs of the changes: (+6 -34)
PPCISe
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.132 -> 1.133
X86ISelLowering.h updated: 1.43 -> 1.44
X86InstrSSE.td updated: 1.31 -> 1.32
---
Log message:
Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes /
cleanups
---
Diffs of the changes:
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.59 -> 1.60
---
Log message:
Add immAllZerosV helper
---
Diffs of the changes: (+3 -0)
TargetSelectionDAG.td |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Tar
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.177 -> 1.178
PPCISelLowering.cpp updated: 1.113 -> 1.114
PPCISelLowering.h updated: 1.34 -> 1.35
PPCInstrAltivec.td updated: 1.9 -> 1.10
PPCInstrInfo.td updated: 1.211 -> 1.212
---
Log message:
Codegen vector predicate
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.73 -> 1.74
---
Log message:
Readme note
---
Diffs of the changes: (+7 -0)
README.txt |7 +++
1 files changed, 7 insertions(+)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.73 llvm/lib
Changes in directory llvm/include/llvm/CodeGen:
MachineDebugInfo.h updated: 1.31 -> 1.32
---
Log message:
How to be dumb on $5/day. Need a tri-state to track valid debug descriptors.
---
Diffs of the changes: (+11 -6)
MachineDebugInfo.h | 17 +++--
1 files changed, 11 insert
Changes in directory llvm/lib/VMCore:
IntrinsicInst.cpp updated: 1.3 -> 1.4
---
Log message:
Bullet proof against undefined args produced by upgrading ols-style debug info.
---
Diffs of the changes: (+3 -3)
IntrinsicInst.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.205 -> 1.206
---
Log message:
Bullet proof against undefined args produced by upgrading ols-style debug info.
---
Diffs of the changes: (+5 -4)
SelectionDAGISel.cpp |9 +
1 files changed, 5 inse
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.10 -> 1.11
---
Log message:
add vsel
---
Diffs of the changes: (+4 -0)
PPCInstrAltivec.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCInstrAltivec.td
diff -u llvm/lib/Target/Po
Changes in directory llvm/lib/CodeGen:
MachineDebugInfo.cpp updated: 1.33 -> 1.34
---
Log message:
How to be dumb on $5/day. Need a tri-state to track valid debug descriptors.
---
Diffs of the changes: (+27 -24)
MachineDebugInfo.cpp | 51 +++--
The original note for implementing this (which I wrote) indicated that
this should only be done for very small memory blocks, probably < 8
bytes, but certainly less than 64. I don't know what the magic number is
where there's a tradeoff and its probably different for different
targets, but certainl
Changes in directory llvm/lib/Target/Sparc:
SparcISelDAGToDAG.cpp updated: 1.90 -> 1.91
---
Log message:
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGISel.h updated: 1.11 -> 1.12
---
Log message:
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approac
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.206 -> 1.207
---
Log message:
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.133 -> 1.134
X86TargetMachine.cpp updated: 1.110 -> 1.111
---
Log message:
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
sea
Changes in directory llvm-test:
Makefile.programs updated: 1.201 -> 1.202
---
Log message:
Make disable-lower-switch the default tonight for x86
---
Diffs of the changes: (+1 -1)
Makefile.programs |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm-test/Makefile.program
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.114 -> 1.115
---
Log message:
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approa
Changes in directory llvm/lib/CodeGen:
MachineDebugInfo.cpp updated: 1.34 -> 1.35
---
Log message:
Pass llvm/test/Regression/CodeGen/Generic/debug-info.ll.
---
Diffs of the changes: (+7 -0)
MachineDebugInfo.cpp |7 +++
1 files changed, 7 insertions(+)
Index: llvm/lib/CodeGen/Mach
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.11 -> 1.12
PPCInstrFormats.td updated: 1.69 -> 1.70
---
Log message:
Fix the JIT encoding of VSPLTI*
---
Diffs of the changes: (+24 -9)
PPCInstrAltivec.td | 18 +-
PPCInstrFormats.td | 15 ++
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.12 -> 1.13
PPCInstrFormats.td updated: 1.70 -> 1.71
---
Log message:
Fix the JIT encoding of VSEL
---
Diffs of the changes: (+24 -4)
PPCInstrAltivec.td |8
PPCInstrFormats.td | 20 +++
Changes in directory llvm/lib/Transforms/Utils:
ValueMapper.cpp updated: 1.21 -> 1.22
---
Log message:
teach the inliner to work with packed constants
---
Diffs of the changes: (+19 -0)
ValueMapper.cpp | 19 +++
1 files changed, 19 insertions(+)
Index: llvm/lib/Transfor
Changes in directory llvm-test/SingleSource/UnitTests/Vector/Altivec:
---
Log message:
Directory
/home/vadve/shared/PublicCVS/llvm-test/SingleSource/UnitTests/Vector/Altivec
added to the repository
---
Diffs of the changes: (+0 -0)
0 files changed
_
Changes in directory llvm-test/SingleSource/UnitTests/Vector/Altivec:
Makefile added (r1.1)
test1.c added (r1.1)
---
Log message:
Add an altivec-specific test for altivec intrinsics
---
Diffs of the changes: (+64 -0)
Makefile |8
test1.c | 56 ++
Changes in directory llvm-test/SingleSource/UnitTests/Vector:
Makefile updated: 1.1 -> 1.2
---
Log message:
Run altivec tests on PPC systems
---
Diffs of the changes: (+8 -1)
Makefile |9 -
1 files changed, 8 insertions(+), 1 deletion(-)
Index: llvm-test/SingleSource/UnitTest
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.284 -> 1.285
---
Log message:
Instead of printing "INTRINSIC" on intrinsic node, print the intrinsic name.
---
Diffs of the changes: (+5 -1)
SelectionDAG.cpp |6 +-
1 files changed, 5 insertions(+), 1 d
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.285 -> 1.286
---
Log message:
Change isBuildVectorAllOnesInteger to isBuildVectorAllOnes. Also check for
floating point cases.
---
Diffs of the changes: (+39 -24)
SelectionDAG.cpp | 63 +++
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.122 -> 1.123
---
Log message:
Change isBuildVectorAllOnesInteger to isBuildVectorAllOnes. Also check for
floating point cases.
---
Diffs of the changes: (+2 -2)
SelectionDAGNodes.h |4 ++--
1 files changed,
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.60 -> 1.61
---
Log message:
Changed isBuildVectorAllOnesInteger to isBuildVectorAllOnes.
---
Diffs of the changes: (+1 -1)
TargetSelectionDAG.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/li
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.134 -> 1.135
X86InstrSSE.td updated: 1.32 -> 1.33
---
Log message:
Use pcmpeq to generate vector of all ones.
---
Diffs of the changes: (+15 -0)
X86ISelLowering.cpp |4
X86InstrSSE.td | 11 +++
Changes in directory llvm/lib/Target/PowerPC:
README_ALTIVEC.txt added (r1.1)
README.txt updated: 1.82 -> 1.83
---
Log message:
Split out altivec notes into their own README
---
Diffs of the changes: (+56 -52)
README.txt | 54 +
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.286 -> 1.287
---
Log message:
Incorrect check for FP all one's
---
Diffs of the changes: (+2 -1)
SelectionDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/SelectionDA
Changes in directory llvm/lib/Target/PowerPC:
README_ALTIVEC.txt updated: 1.1 -> 1.2
---
Log message:
Add a bunch of notes from my journey thus far.
---
Diffs of the changes: (+103 -9)
README_ALTIVEC.txt | 112 -
1 files changed, 103 ins
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