Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.283 -> 1.284 --- Log message: Add ISD::isBuildVectorAllZeros predicate --- Diffs of the changes: (+24 -0) SelectionDAG.cpp | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.283 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.284 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.283 Sat Mar 25 16:59:28 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sun Mar 26 03:50:58 2006 @@ -101,6 +101,30 @@ } +/// isBuildVectorAllZeros - Return true if the specified node is a +/// BUILD_VECTOR where all of the elements are 0 or undef. +bool ISD::isBuildVectorAllZeros(const SDNode *N) { + if (N->getOpcode() != ISD::BUILD_VECTOR) return false; + + bool AllUndef = true; + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { + SDOperand Elt = N->getOperand(i); + if (Elt.getOpcode() != ISD::UNDEF) { + AllUndef = false; + if (isa<ConstantSDNode>(Elt)) { + if (!cast<ConstantSDNode>(Elt)->isNullValue()) + return false; + } else if (isa<ConstantFPSDNode>(Elt)) { + if (!cast<ConstantFPSDNode>(Elt)->isExactlyValue(0.0)) + return false; + } else + return false; + } + } + + return !AllUndef; +} + /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) /// when given the operation for (X op Y). ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits