Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.112 -> 1.113
PPCISelLowering.h updated: 1.33 -> 1.34
PPCInstrAltivec.td updated: 1.8 -> 1.9
---
Log message:
Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead
---
Diffs of the changes: (+6 -34)
PPCISelLowering.cpp | 24 ++----------------------
PPCISelLowering.h | 4 ----
PPCInstrAltivec.td | 12 ++++--------
3 files changed, 6 insertions(+), 34 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.112
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.113
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.112 Sat Mar 25 01:39:07 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Sun Mar 26 03:52:32 2006
@@ -279,26 +279,6 @@
return cast<ConstantSDNode>(N->getOperand(0))->getValue();
}
-/// isZeroVector - Return true if this build_vector is an all-zero vector.
-///
-bool PPC::isZeroVector(SDNode *N) {
- if (MVT::isInteger(N->getOperand(0).getValueType())) {
- for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
- if (!isa<ConstantSDNode>(N->getOperand(i)) ||
- cast<ConstantSDNode>(N->getOperand(i))->getValue() != 0)
- return false;
- } else {
- assert(MVT::isFloatingPoint(N->getOperand(0).getValueType()) &&
- "Vector of non-int, non-float values?");
- // See if this is all zeros.
- for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
- if (!isa<ConstantFPSDNode>(N->getOperand(i)) ||
- !cast<ConstantFPSDNode>(N->getOperand(i))->isExactlyValue(0.0))
- return false;
- }
- return true;
-}
-
/// isVecSplatImm - Return true if this is a build_vector of constants which
/// can be formed by using a vspltis[bhw] instruction. The ByteSize field
/// indicates the number of bytes of each element [124] -> [bhw].
@@ -347,7 +327,7 @@
int ShAmt = (4-ByteSize)*8;
int MaskVal = ((int)Value << ShAmt) >> ShAmt;
- // If this is zero, don't match, zero matches isZeroVector.
+ // If this is zero, don't match, zero matches ISD::isBuildVectorAllZeros.
if (MaskVal == 0) return false;
if (Val) *Val = MaskVal;
@@ -721,7 +701,7 @@
// See if this is all zeros.
// FIXME: We should handle splat(-0.0), and other cases here.
- if (PPC::isZeroVector(Op.Val))
+ if (ISD::isBuildVectorAllZeros(Op.Val))
return Op;
if (PPC::isVecSplatImm(Op.Val, 1) || // vspltisb
Index: llvm/lib/Target/PowerPC/PPCISelLowering.h
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.33
llvm/lib/Target/PowerPC/PPCISelLowering.h:1.34
--- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.33 Sat Mar 25 00:12:06 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.h Sun Mar 26 03:52:32 2006
@@ -102,10 +102,6 @@
/// specified isSplatShuffleMask VECTOR_SHUFFLE mask.
unsigned getVSPLTImmediate(SDNode *N);
- /// isZeroVector - Return true if this build_vector is an all-zero vector.
- ///
- bool isZeroVector(SDNode *N);
-
/// isVecSplatImm - Return true if this is a build_vector of constants
which
/// can be formed by using a vspltis[bhw] instruction. The ByteSize field
/// indicates the number of bytes of each element [124] -> [bhw].
Index: llvm/lib/Target/PowerPC/PPCInstrAltivec.td
diff -u llvm/lib/Target/PowerPC/PPCInstrAltivec.td:1.8
llvm/lib/Target/PowerPC/PPCInstrAltivec.td:1.9
--- llvm/lib/Target/PowerPC/PPCInstrAltivec.td:1.8 Sat Mar 25 22:57:17 2006
+++ llvm/lib/Target/PowerPC/PPCInstrAltivec.td Sun Mar 26 03:52:32 2006
@@ -24,10 +24,6 @@
return PPC::isSplatShuffleMask(N);
}], VSPLT_get_imm>;
-def vecimm0 : PatLeaf<(build_vector), [{
- return PPC::isZeroVector(N);
-}]>;
-
// VSPLTISB_get_imm xform function: convert build_vector to VSPLTISB imm.
def VSPLTISB_get_imm : SDNodeXForm<build_vector, [{
@@ -404,7 +400,7 @@
def V_SET0 : VXForm_setzero<1220, (ops VRRC:$vD),
"vxor $vD, $vD, $vD", VecFP,
- [(set VRRC:$vD, (v4f32 vecimm0))]>;
+ [(set VRRC:$vD, (v4f32 immAllZerosV))]>;
}
//===----------------------------------------------------------------------===//
@@ -415,9 +411,9 @@
def : Pat<(v16i8 (undef)), (v16i8 (IMPLICIT_DEF_VRRC))>;
def : Pat<(v8i16 (undef)), (v8i16 (IMPLICIT_DEF_VRRC))>;
def : Pat<(v4i32 (undef)), (v4i32 (IMPLICIT_DEF_VRRC))>;
-def : Pat<(v16i8 vecimm0), (v16i8 (V_SET0))>;
-def : Pat<(v8i16 vecimm0), (v8i16 (V_SET0))>;
-def : Pat<(v4i32 vecimm0), (v4i32 (V_SET0))>;
+def : Pat<(v16i8 immAllZerosV), (v16i8 (V_SET0))>;
+def : Pat<(v8i16 immAllZerosV), (v8i16 (V_SET0))>;
+def : Pat<(v4i32 immAllZerosV), (v4i32 (V_SET0))>;
// Loads.
def : Pat<(v16i8 (load xoaddr:$src)), (v16i8 (LVX xoaddr:$src))>;
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