Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.80 -> 1.81
---
Log message:
Codegen
bool %test(int %X) {
%Y = seteq int %X, 13
ret bool %Y
}
as
_test:
addi r2, r3, -13
cntlzw r2, r2
srwi r3, r2, 5
blr
rather than
_test:
Changes in directory llvm-www/testresults:
index.html updated: 1.40 -> 1.41
---
Log message:
add v8 tester
---
Diffs of the changes: (+3 -1)
index.html |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index: llvm-www/testresults/index.html
diff -u llvm-www/testresults/index.h
Changes in directory llvm/utils:
NightlyTest.pl updated: 1.101 -> 1.102
---
Log message:
solaris won't clobber an existing symlink with ln -sf apparently
---
Diffs of the changes: (+4 -1)
NightlyTest.pl |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/utils/Night
Changes in directory llvm-test/SingleSource/Benchmarks/Misc-C++:
mandel-text.cpp updated: 1.1 -> 1.2
---
Log message:
allow this test to pass on x86
---
Diffs of the changes: (+5 -0)
mandel-text.cpp |5 +
1 files changed, 5 insertions(+)
Index: llvm-test/SingleSource/Benchmarks/M
Changes in directory llvm/lib/Target/SparcV8:
SparcV8ISelDAGToDAG.cpp updated: 1.73 -> 1.74
---
Log message:
add a missing break that caused a lot of failures last night :(
---
Diffs of the changes: (+1 -0)
SparcV8ISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.298 -> 1.299
---
Log message:
Allow custom lowering of fabs. I forgot to check in this change which
caused several test failures.
---
Diffs of the changes: (+6 -1)
LegalizeDAG.cpp |7 ++-
1 files changed
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.81 -> 1.82
PPCISelLowering.h updated: 1.18 -> 1.19
---
Log message:
add info about the inline asm register constraints for PPC
---
Diffs of the changes: (+60 -0)
PPCISelLowering.cpp | 56
Changes in directory llvm/lib/Target/X86:
X86.td updated: 1.20 -> 1.21
X86ISelLowering.cpp updated: 1.70 -> 1.71
X86ISelLowering.h updated: 1.22 -> 1.23
X86InstrInfo.td updated: 1.224 -> 1.225
X86Subtarget.h updated: 1.9 -> 1.10
---
Log message:
* Fix 80-column violations
* Rename hasSSE -> has
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.32 -> 1.33
---
Log message:
Allow the specification of explicit alignments for constant pool entries.
---
Diffs of the changes: (+4 -2)
IA64ISelDAGToDAG.cpp |6 --
1 files changed, 4 insertions(+), 2 deletio
Changes in directory llvm/include/llvm/CodeGen:
MachineConstantPool.h updated: 1.9 -> 1.10
SelectionDAG.h updated: 1.94 -> 1.95
SelectionDAGNodes.h updated: 1.98 -> 1.99
---
Log message:
Allow the specification of explicit alignments for constant pool entries.
---
Diffs of the changes: (+24
Changes in directory llvm/lib/Target/SparcV8:
SparcV8ISelDAGToDAG.cpp updated: 1.74 -> 1.75
---
Log message:
Allow the specification of explicit alignments for constant pool entries.
---
Diffs of the changes: (+2 -1)
SparcV8ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 d
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.42 -> 1.43
MachineFunction.cpp updated: 1.83 -> 1.84
---
Log message:
Allow the specification of explicit alignments for constant pool entries.
---
Diffs of the changes: (+14 -7)
AsmPrinter.cpp | 14 +-
Mac
Changes in directory llvm/lib/ExecutionEngine/JIT:
JITEmitter.cpp updated: 1.78 -> 1.79
---
Log message:
Allow the specification of explicit alignments for constant pool entries.
---
Diffs of the changes: (+6 -4)
JITEmitter.cpp | 10 ++
1 files changed, 6 insertions(+), 4 deletio
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.82 -> 1.83
---
Log message:
Allow the specification of explicit alignments for constant pool entries.
---
Diffs of the changes: (+3 -2)
PPCISelLowering.cpp |5 +++--
1 files changed, 3 insertions(+), 2 deletio
Changes in directory llvm/lib/Target/Alpha:
AlphaISelLowering.cpp updated: 1.35 -> 1.36
---
Log message:
Allow the specification of explicit alignments for constant pool entries.
---
Diffs of the changes: (+3 -2)
AlphaISelLowering.cpp |5 +++--
1 files changed, 3 insertions(+), 2 delet
Changes in directory llvm/lib/Target/SparcV9:
SparcV9AsmPrinter.cpp updated: 1.127 -> 1.128
---
Log message:
Allow the specification of explicit alignments for constant pool entries.
---
Diffs of the changes: (+8 -5)
SparcV9AsmPrinter.cpp | 13 -
1 files changed, 8 insertions
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.61 -> 1.62
SelectionDAG.cpp updated: 1.250 -> 1.251
---
Log message:
Allow the specification of explicit alignments for constant pool entries.
---
Diffs of the changes: (+16 -9)
ScheduleDAG.cpp |3 ++-
Sele
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.33 -> 1.34
---
Log message:
Remove entries on fabs and fneg. These are done.
---
Diffs of the changes: (+0 -49)
README.txt | 49 -
1 files changed, 49 deletions(-)
Index: llv
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.h updated: 1.4 -> 1.5
X86ISelDAGToDAG.cpp updated: 1.37 -> 1.38
X86ISelLowering.cpp updated: 1.71 -> 1.72
X86ISelLowering.h updated: 1.23 -> 1.24
X86InstrInfo.td updated: 1.225 -> 1.226
X86IntelAsmPrinter.h updated: 1.5 -> 1.6
---
Log me
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.34 -> 1.35
---
Log message:
turning these into 'adds' would require extra copies
---
Diffs of the changes: (+5 -7)
README.txt | 12 +---
1 files changed, 5 insertions(+), 7 deletions(-)
Index: llvm/lib/Target/X86/R
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.72 -> 1.73
---
Log message:
Be smarter about whether to store the SSE return value in memory. If
it is already available in memory, do a fld directly from there.
---
Diffs of the changes: (+16 -9)
X86ISelLowering.cpp
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.35 -> 1.36
---
Log message:
Remove an item. It's done.
---
Diffs of the changes: (+0 -21)
README.txt | 21 -
1 files changed, 21 deletions(-)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Targe
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.73 -> 1.74
---
Log message:
When folding a load into a return of SSE value, check the chain to
ensure the memory location has not been clobbered.
---
Diffs of the changes: (+3 -2)
X86ISelLowering.cpp |5 +++--
1 f
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.50 -> 1.51
---
Log message:
another testcase.
---
Diffs of the changes: (+17 -0)
README.txt | 17 +
1 files changed, 17 insertions(+)
Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/Po
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.74 -> 1.75
---
Log message:
Return's chain should be matching either the chain produced by the
value or the chain going into the load.
---
Diffs of the changes: (+2 -1)
X86ISelLowering.cpp |3 ++-
1 files changed,
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.143 -> 1.144
---
Log message:
adjust to changes in InlineAsm interface. Fix a few minor bugs.
---
Diffs of the changes: (+38 -32)
SelectionDAGISel.cpp | 70 +++
Changes in directory llvm/include/llvm:
InlineAsm.h updated: 1.6 -> 1.7
---
Log message:
Beef up the interface to inline asm constraint parsing, making it more
general, useful, and easier to use.
---
Diffs of the changes: (+27 -3)
InlineAsm.h | 30 +++---
1 files
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.43 -> 1.44
---
Log message:
adjust to changes in InlineAsm interface. Fix a few minor bugs.
---
Diffs of the changes: (+4 -0)
AsmPrinter.cpp |4
1 files changed, 4 insertions(+)
Index: llvm/lib/CodeGen/AsmPrinter.
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.24 -> 1.25
---
Log message:
Beef up the interface to inline asm constraint parsing, making it more general,
useful, and easier to use.
---
Diffs of the changes: (+10 -3)
TargetLowering.cpp | 13 ++---
1 files c
Changes in directory llvm/lib/VMCore:
InlineAsm.cpp updated: 1.5 -> 1.6
---
Log message:
Beef up the interface to inline asm constraint parsing, making it more general,
useful, and easier to use.
---
Diffs of the changes: (+96 -44)
InlineAsm.cpp | 140 +++
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.36 -> 1.37
---
Log message:
Another regression from the pattern isel
---
Diffs of the changes: (+16 -0)
README.txt | 16
1 files changed, 16 insertions(+)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm
Changes in directory llvm/test/Regression/CodeGen/X86:
sse-load-ret.ll added (r1.1)
---
Log message:
new testcase for the 'ret double folding with load' opzn
---
Diffs of the changes: (+19 -0)
sse-load-ret.ll | 19 +++
1 files changed, 19 insertions(+)
Index: llvm/test/
Changes in directory llvm/lib/VMCore:
InlineAsm.cpp updated: 1.6 -> 1.7
---
Log message:
Fix VC++ compilation error.
---
Diffs of the changes: (+1 -0)
InlineAsm.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/VMCore/InlineAsm.cpp
diff -u llvm/lib/VMCore/InlineAsm.cpp:1.6 llv
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.158 -> 1.159
---
Log message:
If a pattern's root node is a constant, its size should be 3 rather than 2.
---
Diffs of the changes: (+4 -0)
DAGISelEmitter.cpp |4
1 files changed, 4 insertions(+)
Index: llvm
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.37 -> 1.38
---
Log message:
Remove another entry.
---
Diffs of the changes: (+0 -5)
README.txt |5 -
1 files changed, 5 deletions(-)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.37 l
Changes in directory llvm/lib/Target/X86:
X86.td updated: 1.21 -> 1.22
X86CodeEmitter.cpp updated: 1.86 -> 1.87
X86InstrInfo.h updated: 1.48 -> 1.49
X86InstrInfo.td updated: 1.226 -> 1.227
---
Log message:
- Use xor to clear integer registers (set R, 0).
- Added a new format for instructions wh
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.38 -> 1.39
---
Log message:
add a note, I'll take care of this after nate commits his big patch
---
Diffs of the changes: (+10 -0)
README.txt | 10 ++
1 files changed, 10 insertions(+)
Index: llvm/lib/Target/X86/RE
Changes in directory llvm-test/MultiSource:
Makefile.multisrc updated: 1.49 -> 1.50
---
Log message:
Link with instead of . This fixes a bunch of link failures on Darwin.
---
Diffs of the changes: (+1 -1)
Makefile.multisrc |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.83 -> 1.84
README.txt updated: 1.51 -> 1.52
---
Log message:
Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
---
Diffs of the changes: (+38 -53
Changes in directory llvm/lib/Target/Alpha:
AlphaISelLowering.cpp updated: 1.36 -> 1.37
---
Log message:
Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
---
Diffs of the changes: (+2 -0)
AlphaISelLowering.cpp |2 ++
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.32 -> 1.33
---
Log message:
Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
---
Diffs of the changes: (+4 -0)
IA64ISelLowering.cpp |4
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.75 -> 1.76
---
Log message:
Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
---
Diffs of the changes: (+2 -0)
X86ISelLowering.cpp |2 ++
1 fi
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.90 -> 1.91
LegalizeDAG.cpp updated: 1.299 -> 1.300
---
Log message:
Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
---
Diffs of the changes:
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