Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.24 -> 1.25 --- Log message: Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use. --- Diffs of the changes: (+10 -3) TargetLowering.cpp | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) Index: llvm/lib/Target/TargetLowering.cpp diff -u llvm/lib/Target/TargetLowering.cpp:1.24 llvm/lib/Target/TargetLowering.cpp:1.25 --- llvm/lib/Target/TargetLowering.cpp:1.24 Sun Jan 29 22:09:04 2006 +++ llvm/lib/Target/TargetLowering.cpp Tue Jan 31 19:29:22 2006 @@ -243,15 +243,22 @@ std::vector<unsigned> TargetLowering:: getRegForInlineAsmConstraint(const std::string &Constraint) const { + // Not a physreg, must not be a register reference or something. + if (Constraint[0] != '{') return std::vector<unsigned>(); + assert(*(Constraint.end()-1) == '}' && "Not a brace enclosed constraint?"); + + // Remove the braces from around the name. + std::string RegName(Constraint.begin()+1, Constraint.end()-1); + // Scan to see if this constraint is a register name. const MRegisterInfo *RI = TM.getRegisterInfo(); for (unsigned i = 1, e = RI->getNumRegs(); i != e; ++i) { if (const char *Name = RI->get(i).Name) - if (StringsEqualNoCase(Constraint, Name)) + if (StringsEqualNoCase(RegName, Name)) return std::vector<unsigned>(1, i); } - - // Not a physreg, must not be a register reference or something. + + // Unknown physreg. return std::vector<unsigned>(); } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits