Changes in directory llvm/lib/Target/SparcV8:
README.txt updated: 1.36 -> 1.37
---
Log message:
add some notes
---
Diffs of the changes: (+10 -1)
README.txt | 11 ++-
1 files changed, 10 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/SparcV8/README.txt
diff -u llvm/lib/Tar
Changes in directory llvm/lib/Target/SparcV8:
SparcV8InstrFormats.td updated: 1.6 -> 1.7
SparcV8InstrInfo.td updated: 1.44 -> 1.45
---
Log message:
Add a couple more instrs
---
Diffs of the changes: (+8 -4)
SparcV8InstrFormats.td |6 --
SparcV8InstrInfo.td|6 --
2 files
Changes in directory llvm/lib/Target/SparcV8:
SparcV8AsmPrinter.cpp updated: 1.39 -> 1.40
---
Log message:
remove some dead code
---
Diffs of the changes: (+0 -22)
SparcV8AsmPrinter.cpp | 22 --
1 files changed, 22 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8
Changes in directory llvm/lib/Target/SparcV8:
SparcV8AsmPrinter.cpp updated: 1.38 -> 1.39
SparcV8InstrInfo.td updated: 1.43 -> 1.44
---
Log message:
asmprint pseudo instrs
---
Diffs of the changes: (+10 -24)
SparcV8AsmPrinter.cpp | 17 -
SparcV8InstrInfo.td | 17 +
Changes in directory llvm/lib/Target/SparcV8:
SparcV8AsmPrinter.cpp updated: 1.37 -> 1.38
SparcV8InstrFormats.td updated: 1.5 -> 1.6
SparcV8InstrInfo.td updated: 1.42 -> 1.43
---
Log message:
Autogenerate asmprinter for F3_2 instructions
---
Diffs of the changes: (+129 -127)
SparcV8AsmPrin
Changes in directory llvm/lib/Target/SparcV8:
SparcV8AsmPrinter.cpp updated: 1.36 -> 1.37
SparcV8InstrFormats.td updated: 1.4 -> 1.5
SparcV8InstrInfo.td updated: 1.41 -> 1.42
---
Log message:
Switch F3_1 instructions over to use AsmStrings
---
Diffs of the changes: (+146 -111)
SparcV8AsmPr
Changes in directory llvm/lib/Target/SparcV8:
Makefile updated: 1.10 -> 1.11
SparcV8AsmPrinter.cpp updated: 1.35 -> 1.36
---
Log message:
Plug in basic hooks for an autogenerated asm printer to fill in.
---
Diffs of the changes: (+19 -14)
Makefile |2 +-
SparcV8AsmPrinter.
Changes in directory llvm/test/Regression/CodeGen/SparcV8:
basictest.ll added (r1.1)
dg.exp added (r1.1)
---
Log message:
A truly trivial testcase to ensure sparcv8 doesn't get completely broken
again.
---
Diffs of the changes: (+9 -0)
basictest.ll |6 ++
dg.exp |3 +++
Changes in directory llvm/lib/Target/SparcV8:
SparcV8InstrFormats.td updated: 1.3 -> 1.4
SparcV8InstrInfo.td updated: 1.40 -> 1.41
---
Log message:
Add operand info for F3_[12] instructions, getting V8 back to basic
functionality.
With this, Regression/CodeGen/SparcV8/basictest.ll now passes.
Changes in directory llvm/test/Regression/CodeGen/SparcV8:
---
Log message:
Directory /home/vadve/shared/PublicCVS/llvm/test/Regression/CodeGen/SparcV8
added to the repository
---
Diffs of the changes: (+0 -0)
0 files changed
___
llvm-commits
Changes in directory llvm/lib/Target/SparcV8:
Makefile updated: 1.9 -> 1.10
SparcV8TargetMachine.cpp updated: 1.31 -> 1.32
SparcV8TargetMachine.h updated: 1.8 -> 1.9
SparcV8CodeEmitter.cpp (r1.6) removed
SparcV8JITInfo.h (r1.2) removed
---
Log message:
Remove JIT support, which doesn't work.
Changes in directory llvm/lib/Target/SparcV8:
SparcV8InstrInfo.td updated: 1.39 -> 1.40
---
Log message:
add some simple operand info
---
Diffs of the changes: (+8 -7)
SparcV8InstrInfo.td | 15 ---
1 files changed, 8 insertions(+), 7 deletions(-)
Index: llvm/lib/Target/Spar
Changes in directory llvm/tools/llc:
llc.cpp updated: 1.118 -> 1.119
---
Log message:
rename option for consistency with -mcpu -mattr etc
---
Diffs of the changes: (+1 -1)
llc.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/tools/llc/llc.cpp
diff -u llvm/tools/l
Changes in directory llvm/tools/lli:
lli.cpp updated: 1.53 -> 1.54
---
Log message:
rename option
---
Diffs of the changes: (+1 -1)
lli.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/tools/lli/lli.cpp
diff -u llvm/tools/lli/lli.cpp:1.53 llvm/tools/lli/lli.cpp:1
Changes in directory llvm/docs/CommandGuide:
llc.pod updated: 1.10 -> 1.11
lli.pod updated: 1.3 -> 1.4
---
Log message:
rename options
---
Diffs of the changes: (+2 -2)
llc.pod |2 +-
lli.pod |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/docs/CommandGuide/ll
Changes in directory llvm/docs/CommandGuide:
llc.pod updated: 1.9 -> 1.10
lli.pod updated: 1.2 -> 1.3
---
Log message:
Document -mcpu -mattr -triple
---
Diffs of the changes: (+45 -18)
llc.pod | 36 +---
lli.pod | 27 ---
2 files
Changes in directory llvm/tools/lli:
lli.cpp updated: 1.52 -> 1.53
---
Log message:
provide an option to override the target triple in a module from the
commandline.
---
Diffs of the changes: (+7 -1)
lli.cpp |8 +++-
1 files changed, 7 insertions(+), 1 deletion(-)
Index: llvm/t
Changes in directory llvm/tools/llc:
llc.cpp updated: 1.117 -> 1.118
---
Log message:
provide an option to override the target triple in a module from the command
line.
---
Diffs of the changes: (+6 -0)
llc.cpp |6 ++
1 files changed, 6 insertions(+)
Index: llvm/tools/llc/llc.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.126 -> 1.127
---
Log message:
Update the darwin handling of linkonce & weak functions and GV stubs. This
should work in all permutations.
---
Diffs of the changes: (+63 -57)
PPCAsmPrinter.cpp | 120
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.17 -> 1.18
---
Log message:
Don't globalize internal functions
---
Diffs of the changes: (+2 -1)
X86ATTAsmPrinter.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ATTAsm
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.25 -> 1.26
---
Log message:
* Promote all 1 bit entities to 8 bit.
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.
---
Diffs of the changes: (+4 -1)
TargetSelectionDAG.td |5 -
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.11 -> 1.12
X86ISelLowering.cpp updated: 1.6 -> 1.7
X86InstrInfo.td updated: 1.168 -> 1.169
---
Log message:
* Promote all 1 bit entities to 8 bit.
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
z
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.68 -> 1.69
---
Log message:
Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support
if after legalize. This fixes IA64 failures.
---
Diffs of the changes: (+4 -2)
DAGCombiner.cpp |6
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.td updated: 1.167 -> 1.168
---
Log message:
Added frameindex, constpool, globaladdr, and externalsym as root nodes of
leaaddr.
---
Diffs of the changes: (+3 -2)
X86InstrInfo.td |5 +++--
1 files changed, 3 insertions(+), 2 deletion
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.24 -> 1.25
---
Log message:
Added constpool, frameindex, and externalsym nodes.
---
Diffs of the changes: (+9 -3)
TargetSelectionDAG.td | 12 +---
1 files changed, 9 insertions(+), 3 deletions(-)
Index: llvm
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