Changes in directory llvm/lib/Target/SparcV8:
SparcV8AsmPrinter.cpp updated: 1.38 -> 1.39
SparcV8InstrInfo.td updated: 1.43 -> 1.44
---
Log message:
asmprint pseudo instrs
---
Diffs of the changes: (+10 -24)
SparcV8AsmPrinter.cpp | 17 -----------------
SparcV8InstrInfo.td | 17 ++++++++++-------
2 files changed, 10 insertions(+), 24 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.38
llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.39
--- llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.38 Fri Dec 16 01:10:02 2005
+++ llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp Fri Dec 16 01:13:26 2005
@@ -422,19 +422,6 @@
if (CloseParen) O << ")";
}
-static bool isPseudoInstruction (const MachineInstr *MI) {
- switch (MI->getOpcode ()) {
- case V8::PHI:
- case V8::ADJCALLSTACKUP:
- case V8::ADJCALLSTACKDOWN:
- case V8::IMPLICIT_USE:
- case V8::IMPLICIT_DEF:
- return true;
- default:
- return false;
- }
-}
-
/// printBaseOffsetPair - Print two consecutive operands of MI, starting at #i,
/// which form a base + offset pair (which may have brackets around it, if
/// brackets is true, or may be in the form base - constant, if offset is a
@@ -467,10 +454,6 @@
const TargetInstrInfo &TII = *TM.getInstrInfo();
const TargetInstrDescriptor &Desc = TII.get(Opcode);
- // If it's a pseudo-instruction, comment it out.
- if (isPseudoInstruction (MI))
- O << "! ";
-
O << Desc.Name << " ";
// print non-immediate, non-register-def operands
Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.43
llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.44
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.43 Fri Dec 16 01:10:02 2005
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Fri Dec 16 01:13:26 2005
@@ -35,16 +35,19 @@
//===----------------------------------------------------------------------===//
// Pseudo instructions.
-class PseudoInstV8<string nm, dag ops> : InstV8 {
- let Name = nm;
+class PseudoInstV8<string asmstr, dag ops> : InstV8 {
+ let AsmString = asmstr;
dag OperandList = ops;
}
def PHI : PseudoInstV8<"PHI", (ops variable_ops)>;
-def ADJCALLSTACKDOWN : PseudoInstV8<"ADJCALLSTACKDOWN", (ops variable_ops)>;
-def ADJCALLSTACKUP : PseudoInstV8<"ADJCALLSTACKUP", (ops variable_ops)>;
-def IMPLICIT_USE : PseudoInstV8<"IMPLICIT_USE", (ops variable_ops)>;
-def IMPLICIT_DEF : PseudoInstV8<"IMPLICIT_DEF", (ops variable_ops)>;
-def FpMOVD : PseudoInstV8<"FpMOVD", (ops)>; // pseudo 64-bit double move
+def ADJCALLSTACKDOWN : PseudoInstV8<"!ADJCALLSTACKDOWN $amt",
+ (ops i32imm:$amt)>;
+def ADJCALLSTACKUP : PseudoInstV8<"!ADJCALLSTACKUP $amt",
+ (ops i32imm:$amt)>;
+//def IMPLICIT_USE : PseudoInstV8<"!IMPLICIT_USE",(ops variable_ops)>;
+def IMPLICIT_DEF : PseudoInstV8<"!IMPLICIT_DEF $dst",
+ (ops IntRegs:$dst)>;
+def FpMOVD : PseudoInstV8<"!FpMOVD", (ops)>; // pseudo 64-bit double move
// Section A.3 - Synthetic Instructions, p. 85
// special cases of JMPL:
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