Signed-off-by: Scott Wood
---
arch/powerpc/Makefile | 8
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 32dfd5d..51cfb78 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -104,6 +104,14 @@ E5500_CPU := $(call
cc-option,-mcpu
ff-by: Scott Wood
---
arch/powerpc/Makefile | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 967fd23..6930c93 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -139,7 +139,6 @@ endif
cpu-as-$(CONFIG_4xx) += -Wa,
On Wed, 2013-08-21 at 10:23 +0530, Deepthi Dharwar wrote:
> On 08/19/2013 11:47 PM, Scott Wood wrote:
> > On Mon, 2013-08-19 at 15:48 +0530, Deepthi Dharwar wrote:
> >> Hi Dongsheng,
> >>
> >> On 08/19/2013 11:22 AM, Wang Dongsheng-B40534 wrote:
> >>&
On Wed, 2013-08-21 at 16:33 -0600, Stephen Warren wrote:
> On 07/29/2013 04:49 AM, hongbo.zh...@freescale.com wrote:
> > From: Hongbo Zhang
> >
> > This patch updates the discription of each type of DMA controller and its
> > channels, it is preparation for adding another new DMA controller bindi
On Wed, 2013-08-21 at 16:40 -0600, Stephen Warren wrote:
> On 07/29/2013 04:49 AM, hongbo.zh...@freescale.com wrote:
> > Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch
> > adds
> > the device tree nodes for them.
>
> > diff --git a/Documentation/devicetree/bindings/powe
On Wed, 2013-08-21 at 16:40 -0600, Stephen Warren wrote:
> On 07/29/2013 04:49 AM, hongbo.zh...@freescale.com wrote:
> > +- reg :
> > +- interrupts:
>
> s/interrupts/specifier/
Do you mean s/interrupt mapping/interrupt specifier/?
And probably s/registers
On Wed, 2013-08-21 at 17:15 -0600, Stephen Warren wrote:
> On 08/21/2013 04:57 PM, Scott Wood wrote:
> > On Wed, 2013-08-21 at 16:40 -0600, Stephen Warren wrote:
> >> On 07/29/2013 04:49 AM, hongbo.zh...@freescale.com wrote:
>
> >>> +- ranges: describe
On Wed, 2013-08-21 at 17:12 -0600, Stephen Warren wrote:
> OK, if there's some alternative run-time way of enabling chip-specific
> quirking, it's probably fine to remove the extra compatible values.
>
> Now, that does rather assume that this DMA IP block will only ever be
> used within SoCs that
On Thu, 2013-08-22 at 15:56 +0200, Rojhalat Ibrahim wrote:
> Just out of curiosity: What's the difference (if any) between -mcpu=e500mc64
> and -mcpu=e5500? AFAIK -mcpu=e500mc64 is supported by gcc since at least
> version 4.6 whereas -mcpu=e5500 is only supported since gcc 4.8. But is there
> a
On Wed, 2013-08-21 at 22:13 -0500, Wang Dongsheng-B40534 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, August 20, 2013 8:39 AM
> > To: Wang Dongsheng-B40534
> > Cc: Wood Scott-B07421; Kumar Gala; linuxppc-dev@lists.ozlabs.org
> > Subject: Re: [PATCH 1/2] po
On Thu, 2013-08-22 at 11:20 +0530, Deepthi Dharwar wrote:
> On 08/22/2013 01:38 AM, Scott Wood wrote:
> > On Wed, 2013-08-21 at 10:23 +0530, Deepthi Dharwar wrote:
> >> On 08/19/2013 11:47 PM, Scott Wood wrote:
> >>> What actual functionality is common to all powerpc
On Thu, 2013-08-22 at 21:04 +0530, Saravanan S wrote:
> a) I can generate MSI interrupts from End Point to Root Complex over
> PCI . But the vice-versa is not possible . However i need a method to
> interrupt the End Point from the Root Complex to complete my driver.
> Only previous references I
On Wed, 2013-08-21 at 14:55 +0530, Poonam Aggrwal wrote:
> Binding for DSP CPU clusters and DSP CPUs for Freescale SOCs which
> have DSP CPUs in addition to PowerPC CPUs. For example B4860.
>
> Signed-off-by: Poonam Aggrwal
> ---
> .../devicetree/bindings/powerpc/fsl/dsp-cpus.txt | 78
> +++
On Thu, 2013-08-22 at 12:06 +0800, Shengzhou Liu wrote:
> Update phy node according to new P1010RDB-PB board.
>
> Signed-off-by: Shengzhou Liu
> ---
> arch/powerpc/boot/dts/p1010rdb.dtsi |6 +++---
> 1 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/p10
On Thu, 2013-08-22 at 21:52 -0500, Wang Dongsheng-B40534 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Thursday, August 22, 2013 11:19 PM
> > To: Wang Dongsheng-B40534
> > Cc: Wood Scott-B07421; Kumar Gala; Zhao Chenhui-B35336; linuxppc-
> > d...@lists.ozlabs.org
>
On Fri, 2013-08-23 at 14:39 +0800, Zhang Haijun wrote:
> Hi, Anton and all
>
> Is there any advice on these two patches ?
>
> [PATCH 2/4 V2] mmc: esdhc: workaround for dma err in the last system
> transaction
> [PATCH 3/4 V3] mmc: esdhc: Correct host version of T4240-R1.0-R2.0.
>
>
> [PATCH 1/
On Fri, 2013-08-23 at 17:49 +0200, Mercier Ivan wrote:
> Hi everybody,
> I have 2 boards based on freescale p3041.
> Ethernet works on uboot on the 2 of them but only the eval card
> p3041ds works with linux.
> So i start modifying the device tree on the other card (wp6.dts) and
> now I can see the
Bcc:
Subject: Re: ppc/sata-fsl: orphan config value: CONFIG_MPC8315_DS
Reply-To:
In-Reply-To:
On Wed, May 08, 2013 at 06:04:39AM -0600, Anthony Foiani wrote:
> Anthony Foiani writes:
> > Maybe I need to call ata_set_sata_spd as well. Can I do that before
> > discovery, or should it be a part
On Thu, Jun 06, 2013 at 09:06:51AM +0800, tang yuantian wrote:
> From: Tang Yuantian
>
> The following SoCs will be affected: p2041, p3041, p4080,
> p5020, p5040, b4420, b4860, t4240
>
> Signed-off-by: Tang Yuantian
> Signed-off-by: Li Yang
>
> ---
> v3:
> - fix typo
> v2:
> - add
On Mon, 2013-08-19 at 20:23 +0800, Minghuan Lian wrote:
> The Freescale's Layerscape series processors will use ARM cores.
> The LS1's PCIe controllers is the same as T4240's. So it's better
> the PCIe controller driver can support PowerPC and ARM
> simultaneously. This patch is for this purpose. I
On Fri, 2013-08-23 at 17:41 -0600, Anthony Foiani wrote:
> Scott Wood writes:
>
> >> --- a/Documentation/devicetree/bindings/powerpc/fsl/board.txt
> >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/board.txt
> >
> > This should go in Documentation/
On Fri, 2013-08-23 at 18:40 -0500, James Yang wrote:
> On Sat, 10 Aug 2013, James Yang wrote:
>
> > Uses of get_current() that normally get optimized away still result in
> > a load instruction of the current pointer in 64-bit because the inline
> > asm uses __volatile__. This patch removes __vol
PHY
>eTSEC2: Connected to Atheros AR8035 GETH PHY
>
> PCIe:
>Three mini-PCIe slots
>
> USB:
>Two USB2.0 Type A ports
>
> I2C:
>AT24C08 8K Board EEPROM (8 bit address)
>
> Signed-off-by: Chunhe Lan
> Cc: Scott
On Fri, 2013-08-23 at 19:09 -0500, Scott Wood wrote:
> On Tue, Jul 30, 2013 at 07:40:29PM +0800, Chunhe Lan wrote:
> > P1023RDB Specification:
> > ---
> > Memory subsystem:
> >512MB DDR3 (Fixed DDR on board)
> >64MB NOR flash
> >
type detection
Mingkai Hu (3):
powerpc/85xx: Add SEC6.0 device tree
powerpc/85xx: Add silicon device tree for C293
powerpc/85xx: Add C293PCIE board support
Scott Wood (5):
powerpc/fsl-booke: Work around erratum A-006958
powerpc: Convert some mftb/mftbu into mfspr
On Fri, 2013-08-23 at 20:07 -0500, Scott Wood wrote:
> The following changes since commit afbcdd97bf117bc2d01b865a32f78f662437a4d8:
>
> powerpc/wsp: Fix early debug build (2013-08-16 10:59:27 +1000)
>
> are available in the git repository at:
>
> git://git.kernel.org
On Mon, 2013-08-26 at 09:03 +0800, Zhang Haijun wrote:
> On 08/23/2013 11:40 PM, Scott Wood wrote:
>
> > On Fri, 2013-08-23 at 14:39 +0800, Zhang Haijun wrote:
> > > Hi, Anton and all
> > >
> > > Is there any advice on these two patches ?
> > >
On Sun, 2013-08-25 at 21:42 -0500, Tang Yuantian-B29983 wrote:
> > >
> > > clockgen: global-utilities@e1000 {
> > > - compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0";
> > > + compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0",
> > > +
On Sat, 2013-08-24 at 19:15 +0200, Martin Hinner wrote:
> Hello again,
>
> just a quick update: I have spent some more time on this and now I
> can boot into kernel (it works even with initramfs and simple assembly
> HelloWorld, so it's time to compile userland now). The problem was
> that kerne
On Mon, 2013-08-26 at 20:29 +0200, Martin Hinner wrote:
> On Mon, Aug 26, 2013 at 7:14 PM, Scott Wood wrote:
> >> that kernel must be at location 0. Another problem was that interrupts
> >> got re-enabled during execution of my bootloader (I am doing some
> >>
On Mon, 2013-09-02 at 18:11 +0800, Xie Xiaobo wrote:
> +&soc {
> + usb@22000 {
> + phy_type = "ulpi";
> + };
> +
> + mdio@24000 {
> + phy0: ethernet-phy@2 {
> + interrupt-parent = <&mpic>;
> + interrupts = <1 1>;
> +
On Mon, 2013-09-02 at 18:11 +0800, Xie Xiaobo wrote:
> Define two QE init functions in common file, and avoid
> the same codes being duplicated in board files.
>
> Signed-off-by: Xie Xiaobo
> ---
> V3 -> V2: Nochange
>
> arch/powerpc/platforms/85xx/common.c | 47
>
On Wed, 2013-09-04 at 23:00 -0500, Jia Hongtao-B38951 wrote:
> > -Original Message-
> > From: Jia Hongtao-B38951
> > Sent: Monday, July 01, 2013 5:36 PM
> > To: Wood Scott-B07421
> > Cc: linuxppc-dev@lists.ozlabs.org; ga...@kernel.crashing.org
> > Subject: RE: [V2,2/2] powerpc/85xx: workaro
On Tue, 2013-09-03 at 22:30 -0500, Tang Yuantian-B29983 wrote:
> Hi,
>
> These eeproms are never used by kernel. So no need to add them.
The device tree describes the hardware, not what Linux does with it.
-Scott
___
Linuxppc-dev mailing list
Linuxp
On Tue, 2013-08-27 at 16:41 +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Using hardware features make core automatically enter PW20 state.
> Set a TB count to hardware, the effective count begins when PW10
> is entered. When the effective period has expired, the core will
> proceed fro
On Thu, 2013-09-05 at 13:34 -0500, Kumar Gala wrote:
> On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:
> > + msi->feature |= MSI_HW_ERRATA_ENDIAN;
> > + }
> > +
> > /*
> > * Remember the phandle, so that we can match with any PCI nodes
> > * that have an "fsl,msi" p
On Thu, 2013-09-05 at 21:30 -0500, Tang Yuantian-B29983 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: 2013年9月6日 星期五 2:41
> > To: Tang Yuantian-B29983
> > Cc: Yang,Wei; Jia Hongtao-B38951; Wood Scott-B07421; linuxppc-
> > d...@lists.ozlabs.org
> > Subject: Re: [PATCH] p
On Fri, 2013-09-06 at 04:52 -0500, Xie Xiaobo-R63061 wrote:
> Hi Scott,
>
> I already remove these code from the P1025TWR platform file(see the 2/2
> patch). Do you means I also need to remove these codes from the others
> platforms and use the common call instead?
> Thank you.
Yes.
-Scott
On Fri, 2013-09-06 at 05:01 -0500, Xie Xiaobo-R63061 wrote:
> Hi Scott,
>
> Thanks for your reminding and advice.
>
> I discuss this with Liu Shengzhou(the first person that remind me
> #interrupt-cells is 4), he advised removing the interrupts property
> from the phy node, because the mdio used
On Fri, 2013-09-06 at 10:01 -0500, Kumar Gala wrote:
> On Sep 5, 2013, at 1:37 PM, Scott Wood wrote:
>
> > On Thu, 2013-09-05 at 13:34 -0500, Kumar Gala wrote:
> >> On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:
> >>> + msi
On Wed, 2013-08-28 at 13:48 +0100, Mark Rutland wrote:
> On Wed, Aug 28, 2013 at 09:18:55AM +0100, Hongbo Zhang wrote:
> > On 08/27/2013 07:25 PM, Mark Rutland wrote:
> > > On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zh...@freescale.com
> > > wrote:
> > >> From: Hongbo Zhang
> > >>
> > >> Th
On Mon, 2013-08-26 at 21:49 -0500, Tang Yuantian-B29983 wrote:
> > > > > + };
> > > > > + pll1: pll1@820 {
> > > > > + #clock-cells = <1>;
> > > > > + reg = <0x820>;
> > > > > + compatible = "fsl,core-pll-clock";
>
On Fri, 2013-09-06 at 08:43 -0700, York Sun wrote:
> Extend err_addr to cover 64 bits for DDR errors.
>
> Signed-off-by: York Sun
> Reviewed-by: Fleming Andrew-AFLEMING
> Tested-by: Fleming Andrew-AFLEMING
> ---
> drivers/edac/mpc85xx_edac.c | 10 +++---
> drivers/edac/mpc85xx_edac.h |
On Fri, 2013-09-06 at 08:43 -0700, York Sun wrote:
> Driver shouldn't request irq when irq = 0. It is returned from parsing
> device tree. 0 means no interrupt.
>
> Signed-off-by: York Sun
> Reviewed-by: Zang Tiefei-R61911
> Reviewed-by: Fleming Andrew-AFLEMING
> Tested-by: Fleming Andrew-AFLEM
On Fri, 2013-09-06 at 08:43 -0700, York Sun wrote:
> B4860EMU is a emualtor target with minimum peripherals. It is based on
> B4860QDS and trimmed down most peripherals due to either not modeled or
> lack of board level connections. The main purpose of this minimum dts is
> to speed up booting on e
On Wed, 2013-09-04 at 13:07 +1000, Jason Rennie wrote:
> But when I try building it with the latest buildroot (2013.08) and I
> configure the kernel (3.10.10) I get one of two things. If I don't
> include specific settings for physmap compat support (Device Drivers
> -> MTD Support -> Mapping drive
On Fri, 2013-09-06 at 16:05 +0800, Mingkai Hu wrote:
> Re-organize the SPI partitions and use the same SPI flash memory
> map for most of the platforms which have 16MB SPI flash mounted.
[snip]
> Based on 'next' branch on git tree:
> git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git
On Wed, 2013-08-28 at 18:42 +0800, Minghuan Lian wrote:
> The Freescale's Layerscape series processors will use ARM cores.
> The LS1's PCIe controllers is the same as T4240's. So it's better
> the PCIe controller driver can support PowerPC and ARM
> simultaneously. This patch is for this purpose. I
t;
> This patch is based on linux-3.11-rc7 and has been boot tested.
>
> V1->V2:
> Address comments by Kular Gama and Scott Wood.
> Minor adjustment to platforms/embedded6xx/Kconfig to ensure
> correct indentation where possible.
>
> Signed-off-by:
On Wed, 2013-09-11 at 11:15 +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2013-09-10 at 18:47 -0500, Scott Wood wrote:
>
> > No blank line before }
> >
> > > +CONFIG_CMDLINE_BOOL=y
> > > +CONFIG_CMDLINE="console=ttyS0,9600 ip=dhcp root=/dev/nfs&quo
On Wed, 2013-09-11 at 18:44 +0200, Christophe Leroy wrote:
> Activating CONFIG_PIN_TLB is supposed to pin the IMMR and the first three
> 8Mbytes pages. But the setting of the MD_CTR was missing so as the index is
> decremented every DTLB update, the pinning of the third 8Mbytes page was
> overwriti
On Wed, 2013-09-11 at 13:56 +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Each core's AltiVec unit may be placed into a power savings mode
> by turning off power to the unit. Core hardware will automatically
> power down the AltiVec unit after no AltiVec instructions have
> executed in
On Wed, 2013-09-11 at 13:56 +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Add a sys interface to enable/diable pw20 state or altivec idle, and
> control the wait entry time.
>
> Enable/Disable interface:
> 0, disable. 1, enable.
> /sys/devices/system/cpu/cpuX/pw20_state
> /sys/devices/
On Wed, 2013-09-11 at 12:28 +0530, Prabhakar Kushwaha wrote:
> The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
> processor cores with high-performance data path acceleration architecture
> and network peripheral interfaces required for networking &
> telecommunications.
>
Commit 9837b43c5f3514e5d28f65f1513f4dc6759d2810 ("powerpc/85xx: enable
coreint for all the 64bit boards") removed the ifdef that avoided
coreint on 64-bit, but it missed b4_qds.c.
Signed-off-by: Scott Wood
Cc: Kevin Hao
Cc: Shaveta Leekha
---
arch/powerpc/platforms/85xx/b4_qds.c |
On Wed, 2013-09-11 at 12:28 +0530, Prabhakar Kushwaha wrote:
> Add support for T104x board in board file t104x_qds.c, It is common for
> both T1040 and T1042 as they share same QDS board.
>
> T1040QDS board Overview
> ---
> - SERDES Connections, 8 lanes supporting:
>
On Wed, 2013-09-11 at 14:57 +0800, yuantian.t...@freescale.com wrote:
> From: Tang Yuantian
>
> The following SoCs will be affected: p2041, p3041, p4080,
> p5020, p5040, b4420, b4860, t4240
>
> Signed-off-by: Tang Yuantian
> Signed-off-by: Li Yang
> ---
> v4:
> - add binding document
>
On Tue, 2013-09-10 at 21:07 -0500, Hu Mingkai-B21284 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, September 11, 2013 7:33 AM
> > To: Hu Mingkai-B21284
> > Cc: linuxppc-...@ozlabs.org
> > Subject: Re: [PATCH] powerpc/85xx: DTS - re-organize the SPI partit
On Wed, 2013-09-11 at 20:31 -0500, Tang Yuantian-B29983 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: 2013年9月12日 星期四 9:10
> > To: Tang Yuantian-B29983
> > Cc: ga...@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org;
> > devicet...@vger.kernel.org; Li Yang-Leo-R58472
>
On Thu, 2013-09-12 at 20:25 +0200, Christophe Leroy wrote:
> This is a reorganisation of the setup of the TLB at kernel startup, in order
> to handle the CONFIG_PIN_TLB case in accordance with chapter 8.10.3 of MPC866
> and MPC885 reference manuals.
>
> Signed-off-by: Christophe Leroy
>
> diff -u
On Thu, 2013-09-12 at 15:13 +0800, Kevin Hao wrote:
> In the current kernel, the board files for p2041rdb, p3041ds, p4080ds,
> p5020ds, p5040ds, t4240qds and b4qds are almost the same except the
> machine name. So this introduces a cornet_generic machine to support
> all these boards to avoid the c
On Wed, 2013-09-11 at 22:48 -0500, Wang Dongsheng-B40534 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Thursday, September 12, 2013 7:04 AM
> > To: Wang Dongsheng-B40534
> > Cc: ga...@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org
> > Subject: Re: [PATCH v3 4/4]
The ISA says that a sync is needed to order a PTE write with a
subsequent hardware tablewalk lookup. On e6500, without this sync
we've been observed to die with a DSI due to a PTE write not being seen
by a subsequent access, even when everything happens on the same
CPU.
Signed-off-by: Scott
l page.
- Like on e5500, the linear mapping is bolted, so we don't need the
overhead of supporting nested tlb misses.
Note that hardware tablewalk does not work in rev1 of e6500.
We do not expect to support e6500 rev1 in mainline Linux.
Signed-off-by: Scott Wood
Cc: Mihai Caraman
--
v
This keeps usage coordinated for hugetlb and indirect entries, which
should make entry selection more predictable and probably improve overall
performance when mixing the two.
Signed-off-by: Scott Wood
---
v2: new patch
---
arch/powerpc/mm/hugetlbpage-book3e.c | 51
On Mon, 2013-09-16 at 16:12 +0800, Zhang Haijun wrote:
> On 09/02/2013 06:37 PM, Haijun Zhang wrote:
> > We use property "sdhci,auto-cmd12" instead of "fsl,sdhci-auto-cmd12"
> > to distinguish if the sdhc host has quirk
> > SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12.
> >
> > Signed-off-by: Haijun Zhang
>
On Fri, 2013-09-13 at 02:35 -0500, Kushwaha Prabhakar-B32579 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Thursday, September 12, 2013 5:11 AM
> > To: Kushwaha Prabhakar-B32579
> > Cc: linuxppc-dev@lists.ozlabs.org; ga...@kernel.crashing.org; Jain
> > Priyanka-B321
On Fri, 2013-09-13 at 07:04 +0200, leroy christophe wrote:
> Le 12/09/2013 20:44, Scott Wood a écrit :
> > On Thu, 2013-09-12 at 20:25 +0200, Christophe Leroy wrote:
> >> This is a reorganisation of the setup of the TLB at kernel startup, in
> >> order
> >>
On Fri, 2013-09-13 at 02:30 -0500, Kushwaha Prabhakar-B32579 wrote:
> > I also question the need to define separate t1040 compatible values for
> > all of these, if the only difference is whether the onboard switch is
> > enabled or not.
> >
>
> so should I use T104x as compatible field. and in T
On Thu, 2013-09-12 at 21:50 -0500, Tang Yuantian-B29983 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: 2013年9月12日 星期四 22:44
> > To: Tang Yuantian-B29983
> > Cc: Wood Scott-B07421; ga...@kernel.crashing.org; linuxppc-
> > d...@lists.ozlabs.org; devicet...@vger.kernel.org
On Sun, 2013-09-15 at 19:31 +0530, Prabhakar Kushwaha wrote:
> The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
> processor cores with high-performance data path acceleration architecture
> and network peripheral interfaces required for networking &
> telecommunications.
>
On Thu, 2013-09-12 at 21:53 -0500, Wang Dongsheng-B40534 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, September 13, 2013 2:07 AM
> > To: Wang Dongsheng-B40534
> > Cc: Wood Scott-B07421; ga...@kernel.crashing.org; linuxppc-
> > d...@lists.ozlabs.org
> > Subj
On Fri, 2013-09-13 at 03:17 +, Zhao Qiang-B45475 wrote:
> On Sep 13, 2013, at 12:42 AM, Kumar Gala wrote:
>
> > -Original Message-
> > From: Kumar Gala [mailto:ga...@kernel.crashing.org]
> > Sent: Friday, September 13, 2013 12:42 AM
> > To: Liu Shengzhou-B36685
> > Cc: Zhao Qiang-B4547
On Thu, 2013-09-12 at 18:15 +0100, Mark Rutland wrote:
> On Tue, Sep 03, 2013 at 10:01:50AM +0100, Hongbo Zhang wrote:
> > On 09/02/2013 11:58 PM, Mark Rutland wrote:
> > > May some channels be unusable for some reason, or will all eight
> > > channels be wired on any given Elo3 DMA?
> > Sorry, not
On Thu, 2013-09-12 at 18:07 +0800, Minghuan Lian wrote:
> The Freescale's Layerscape series processors will use the same PCI
> controller but change cores from PowerPC to ARM. This patch is to
> rework FSL PCI driver to support PowerPC and ARM simultaneously.
> PowerPC uses structure pci_controller
On Mon, 2013-09-16 at 07:38 +1000, Benjamin Herrenschmidt wrote:
> On Fri, 2013-09-13 at 22:50 -0500, Scott Wood wrote:
> > The ISA says that a sync is needed to order a PTE write with a
> > subsequent hardware tablewalk lookup. On e6500, without this sync
> > we've b
On Mon, 2013-09-16 at 21:11 -0500, Kushwaha Prabhakar-B32579 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, September 17, 2013 2:49 AM
> > To: Kushwaha Prabhakar-B32579
> > Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org;
> > ga...@kernel.crashing.org;
On Thu, 2013-09-19 at 11:32 +0530, Bharat Bhushan wrote:
> On booke, "struct tlbe_ref" contains host tlb mapping information
> (pfn: for guest-pfn to pfn, flags: attribute associated with this mapping)
> for a guest tlb entry. So when a guest creates a TLB entry then
> "struct tlbe_ref" is set to p
On Thu, 2013-09-19 at 23:19 -0500, Bhushan Bharat-R65777 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, September 20, 2013 2:38 AM
> > To: Bhushan Bharat-R65777
> > Cc: b...@kernel.crashing.org; ag...@suse.de; pau...@samba.org;
> > k...@vger.kernel.org; kvm-.
On Fri, 2013-09-20 at 06:55 -0500, Timur Tabi wrote:
> Prabhakar Kushwaha wrote:
> >
> > I think patch set is OK for now. No need to send v4.
>
> It needs an updated patch description because the patch lies. It
> advertises DIU support, which is not true.
The patch is not "lying". It is descri
On Thu, 2013-09-19 at 20:38 -0500, Kushwaha Prabhakar-B32579 wrote:
> Hi Tabi,
>
> > -Original Message-
> > From: Timur Tabi [mailto:ti...@tabi.org]
> > Sent: Friday, September 20, 2013 2:03 AM
> > To: Kushwaha Prabhakar-B32579
> > Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Jain
On Fri, 2013-09-20 at 09:55 +0530, Bharat Bhushan wrote:
> On booke, "struct tlbe_ref" contains host tlb mapping information
> (pfn: for guest-pfn to pfn, flags: attribute associated with this mapping)
> for a guest tlb entry. So when a guest creates a TLB entry then
> "struct tlbe_ref" is set to p
On Fri, 2013-09-20 at 13:04 -0500, Bhushan Bharat-R65777 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, September 20, 2013 9:48 PM
> > To: Bhushan Bharat-R65777
> > Cc: Wood Scott-B07421; b...@kernel.crashing.org; ag...@suse.de;
> > pau...@samba.org; k...@vge
On Tue, 2013-09-17 at 18:40 +0200, leroy christophe wrote:
> Le 16/09/2013 23:02, Scott Wood a écrit :
> > On Fri, 2013-09-13 at 07:04 +0200, leroy christophe wrote:
> >> Le 12/09/2013 20:44, Scott Wood a écrit :
> >>> On Thu, 2013-09-12 at 20:25 +0200, Christophe
On Fri, 2013-09-20 at 19:23 -0500, Timur Tabi wrote:
> Scott Wood wrote:
> > The patch is not "lying". It is describing the board, not what the
> > patch supports. This was something you used to constantly tell people
> > to do...
>
> The patch says:
&g
problem
> starts coming when we add more attributes to this then we need to selectively
> clear them and which is not needed.
>
> This patch we do both
> - Clear "flags" when invalidating;
> - Clear
On Sun, 2013-09-22 at 15:42 +0800, Kevin Hao wrote:
> In the current kernel, the board files for p2041rdb, p3041ds, p4080ds,
> p5020ds, p5040ds, t4240qds and b4qds are almost the same except the
> machine name. So this introduces a cornet_generic machine to support
> all these boards to avoid the c
On Tue, 2013-09-17 at 06:06 -0500, Hu Mingkai-B21284 wrote:
> Scott,
> Sorry for the delayed response.
> Please fine my comments.
> Thanks,
> Mingkai
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Thursday, September 12, 2013 9:16 AM
> > To: Hu Mingkai-B21284
> > Cc: Wood S
On Tue, 2013-09-24 at 05:27 -0500, Hu Mingkai-B21284 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, September 24, 2013 7:03 AM
> > To: Hu Mingkai-B21284
> > Cc: Wood Scott-B07421; linuxppc-...@ozlabs.org
> > Subject: Re: [PATCH] powerpc/85xx: DTS - re-organi
On Tue, 2013-09-24 at 11:03 +0800, Kevin Hao wrote:
> Currently all these boards use the same machine struct and also select
> the same kernel options, so it seems a bit of redundant to keep one
> separate kernel option for each board. Also update the defconfigs
> according to this change.
>
> Sig
On Tue, 2013-09-24 at 18:48 +0800, Xie Xiaobo wrote:
> Define two QE init functions in common file, and avoid
> the same codes being duplicated in board files.
>
> Signed-off-by: Xie Xiaobo
> ---
> V4 -> V3: Nochange
>
> arch/powerpc/platforms/85xx/common.c | 51
>
On Tue, 2013-09-24 at 18:48 +0800, Xie Xiaobo wrote:
> + partition@8 {
> + /* 3.5 MB for Linux Kernel Image */
> + reg = <0x0008 0x0038>;
> + label = "NOR Linux Kernel Image";
> + };
Is this enough?
>
On Thu, 2013-09-19 at 22:08 -0500, Timur Tabi wrote:
> Kushwaha Prabhakar-B32579 wrote:
> > My primary object is to put base patch in Linux. once it done other things
> > can be enabled one by one.
>
> Any features which are not enabled must be specified in the patch
> description. The patch sa
On Tue, 2013-09-17 at 17:23 +0800, Lian Minghuan-b31939 wrote:
> >> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
> >> index a189ff0..4cb12e8 100644
> >> --- a/arch/powerpc/sysdev/fsl_pci.c
> >> +++ b/arch/powerpc/sysdev/fsl_pci.c
> >> @@ -62,7 +62,11 @@ static void qui
On Mon, 2013-09-23 at 09:21 +0530, Prabhakar Kushwaha wrote:
> +/* coreint doesn't play nice with lazy EE, use legacy mpic for now */
> + .get_irq= mpic_get_coreint_irq,
Remove the comment.
Also note Kevin's patch to consolidate on a common corenet board file.
-Scott
_
On Wed, 2013-09-25 at 03:10 -0500, Wang Dongsheng-B40534 wrote:
>
> > -Original Message-
> > From: Bhushan Bharat-R65777
> > Sent: Wednesday, September 25, 2013 2:23 PM
> > To: Wang Dongsheng-B40534; Wood Scott-B07421
> > Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > Subject
On Wed, 2013-09-25 at 04:51 -0500, Xie Xiaobo-R63061 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, September 25, 2013 7:13 AM
> > To: Xie Xiaobo-R63061
> > Cc: linuxppc-dev@lists.ozlabs.org
> > Subject: Re: [PATCH V4 1/3] powerpc/85xx: Add QE common init fun
On Wed, 2013-09-25 at 04:50 -0500, Xie Xiaobo-R63061 wrote:
> Hi Scott,
>
> See the reply inline.
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, September 25, 2013 7:22 AM
> > To: Xie Xiaobo-R63061
> > Cc: linuxppc-dev@lists.ozlabs.org; Johnston Michael-R49610
>
On Wed, 2013-09-25 at 08:58 +0800, Kevin Hao wrote:
> On Tue, Sep 24, 2013 at 05:41:32PM -0500, Scott Wood wrote:
> > On Tue, 2013-09-24 at 11:03 +0800, Kevin Hao wrote:
> > > + and B4 QDS boards
> [...]
> >
> > Is there any difference between the 32-bit and 6
On Tue, 2013-09-03 at 16:28 +0800, Shengzhou Liu wrote:
> Enable CONFIG_AT803X_PHY to support AR8030/8033/8035 PHY.
>
> Signed-off-by: Shengzhou Liu
> ---
> arch/powerpc/configs/corenet32_smp_defconfig |1 +
> arch/powerpc/configs/mpc85xx_defconfig |1 +
> arch/powerpc/configs/mpc8
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