On Wed, 2015-07-29 at 10:02 +0200, Arnd Bergmann wrote:
> On Wednesday 29 July 2015 00:24:37 Scott Wood wrote:
> > +#ifdef CONFIG_PM
> > static void lock_tx_qs(struct gfar_private *priv)
> > {
> > int i;
> > @@ -580,6 +581,7 @@ static void unlock_tx_qs(struc
On Tue, 2015-07-28 at 00:32 -0500, Zhao Qiang-B45475 wrote:
> On Tue, 2015-07-28 at 5:21, Scott Wood wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, July 28, 2015 5:21 AM
> > To: Zhao Qiang-B45475
> > Cc: lau...@codeaurora.
On Wed, 2015-07-29 at 04:07 -0500, Jain Priyanka-B32167 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, July 24, 2015 8:58 PM
> > To: Jain Priyanka-B32167
> > Cc: linuxppc-dev@lists.ozlabs.org
> > Subject: Re: [PATCH][v2] powerpc/fsl-booke: Add T1040D4RDB/T104
On Wed, 2015-07-29 at 16:07 +0530, Hemant Kumar wrote:
> Hi Scott,
>
> On 07/17/2015 01:40 AM, Scott Wood wrote:
> > On Thu, 2015-07-16 at 21:18 +0530, Hemant Kumar wrote:
> > > To analyze the exit events with perf, we need kvm_perf.h to be added in
> > > the arch
On Wed, 2015-07-29 at 20:27 -0500, Zhao Qiang-B45475 wrote:
> On Thu, 2015-07-30 at 5:21, Scott Wood wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Thursday, July 30, 2015 12:19 AM
> > To: Zhao Qiang-B45475
> > Cc: lau...@codeaurora.
On Thu, 2015-07-30 at 07:32 +0300, Igal.Liberman wrote:
> +fman0: fman@40{
> + #address-cells = <1>;
> + #size-cells = <1>;
> + cell-index = <0>;
> + compatible = "fsl,fman";
> + ranges = <0 0x40 0x10>;
> + reg = <0x40 0x10>;
> + interrupts = <96 2 0
On Thu, 2015-07-30 at 07:33 +0300, Igal.Liberman wrote:
> @@ -307,4 +307,117 @@
> reg = <0xe 0x1000>;
> fsl,has-rstcr;
> };
> +
> + fman@10{
> + #address-cells = <1>;
> + #size-cells = <1>;
> + cell-index = <0>;
> +
On Thu, 2015-07-30 at 07:47 +0300, Igal.Liberman wrote:
> From: Igal Liberman
>
> Describe the PHY topology for all configurations supported by each board
>
> Based on prior work by Andy Fleming
>
> Signed-off-by: Igal Liberman
> Signed-off-by: Shruti Kanetkar
> Signed-off-by: Emil Medve
S
These patches sit on top of the following patches:
http://patchwork.ozlabs.org/patch/499211/
http://patchwork.ozlabs.org/patch/499200/
http://patchwork.ozlabs.org/patch/468592/
Scott Wood (2):
powerpc/85xx: Make defconfigs consistent
powerpc/85xx: Use kconfig fragments
arch/powerpc/Makefile
onfig on a fragment-generated config).
Signed-off-by: Scott Wood
---
arch/powerpc/configs/corenet32_smp_defconfig | 97
arch/powerpc/configs/corenet64_smp_defconfig | 97 +---
arch/powerpc/configs/mpc85xx_defconfig | 40 +++-
previously selected. No attempt was made in this (or
the previous) patch to edit out questionable options, but this patch
will make it easier to do so in future patches.
Signed-off-by: Scott Wood
---
arch/powerpc/Makefile| 20 ++
arch/powerpc/configs/85xx-32bit.config
On Fri, 2015-07-31 at 05:59 -0500, Hou Zhiqiang-B48286 wrote:
> Hi Dongsheng and Scott,
>
> Do you have any comment?
>
> > -Original Message-
> > From: Zhiqiang Hou [mailto:b48...@freescale.com]
> > Sent: 2015年7月21日 18:10
> > To: ga...@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org
>
[Added KVM lists and a couple relevant people]
On Fri, 2015-07-31 at 14:25 +0530, Hemant Kumar wrote:
> On 07/30/2015 03:52 AM, Scott Wood wrote:
> > On Wed, 2015-07-29 at 16:07 +0530, Hemant Kumar wrote:
> > > Hi Scott,
> > >
> > > On 07/17/2015 01:40 AM, Sc
On Fri, 2015-07-31 at 20:53 +0800, Chenhui Zhao wrote:
> In the last stage of deep sleep, software will trigger a Finite
> State Machine (FSM) to control the hardware precedure, such as
> board isolation, killing PLLs, removing power, and so on.
>
> When the system is waked up by an interrupt, the
On Fri, 2015-06-26 at 15:44 +0800, yuantian.t...@freescale.com wrote:
> +static void rcpm_v1_set_ip_power(bool enable, u32 *mask)
> +{
> + if (enable)
> + setbits32(&rcpm_v1_regs->ippdexpcr, *mask);
> + else
> + clrbits32(&rcpm_v1_regs->ippdexpcr, *mask);
> +}
> +
>
On Fri, 2015-07-31 at 20:53 +0800, Chenhui Zhao wrote:
> diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> index f22e7e4..32ec426f 100644
> --- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> +++ b/arch/powerpc/kernel/fsl_booke_entry_m
On Fri, 2015-07-24 at 20:46 +0800, Chenhui Zhao wrote:
> +static void mpc85xx_pmc_set_wake(struct device *dev, void *enable)
> {
> int ret;
> + u32 value[2];
> +
> + if (!device_may_wakeup(dev))
> + return;
> +
> + if (!pmc_regs) {
> + dev_err(dev, "%s: PM
On Mon, 2015-08-03 at 19:14 +0800, Chenhui Zhao wrote:
> On Sat, Aug 1, 2015 at 8:45 AM, Scott Wood
> wrote:
> > On Fri, 2015-06-26 at 15:44 +0800, Yuantian.Tang@freescale.comwrote:
> > > +static void rcpm_v1_set_ip_power(bool enable, u32 *mask)
> > &g
[Added linuxppc-dev@lists.ozlabs.org. Besides that list being required for
review of PPC patches, it feeds the patchwork that I use to track and apply
patches.]
On Mon, 2015-08-03 at 19:52 +0800, Chenhui Zhao wrote:
> On Sat, Aug 1, 2015 at 8:14 AM, Scott Wood
> wrote:
> > On Fri
On Mon, 2015-08-03 at 20:01 +0800, Chenhui Zhao wrote:
> On Sat, Aug 1, 2015 at 8:41 AM, Scott Wood
> wrote:
> > On Fri, 2015-07-31 at 20:53 +0800, Chenhui Zhao wrote:
> > > In the last stage of deep sleep, software will trigger a Finite
> > > State Machine
On Mon, 2015-08-03 at 16:35 +0800, Zhao Qiang wrote:
>
> @@ -73,6 +74,13 @@ struct gen_pool_chunk {
> unsigned long bits[0]; /* bitmap for allocating memory chunk */
> };
>
> +/*
> + * General purpose special memory pool data descriptor.
> + */
It's not "general purpose". It's
On Mon, Aug 03, 2015 at 09:44:01AM +0300, Igal.Liberman wrote:
> + xmdio0: mdio@f1000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,fman-xmdio";
> + reg = <0xf1000 0x1000>;
> + interrupts = <101 1 0 0>;
> +
[Resending after bogofilter adjustment on vger.kernel.org]
On Mon, Aug 03, 2015 at 09:44:01AM +0300, Igal.Liberman wrote:
> + xmdio0: mdio@f1000{
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,fman-xmdio";
> + reg = <0xf1
On Tue, 2015-08-04 at 18:29 +0300, Ran Shalit wrote:
> Hello,
>
> I would please like to ask if describing flash nor used with GPMC,
> whould be done as described in:
> https://www.kernel.org/doc/Documentation/devicetree/bindings/mtd/gpmc-nor.txt
> It is described in the above link as "TI's GPMC",
On Tue, 2015-08-04 at 11:07 +0200, leroy christophe wrote:
> Le 02/08/2015 21:05, Markus Stockhausen a écrit :
> > Hi Christophe,
> >
> > I saw that this patch from you is still missing in Linux mainline:
> > https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-September/121144.html
> >
> > Is th
On Tue, 2015-08-04 at 23:26 +0300, Ran Shalit wrote:
> On Tue, Aug 4, 2015 at 9:54 PM, Scott Wood wrote:
> > On Tue, 2015-08-04 at 18:29 +0300, Ran Shalit wrote:
> > > Hello,
> > >
> > > I would please like to ask if describing flash nor used with GPMC,
On Wed, 2015-05-27 at 20:19 -0500, Scott Wood wrote:
> On Wed, May 20, 2015 at 09:17:11PM -0500, Scott Wood wrote:
> > From: Jaiprakash Singh
> >
> > IFC IO accressor are set at run time based
> > on IFC IP registers endianness.IFC node in
> > DTS file contains
On Wed, 2015-08-05 at 00:22 +0300, Ran Shalit wrote:
> On Tue, Aug 4, 2015 at 11:31 PM, Scott Wood wrote:
> > On Tue, 2015-08-04 at 23:26 +0300, Ran Shalit wrote:
> > > On Tue, Aug 4, 2015 at 9:54 PM, Scott Wood
> > > wrote:
> > > > On Tue, 2015
On Thu, Jul 23, 2015 at 11:55:45AM +0800, chenhui zhao wrote:
> Core reset may cause issue if using the proxy mode of MPIC.
> Use the mixed mode of MPIC if enabling CPU hotplug.
>
> Signed-off-by: Chenhui Zhao
> ---
> arch/powerpc/platforms/85xx/corenet_generic.c | 8
> 1 file changed,
On Fri, Jul 24, 2015 at 11:45:33AM +0800, shaohui xie wrote:
> From: Shaohui Xie
>
> The PHY uses XAUI interface to connect to MAC, mostly the PHY used on
> riser card.
>
> Signed-off-by: Shaohui Xie
> ---
> arch/powerpc/configs/corenet32_smp_defconfig | 1 +
> arch/powerpc/configs/corenet64_s
On Tue, 2015-08-04 at 19:18 -0500, Scott Wood wrote:
> On Fri, Jul 24, 2015 at 11:45:33AM +0800, shaohui xie wrote:
> > From: Shaohui Xie
> >
> > The PHY uses XAUI interface to connect to MAC, mostly the PHY used on
> > riser card.
> >
> > Signed-off-by:
On Tue, 2015-08-04 at 19:24 -0500, Scott Wood wrote:
> On Tue, 2015-08-04 at 19:18 -0500, Scott Wood wrote:
> > On Fri, Jul 24, 2015 at 11:45:33AM +0800, shaohui xie wrote:
> > > From: Shaohui Xie
> > >
> > > The PHY uses XAUI interface to connect to MAC, mos
owerpc/config: enable teranetics PHY
> >
> > > On Tue, 2015-08-04 at 19:24 -0500, Scott Wood wrote:
> > > > On Tue, 2015-08-04 at 19:18 -0500, Scott Wood wrote:
> > > > > On Fri, Jul 24, 2015 at 11:45:33AM +0800, shaohui xie wrote:
> > > > > > F
On Wed, 2015-08-05 at 19:30 -0500, Segher Boessenkool wrote:
> On Wed, Aug 05, 2015 at 03:29:35PM +0200, Christophe Leroy wrote:
> > On the 8xx, load latency is 2 cycles and taking branches also takes
> > 2 cycles. So let's unroll the loop.
>
> This is not true for most other 32-bit PowerPC; this
On Wed, 2015-08-05 at 17:27 +0300, Ran Shalit wrote:
> On Wed, Aug 5, 2015 at 9:11 AM, Ran Shalit wrote:
> > On Wed, Aug 5, 2015 at 6:56 AM, Ran Shalit wrote:
> > > On Wed, Aug 5, 2015 at 12:25 AM, Scott Wood
> > > wrote:
> > > > On Wed, 2015
On Wed, 2015-08-05 at 14:50 +0800, Zhao Qiang wrote:
> Bytes alignment is required to manage some special RAM,
> so add gen_pool_first_fit_align to genalloc,
> meanwhile add gen_pool_alloc_data to pass data to
> gen_pool_first_fit_align(modify gen_pool_alloc as a wrapper)
>
> Signed-off-by: Zhao Q
On Thu, 2015-08-06 at 12:32 +0800, Chenhui Zhao wrote:
> On Thu, Aug 6, 2015 at 11:16 AM, Scott Wood
> wrote:
> > On Wed, 2015-08-05 at 19:08 +0800, Chenhui Zhao wrote:
> > > On Sat, Aug 1, 2015 at 8:22 AM, Scott Wood
> > > wrote:
> > > >
On Thu, 2015-08-06 at 12:20 +0800, Chenhui Zhao wrote:
> On Thu, Aug 6, 2015 at 10:57 AM, Scott Wood
> wrote:
> > On Wed, 2015-08-05 at 18:11 +0800, Chenhui Zhao wrote:
> > > On Tue, Aug 4, 2015 at 4:26 AM, Scott Wood
> > > wrote:
> > > > On Mon, 201
On Thu, 2015-08-06 at 13:54 +0800, Chenhui Zhao wrote:
> On Thu, Aug 6, 2015 at 1:46 PM, Scott Wood
> wrote:
> > On Thu, 2015-08-06 at 12:20 +0800, Chenhui Zhao wrote:
> > > On Thu, Aug 6, 2015 at 10:57 AM, Scott Wood
> > >
> > > wrote:
> > &g
On Wed, 2015-08-05 at 23:39 -0500, Segher Boessenkool wrote:
> On Wed, Aug 05, 2015 at 09:31:41PM -0500, Scott Wood wrote:
> > On Wed, 2015-08-05 at 19:30 -0500, Segher Boessenkool wrote:
> > > On Wed, Aug 05, 2015 at 03:29:35PM +0200, Christophe Leroy wrote:
> > > >
On Thu, 2015-08-06 at 09:52 -0700, Brian Norris wrote:
> On Wed, May 20, 2015 at 09:17:11PM -0500, Scott Wood wrote:
> > From: Jaiprakash Singh
> >
> > IFC IO accressor are set at run time based
> > on IFC IP registers endianness.IFC node in
> > DTS file contains
On Fri, 2015-08-07 at 11:19 +0800, Chenhui Zhao wrote:
> On Fri, Aug 7, 2015 at 2:02 AM, Scott Wood
> wrote:
> > On Thu, 2015-08-06 at 13:54 +0800, Chenhui Zhao wrote:
> > > On Thu, Aug 6, 2015 at 1:46 PM, Scott Wood
> > > wrote:
> > > > On Thu, 201
[Please wrap commit messages at around 74 columns]
On Fri, Aug 07, 2015 at 02:58:10PM +0800, Yuanjie Huang wrote:
> PowerPC Book3E processor features hardware-supported single instruction
> execution, and it is used for ptrace(PTRACE_SINGLESTEP, ...). When a
> debugger loads a debuggee, it typica
On Thu, Jul 30, 2015 at 10:33:55AM +0530, Priyanka Jain wrote:
> T1040D4RDB/T1042D4RDB are Freescale Reference Design Board
> which can support T1040/T1042 QorIQ Power
> Architecture™ processor respectively
What is the actual name of this board?
http://patchwork.ozlabs.org/patch/504944/ changes t
On Mon, 2015-08-10 at 10:23 +0800, Huang, Yuanjie wrote:
> Hi Scott,
>
> On 08/08/2015 10:29 AM, Scott Wood wrote:
> > [Please wrap commit messages at around 74 columns]
> Ok, I will when sending a new version.
> >
> > On Fri, Aug 07, 2015 at 02:58:10PM +0800, Yuan
On Sun, 2015-08-09 at 22:18 +0300, Ran Shalit wrote:
> On Sun, Aug 9, 2015 at 9:27 AM, Ran Shalit wrote:
> >
> > Hi ,
> >
> > I reboot the board, with the new device tree localbus, but I don't
> > have any new /dev/mtdX entry for the NOR flash.
> > There is no HW issue, becuase we can R/W access
On Mon, 2015-08-10 at 13:40 +0300, Ran Shalit wrote:
> On Mon, Aug 10, 2015 at 10:48 AM, Ran Shalit wrote:
> > Hello,
> >
> > MPC8349 has general IRQ numbered 0-7,
> > It is required to bind these IRQs with some routine , i.e. they are
> > not used with any specific driver.
> >
> > - Should they
On Tue, 2015-08-11 at 06:45 +0300, Ran Shalit wrote:
> On Tue, Aug 11, 2015 at 5:29 AM, Scott Wood wrote:
> > On Mon, 2015-08-10 at 13:40 +0300, Ran Shalit wrote:
> > > On Mon, Aug 10, 2015 at 10:48 AM, Ran Shalit
> > > wrote:
> > > > Hello,
> > >
On Tue, 2015-08-11 at 05:35 -0500, Yuan Yao-B46683 wrote:
> Hi Scott,
>
> Could you please take some times help to review this patch?
>
> Thanks.
>
> Best Regards,
> Yuan Yao
I've already pushed it to my next branch.
-Scott
___
Linuxppc-dev mailin
On Thu, 2015-08-13 at 19:51 +0800, Kevin Hao wrote:
> It makes no sense to put the instructions for calculating the lock
> value (cpu number + 1) and the clearing of eq bit of cr1 in lbarx/stbcx
> loop. And when the lock is acquired by the other thread, the current
> lock value has no chance to equ
On Thu, 2015-08-13 at 19:51 +0800, Kevin Hao wrote:
> I didn't find anything unusual. But I think we do need to order the
> load/store of esel_next when acquire/release tcd lock. For acquire,
> add a data dependency to order the loads of lock and esel_next.
> For release, even there already have a
On Fri, 2015-08-14 at 15:13 +0800, Kevin Hao wrote:
> On Thu, Aug 13, 2015 at 10:39:19PM -0500, Scott Wood wrote:
> > On Thu, 2015-08-13 at 19:51 +0800, Kevin Hao wrote:
> > > I didn't find anything unusual. But I think we do need to order the
> > > load/store of es
On Fri, 2015-08-14 at 15:13 +0800, Kevin Hao wrote:
> On Thu, Aug 13, 2015 at 01:44:43PM -0500, Scott Wood wrote:
> > On Thu, 2015-08-13 at 19:51 +0800, Kevin Hao wrote:
> > > It makes no sense to put the instructions for calculating the lock
> > > value (cpu number + 1)
describing its individual registers.
For more detail, see the commit message of patch 3.
Scott Wood (5):
cpufreq: qoriq: Don't look at clock implementation details
powerpc/fsl: Move fsl_guts.h out of arch/powerpc
clk: qoriq: Move chip-specific knowledge into driver
cpufreq: qoriq: R
eq to continue working once the clocks
are generated based on the clock driver's knowledge of the chip
rather than a fragile device-tree description of the mux options.
Signed-off-by: Scott Wood
---
v2: non-RFC
drivers/cpufreq/qoriq-cpufreq.c | 47 -
1 file c
Freescale's Layerscape ARM chips use the same structure.
Signed-off-by: Scott Wood
---
v2: non-RFC
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 2 +-
arch/powerpc/platforms/85xx/p1022
will still work, and be directed at the
corresponding new clock.
Signed-off-by: Scott Wood
---
v2: Improved legacy device tree compatibility, particularly for ls1021a.
.../devicetree/bindings/clock/qoriq-clock.txt | 61 +-
drivers/clk/clk-qoriq.c| 1260
ptions (in particular, it removes invalid options).
Signed-off-by: Scott Wood
---
v2: non-RFC
drivers/cpufreq/qoriq-cpufreq.c | 92 +
1 file changed, 2 insertions(+), 90 deletions(-)
diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-cpufr
nodes.
Signed-off-by: Scott Wood
---
v2: non-RFC
arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi | 4 +-
arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi | 8 +--
arch/powerpc/boot/dts/fsl/b4si-post.dtsi | 15 --
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi| 18 ---
arch/powerpc/boot/dt
On Tue, 2015-08-11 at 11:25 -0700, Michael Turquette wrote:
> Hi Scott,
>
> Quoting Scott Wood (2015-06-18 19:49:10)
> > The existing device tree bindings are error-prone and inflexible.
> > Correct the mistake by moving the knowledge into the driver, which
> > has mor
On Sat, 2015-07-18 at 14:57 -0500, Scott Wood wrote:
> It needs to know this because the SMP release mechanism for Freescale
> book3e is different from when booting with normal hardware. In theory
> we could simulate the normal spin table mechanism, but not (easily) at
> the addresse
On Mon, 2015-08-17 at 19:16 +0800, Kevin Hao wrote:
> On Fri, Aug 14, 2015 at 09:44:28PM -0500, Scott Wood wrote:
> > I tried a couple different benchmarks and didn't find a significant
> > difference, relative to the variability of the results running on the
> > same
On Tue, 2015-08-18 at 12:51 +1000, Michael Ellerman wrote:
> On Mon, 2015-08-17 at 13:59 -0500, Scott Wood wrote:
> > On Sat, 2015-07-18 at 14:57 -0500, Scott Wood wrote:
> > > It needs to know this because the SMP release mechanism for Freescale
> > > book3e is diffe
he old one
powerpc/32: cacheable_memcpy becomes memcpy
powerpc/32: Few optimisations in memcpy
Michael Ellerman (1):
powerpc: Update corenet32_smp_defconfig for modern distros
Priyanka Jain (1):
powerpc/fsl-booke: Add T1040D4RDB/T1042D4RDB board support
Scott Wood (5):
po
On Tue, 2015-08-18 at 14:51 +1000, Michael Ellerman wrote:
> On Sat, 2015-18-07 at 20:08:51 UTC, Scott Wood wrote:
> > booted_from_exec is similar to __run_at_load, except that it is set for
> ^
> missing k.
>
> Also do you mind using __booted_f
On Tue, 2015-08-18 at 04:26 -0500, Hou Zhiqiang-B48286 wrote:
> Hi Scott,
>
> Removed both pcibios_fixup_phb and pcibios_fixup_bus.
> Could you please help to apply it?
I applied it and sent a pull request yesterday.
-Scott
___
Linuxppc-dev mailing l
On Wed, Aug 19, 2015 at 03:52:55PM -0500, Pledge Roy-R01356 wrote:
> Sorry for digging up an old thread here Scott, but we never did close on this
> discussion. See my replies inline below
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, May 12, 2015 6:46 PM
>
On Wed, 2013-07-31 at 08:29 +0530, Deepthi Dharwar wrote:
> /*
> - * pseries_idle_probe()
> + * powerpc_idle_probe()
> * Choose state table for shared versus dedicated partition
> */
> -static int pseries_idle_probe(void)
> +static int powerpc_idle_probe(void)
> {
>
> +#ifndef PPC_POWERNV
>
On Thu, 2013-08-01 at 19:49 +0200, Lutz Jaenicke wrote:
> The TBIPA register is part of gianfar's full register set. When starting
> from the MII registers, the start address of struct gfar needs to
> be determined via container_of().
> Experienced with mpc8313 and "fsl,gianfar-mdio" device tree en
On Wed, 2013-08-07 at 09:30 +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2013-08-06 at 18:08 -0500, Scott Wood wrote:
> > Here's another example. get_lppaca() will only build on book3s -- and
> > yet we get requests for e500 code to use this file.
>
> Indeed, Besides
On Tue, 2013-08-06 at 18:10 -0500, Scott Wood wrote:
> On Thu, 2013-08-01 at 19:49 +0200, Lutz Jaenicke wrote:
> > The TBIPA register is part of gianfar's full register set. When starting
> > from the MII registers, the start address of struct gfar needs to
> > be d
On Wed, 2013-08-07 at 10:24 +1000, Paul Mackerras wrote:
> On Tue, Aug 06, 2013 at 07:02:48AM +, Bhushan Bharat-R65777 wrote:
> >
> > I am trying to me the Linux pte search and update generic so that this can
> > be used for powerpc as well.
> >
> > I am not sure which of the below two shoul
On Wed, 2013-08-07 at 15:09 +0530, Mahesh J Salgaonkar wrote:
> diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
> index a1aba53..0b5b04a 100644
> --- a/arch/powerpc/kernel/Makefile
> +++ b/arch/powerpc/kernel/Makefile
> @@ -35,7 +35,7 @@ obj-y
On Wed, 2013-08-07 at 16:22 +0200, Lutz Jaenicke wrote:
> On Tue, Aug 06, 2013 at 06:55:00PM -0500, Scott Wood wrote:
> > On Tue, 2013-08-06 at 18:10 -0500, Scott Wood wrote:
> > > On Thu, 2013-08-01 at 19:49 +0200, Lutz Jaenicke wrote:
> > > > The TBIPA register is p
On Wed, 2013-07-31 at 21:32 -0500, Liu Po-B43644 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, July 31, 2013 11:47 PM
> > To: Liu Po-B43644
> > Cc: Wood Scott-B07421; linuxppc-...@ozlabs.org; ga...@kernel.crashing.org;
> > Fleming Andy-AFLEMING; Hu Min
On Thu, Apr 11, 2013 at 09:56:30PM +0800, Zhenhua Luo wrote:
> When using recent udev, the /dev node mount requires CONFIG_DEVTMPFS_MOUNT
> is enabled in Kernel. The patch enables the option in defconfig of Freescale
> QorIQ targets.
>
> Changed defconfig list:
>arch/powerpc/configs/85xx/p1023
On Fri, Jun 21, 2013 at 06:59:12PM +0800, Minghuan Lian wrote:
> Add compatible "fsl,mpic-msi-v4.3" for MPIC v4.3. MPIC v4.3 contains
> MSIIR and MSIIR1. MSIIR supports 8 MSI registers and MSIIR1 supports
> 16 MSI registers, but uses different IBS and SRS shift. When using
> MSIR1, the interrupt nu
On Fri, Jun 21, 2013 at 06:59:14PM +0800, Minghuan Lian wrote:
> The original MPIC MSI bank contains 8 registers, MPIC v4.3 MSI bank
> contains 16 registers, and this patch adds NR_MSI_REG_MAX and
> NR_MSI_IRQS_MAX to describe the maximum capability of MSI bank.
> MPIC v4.3 provides MSIIR1 to index
On Tue, May 14, 2013 at 04:05:56PM +0800, Dongsheng Wang wrote:
> This problem belongs to the core synchronization issues.
> The cpu1 already updated spin_table values, but bootcore cannot get
> this value in time.
>
> After bootcpu hibiernation restore the pages. we are now running
> with the ker
On Thu, 2013-08-08 at 10:30 -0500, Kumar Gala wrote:
> On Aug 7, 2013, at 7:03 PM, Stephen N Chivers wrote:
>
> > Add support for the Motorola/Emerson MVME5100 Single Board Computer.
> >
> > The MVME5100 is a 6U form factor VME64 computer with:
> >
> >- A single MPC7410 or MPC750 CPU
> >
The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git next
for you to fetch changes up to c8db32c8669f7de05b820ee493492
On Thu, 2013-08-08 at 11:03 +1100, Stephen N Chivers wrote:
> Add support for the Motorola/Emerson MVME5100 Single Board Computer.
>
> The MVME5100 is a 6U form factor VME64 computer with:
>
> - A single MPC7410 or MPC750 CPU
> - A HAWK Processor Host Bridge (CPU to PCI) and
>
On Fri, 2013-08-09 at 09:43 -0500, Kumar Gala wrote:
> On Aug 9, 2013, at 1:03 AM, Benjamin Herrenschmidt wrote:
>
> > On Thu, 2013-08-08 at 17:45 -0500, Scott Wood wrote:
> >> The following changes since commit
> >> 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
>
On Thu, 2013-08-08 at 07:50 +0200, leroy christophe wrote:
> Le 26/06/2013 01:04, Scott Wood a écrit :
> > What happens if there's a race? If another CPU updates wdt_last_ping in
> > parallel, then you could see wdt_last_ping greater than the value you
> > read for
On Tue, 2013-08-06 at 17:01 +0530, Bharat Bhushan wrote:
> @@ -449,7 +446,16 @@ static inline int kvmppc_e500_shadow_map(struct
> kvmppc_vcpu_e500 *vcpu_e500,
> gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
> }
>
> - kvmppc_e500_ref_setup(ref, gtlbe, pfn);
> + pgdir =
On Mon, 2013-08-12 at 10:46 +0800, Zhang Haijun wrote:
> On 08/09/2013 10:48 PM, Kumar Gala wrote:
>
> > On Jul 31, 2013, at 1:25 AM, Haijun Zhang wrote:
> >
> > > Add function to support get voltage from device-tree.
> > > If there are voltage-range specified in device-tree node, this function
>
On Tue, 2013-08-13 at 08:57 +1100, Stephen N Chivers wrote:
> Scott Wood wrote on 08/09/2013 04:07:24 AM:
>
> > From: Scott Wood
> > To: Kumar Gala
> > Cc: Stephen N Chivers , ,
> > , Chris Proctor
> > Date: 08/09/2013 04:08 AM
> > Subject: Re
On Mon, 2013-08-12 at 16:48 +0200, Sebastian Andrzej Siewior wrote:
> From: Thomas Gleixner
>
> These low level handlers cannot be threaded. Mark them NO_THREAD
>
> Reported-by: leroy christophe
> Tested-by: leroy christophe
> Signed-off-by: Thomas Gleixner
> Signed-off-by: Sebastian Andrzej
On Wed, 2013-08-14 at 14:18 +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2013-08-08 at 17:45 -0500, Scott Wood wrote:
> > powerpc/e500: Update compilation flags with core specific
> > options
>
> This breaks the build for my FSL test configs. For some reason gcc 4.7.3
On Fri, 2013-08-16 at 06:02 -0500, Kumar Gala wrote:
> On Aug 16, 2013, at 2:23 AM, Dongsheng Wang wrote:
>
> > From: Wang Dongsheng
> >
> > Each core's AltiVec unit may be placed into a power savings mode
> > by turning off power to the unit. Core hardware will automatically
> > power down the
On Fri, 2013-08-09 at 16:24 +1000, Stephen Rothwell wrote:
> We cannot put the unsetting of config options in the Kconfig file, nor
> the integer or string options.
>
> I checked that after this we get the same .config files generated (except
> for the addition of the new PPC64_DEFCONFIG* config o
On Mon, 2013-08-19 at 15:48 +0530, Deepthi Dharwar wrote:
> Hi Dongsheng,
>
> On 08/19/2013 11:22 AM, Wang Dongsheng-B40534 wrote:
> > I think we should move the states and handle function to
> > arch/power/platform*
> > The states and handle function is belong to backend driver, not for this,
>
On Thu, 2013-08-15 at 07:01 +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2013-08-14 at 12:02 -0500, Scott Wood wrote:
> > On Wed, 2013-08-14 at 14:18 +1000, Benjamin Herrenschmidt wrote:
> > > On Thu, 2013-08-08 at 17:45 -0500, Scott Wood wrote:
> > > > po
On Mon, 2013-08-19 at 12:15 -0600, Anthony Foiani wrote:
> diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
> index 19720a0..851bd3f 100644
> --- a/drivers/ata/sata_fsl.c
> +++ b/drivers/ata/sata_fsl.c
> @@ -293,6 +293,7 @@ static void fsl_sata_set_irq_coalescing(struct ata_host
> *hos
On Sun, 2013-08-18 at 21:53 -0500, Wang Dongsheng-B40534 wrote:
> Thanks for your feedback.
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Saturday, August 17, 2013 12:51 AM
> > To: Kumar Gala
> > Cc: Wang Dongsheng-B40534; linuxppc-dev@lists.ozlabs.org
> > Subject: Re: [PA
On Mon, 2013-08-19 at 07:58 +1100, Stephen N Chivers wrote:
> The serial console setup in 'legacy_serial' does not support reg-shift
> or reg-offset properties and so a preferred_console is not added by it.
> The DTS file for the board does specify the register shift so that
> 'of_serial' will corr
On Tue, 2013-08-20 at 13:28 +1100, Stephen N Chivers wrote:
> Scott Wood wrote on 08/09/2013 11:35:20 AM:
>
> > From: Scott Wood
> > To: Stephen N Chivers
> > Cc: , , Chris Proctor
> > ,
> > Date: 08/09/2013 11:36 AM
> > Subject: Re: [RFC PATCH
ances which will never run on 85xx are left alone.
Signed-off-by: Scott Wood
---
arch/powerpc/boot/ppc_asm.h | 3 +++
arch/powerpc/boot/util.S | 10 +-
arch/powerpc/include/asm/ppc_asm.h| 4 ++--
arch/powerpc/include/asm/reg.h
ozlabs.org/patch/261248/, so that patch is a
prerequisite.
Scott Wood (4):
powerpc: Convert some mftb/mftbu into mfspr
powerpc/85xx: Remove -Wa,-me500
powerpc/booke64: Use appropriate -mcpu
powerpc/e500: Set -mcpu flag for 32-bit e500
arch/powerpc/Makefile
By default use -mcpu=powerpc64 rather than -mtune=power7
Add options for e5500/e6500, with fallbacks for older compilers.
Hide the POWER cpu options in booke configs.
Signed-off-by: Scott Wood
---
arch/powerpc/Makefile | 9 +
arch/powerpc/platforms/Kconfig.cputype
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