On Sun, 2015-08-09 at 22:18 +0300, Ran Shalit wrote:
> On Sun, Aug 9, 2015 at 9:27 AM, Ran Shalit <ransha...@gmail.com> wrote:
> >
> > Hi ,
> >
> > I reboot the board, with the new device tree localbus, but I don't
> > have any new /dev/mtdX entry for the NOR flash.
> > There is no HW issue, becuase we can R/W access the NOR flash from u-boot.
> > Is there any hint what can be the issue here ? I've checked in kernel
> > config and validated that mtd is supported.
> > The NOR flash is S29GL512P , SPANSION.
> >
> > localbus@e0005000{
> > #address-cells = <2>;
> > #size-cells = <1>;
> > compatible = "fsl,mpc8349-localbus", "simple-bus";
> > reg = <0xe0005000 0x1000>;
> > interrupts = <77 0x8>;
> > interrupt-parent = <&ipic>;
> >
> >
> > # NOR and NAND Flashes
> > ranges = <0x0 0x0 0xff800000 0x00800000
> > 0x1 0x0 0xF8000000 0x08000000
> > 0x2 0x0 0xf7e00000 0x00200000>;
You have overlap between cs0 and cs1.
> > nor@0,0 {
> > #address-cells = <1>;
> > #size-cells = <1>;
> > compatible = "cfi-flash";
> > reg = <0x0 0x0 0x00800000>;
> > #bank-width = <1>;
> > device-width = <1>;
It's "bank-width", not "#bank-width".
> >
> > };
> > };
> >
> > Best Regards,
> > Ran
>
> Hello,
>
> Just to update,
> I eventually solved this issue.
> I don't do any configuration in device tree. All BRx configuration is
> already done in u-boot (as was done from the start), and everything
> seems to work OK: cpld, nvram.
>
> For NOR FPGA I only added NOR configuration to kernel:
>
> CONFIG_MTD_PHYSMAP=y
> CONFIG_MTD_PHYSMAP_START=0xf8000000
> CONFIG_MTD_PHYSMAP_LEN=0x7800000
> CONFIG_MTD_PHYSMAP_BANKWIDTH=4
I don't recommend this. You're bypassing the device tree entirely.
Why did you put bankwidth 4 here, but bankwidth 1 in the device tere?
-Scott
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