On Tue, 2015-06-09 at 21:00 -0500, Tang Yuantian-B29983 wrote:
> Please see my replay inline.
>
> From: Wood Scott-B07421
> Sent: Wednesday, June 10, 2015 6:28 AM
> To: Tang Yuantian-B29983
> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org;
> linux-ker
On Wed, 2015-06-10 at 03:56 -0500, Jia Hongtao-B38951 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, June 10, 2015 1:47 AM
> > To: Jia Hongtao-B38951
> > Cc: edubez...@gmail.com; linuxppc-dev@lists.ozlabs.org;
> > devicet...@vger.kernel.org; robh...@kernel.or
On Wed, 2015-06-10 at 18:21 +0300, Madalin Bucur wrote:
> From: Igal Liberman
>
> This patch presents the FMan Foundation Libraries (FLIB) headers.
> The FMan FLib provides the basic API used by the FMan drivers to
> configure and control the FMan hardware.
>
> Signed-off-by: Igal Liberman
> --
On Wed, 2015-06-10 at 18:21 +0300, Madalin Bucur wrote:
> The Freescale Data Path Acceleration Architecture (DPAA)
> is a set of hardware components on specific QorIQ multicore
> processors. This architecture provides the infrastructure to
> support simplified sharing of networking interfaces and
>
On Wed, 2015-06-10 at 13:41 +0200, Peter Zijlstra wrote:
> Hi Mike, Ben,
>
> I just noticed:
>
> arch/powerpc/Kconfig: select HAVE_PERF_EVENTS_NMI if PPC64
>
> But can't ppc32 have FSL_EMB perf?
Yes, but it doesn't use NMIs. ppc64 has lazy interrupt disabling
which functions as a pseudo-NMI
On Wed, 2015-06-10 at 21:27 +0200, Peter Zijlstra wrote:
> On Wed, 2015-06-10 at 14:17 -0500, Scott Wood wrote:
> > On Wed, 2015-06-10 at 13:41 +0200, Peter Zijlstra wrote:
> > > Hi Mike, Ben,
> > >
> > > I just noticed:
> > >
> > > arch/p
On Wed, 2015-06-10 at 23:14 +0200, Peter Zijlstra wrote:
> On Wed, 2015-06-10 at 15:13 -0500, Scott Wood wrote:
>
> > What sort of "nesting nonsense" would we get on ppc32? I wasn't
> > trying to say that the pseudo-NMIs didn't count -- I was pointing
>
On Thu, 2015-06-11 at 19:10 +0300, Cristian Stoica wrote:
> On 06/11/2015 06:38 PM, Greg KH wrote:
> > On Thu, Jun 11, 2015 at 05:42:00PM +0300, Cristian Stoica wrote:
> >
> > Why?
> >
>
> This patch matches the input argument "size" of ioremap() with the
> output of request_mem_region() (which
On Fri, 2015-06-12 at 21:52 -0500, Lijun Pan wrote:
> It is always a headache dealing with different defconfigs
> though they only differ in a few places. Hence we are proposing a new
> way of writing the defconfig:
> 1. Define a basic defconfig say mpc85xx_basic_defconfig
> 2. Spin off as much fea
On Mon, 2015-06-15 at 23:42 -0400, Bob Cochran wrote:
> On 06/10/2015 11:21 AM, Madalin Bucur wrote:
> >
> > +#define FM_QMI_NO_ECC_EXCEPTIONS /* P1 */
> > +#define FM_CSI_CFED_LIMIT /* P1 */
> > +#define FM_PEDANTIC_DMA/* P1 */
> > +#define F
On Wed, 2015-06-17 at 09:59 -0500, Liberman Igal-B31950 wrote:
>
> Regards,
> Igal Liberman.
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, June 10, 2015 9:54 PM
> > To: Bucur Madalin-Cristian-B32716
> > Cc: net...@vger.kernel.org; linux-ker...@vger.kernel.org;
On Tue, 2015-06-16 at 14:00 -0400, Bob Cochran wrote:
> On 06/16/2015 05:26 AM, Yuantian.Tang@freescale.comwrote:
> > From: Tang Yuantian
> >
> > There is a RCPM (Run Control/Power Management) in Freescale QorIQ
> > series processors. The device performs tasks associated with device
> > run cont
On Wed, 2015-06-17 at 19:45 +1000, Michael Ellerman wrote:
> On Wed, 2015-06-17 at 08:21 +0530, Aneesh Kumar K.V wrote:
> > "Aneesh Kumar K.V" writes:
> >
> >
> > Hi Scott,
> >
> > > Current swap encoding in pte can't support large pfns
> > > above 4TB. Change the swap encoding such that we put
describing its individual registers.
For more detail, see the commit message of patch 4.
Scott Wood (8):
ARM: dts: ls1021a: Fix clockgen node
cpufreq: qoriq: Don't look at clock implementation details
powerpc/fsl: Move fsl_guts.h out of arch/powerpc
clk: qoriq: Move chip-specific knowledge
reference the sysclk node.
Signed-off-by: Scott Wood
Cc: Jingchang Lu
Cc: Shawn Guo
---
arch/arm/boot/dts/ls1021a.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index c70bb27..a0a1c51 100644
--- a/arch/arm/boot/dts/ls
eq to continue working once the clocks
are generated based on the clock driver's knowledge of the chip
rather than a fragile device-tree description of the mux options.
Signed-off-by: Scott Wood
---
drivers/cpufreq/qoriq-cpufreq.c | 47 -
1 file changed, 18
Freescale's Layerscape ARM chips use the same structure.
Signed-off-by: Scott Wood
---
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 2 +-
arch/powerpc/platforms/85xx/p1022
evice trees will continue to work. This patch does not remove
the code for handling the old nodes. A subsequent patch removes that
code, but still binds against those nodes and redirects clock lookups
to the clocks generated by the new code.
Signed-off-by: Scott Wood
---
.../devicetree/bindi
ignored, but "clocks" properties pointing at the old nodes will
still work.
This also lets us get rid of most of the legacy code.
Signed-off-by: Scott Wood
---
drivers/clk/clk-qoriq.c | 348
1 file changed, 54 insertions(+), 294 deletion
ptions (in particular, it removes invalid options).
Signed-off-by: Scott Wood
---
drivers/cpufreq/qoriq-cpufreq.c | 92 +
1 file changed, 2 insertions(+), 90 deletions(-)
diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-cpufreq.c
index 32ab99
This allows the "clocks" property to be used in the absence of
legacy nodes, and for clocks that the legacy nodes do not describe.
Signed-off-by: Scott Wood
---
drivers/clk/clk-qoriq.c | 63 -
1 file changed, 62 insertions(+), 1 deletio
nodes.
Signed-off-by: Scott Wood
---
arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi | 4 +-
arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi | 8 +--
arch/powerpc/boot/dts/fsl/b4si-post.dtsi | 15 --
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi| 18 ---
arch/powerpc/boot/dts/fsl/p2
On Mon, 2015-06-22 at 19:01 +0200, Christophe Leroy wrote:
> The powerpc64 checksum wrapper functions adds the
> csum_and_copy_to_user() which
> otherwise is implemented in include/net/checksum.h by using
> csum_partial() then
> copy_to_user()
>
> Those two wrapper fonctions are also applicable
On Fri, 2015-06-26 at 01:06 +0200, Paul Bolle wrote:
> (Evolution 3.16 is basically unbearable for replying to patches.
> Anyone
> else running into this?)
If you mean the crazy lag when selecting moderate-to-large amounts of
text (for snipping), yes.
-Scott
__
On Wed, 2015-06-24 at 22:33 +0300, igal.liber...@freescale.com wrote:
> From: Igal Liberman
>
> The FMan FLib provides the basic API used by the FMan drivers to
> > configure and control the FMan hardware.
>
> Signed-off-by: Igal Liberman
Again, what is an FLib? What determines whether conten
On Wed, 2015-06-24 at 22:34 +0300, igal.liber...@freescale.com wrote:
> From: Igal Liberman
>
> The FMan MAC FLib provides basic API used by the drivers to
> configure and control the FMan MAC hardware.
>
> Signed-off-by: Igal Liberman
...
> > +int fman_dtsec_mii_write_reg(struct dtsec_mii_reg
On Wed, 2015-06-24 at 22:34 +0300, igal.liber...@freescale.com wrote:
> + struct muram_info *p_muram;
No Hungarian notation.
> +void fm_muram_free(struct muram_info *p_muram)
> +{
> + /* Destroy pool */
> + gen_pool_destroy(p_muram->pool);
> + /* Unmap memory */
> + iounmap(p_
On Fri, 2015-06-26 at 12:21 +1000, Michael Ellerman wrote:
> On Thu, 2015-06-25 at 19:59 -0500, Scott Wood wrote:
> > On Fri, 2015-06-26 at 01:06 +0200, Paul Bolle wrote:
> > > (Evolution 3.16 is basically unbearable for replying to patches.
> > > Anyone
&
On Wed, 2015-06-24 at 22:35 +0300, igal.liber...@freescale.com wrote:
> From: Igal Liberman
>
> Add Frame Manger Driver support.
> This patch adds The FMan configuration, initialization and
> runtime control routines.
>
> Signed-off-by: Igal Liberman
> ---
> drivers/net/ethernet/freescale/fman
On Tue, 2015-06-23 at 16:07 +0800, yuantian.t...@freescale.com wrote:
> From: Tang Yuantian
>
> There is a RCPM (Run Control/Power Management) in Freescale QorIQ
> series processors. The device performs tasks associated with device
> run control and power management.
>
> The driver implements so
Why are these two parts being submitted separately? Worse, the CC list seems
to be different for each part as I'm not seeing the "DPAA ETH driver".
-Scott
On Sun, 2015-06-28 at 03:06 -0500, Liberman Igal-B31950 wrote:
> Hi Paul,
> All those exported functions are used by DPAA ETH driver, which
On Thu, 2015-07-02 at 10:32 -0500, Liberman Igal-B31950 wrote:
> Hi Scott,
> Thank you for your feedback, please take a look at my comments/questions.
>
> Regards,
> Igal Liberman.
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, June 26, 2015 6:55 AM
> > To: Liberma
On Wed, 2015-06-10 at 14:27 +0800, Wenwei Tao wrote:
> Hugetlb VMAs are not mergeable, that means a VMA couldn't have VM_HUGETLB
> and
> VM_MERGEABLE been set in the same time. So we use VM_HUGETLB to indicate new
> mergeable VMAs. Because of that a VMA which has VM_HUGETLB been set is a
> hugetl
On Fri, 2015-07-03 at 16:47 +0800, wenwei tao wrote:
> Hi Scott
>
> Thank you for your comments.
>
> Kernel already has that function: is_vm_hugetlb_page() , but the
> original code didn't use it,
> in order to keep the coding style of the original code, I didn't use it
> either.
>
> For the sen
On Fri, 2015-07-03 at 17:50 +0800, Shengzhou Liu wrote:
> Add support for INA220 current sense.
>
> Signed-off-by: Shengzhou Liu
> ---
> arch/powerpc/boot/dts/t1024rdb.dts | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/powerpc/boot/dts/t1024rdb.dts
> b/arch/powerpc/boot/d
On Tue, 2015-07-07 at 16:05 +0800, wenwei tao wrote:
> Hi Scott
>
> I understand what you said.
>
> I will use the function 'is_vm_hugetlb_page()' to hide the bit
> combinations according to your comments in the next version of patch
> set.
>
> But for the situation like below, there isn't an ob
On Tue, 2015-07-07 at 15:51 +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Move fsl_diu_init into diu probe function, because it should be
> initialized when system get diu device tree node, not always do
> initialization.
>
> Signed-off-by: Wang Dongsheng
> ---
> Changes:
> Rebase ori
On Tue, 2015-07-07 at 21:30 -0500, Wang Dongsheng-B40534 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, July 08, 2015 5:51 AM
> > To: Wang Dongsheng-B40534
> > Cc: Sun York-R58495; linuxppc-dev@lists.ozlabs.org; Jin Zhengxiong-R64188
> > Subject: Re: [RESE
On Tue, 2015-07-07 at 21:46 -0500, Wang Dongsheng-B40534 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, July 08, 2015 10:41 AM
> > To: Wang Dongsheng-B40534
> > Cc: Sun York-R58495; linuxppc-dev@lists.ozlabs.org; Jin Zhengxiong-R64188
> > Subject: Re: [RES
On Wed, 2015-07-08 at 11:23 +1000, Samuel Mendoza-Jonas wrote:
> If the target kernel does not inlcude the FIXUP_ENDIAN check, coming
> from a different-endian kernel will cause the target kernel to panic.
> All ppc64 kernels can handle starting in big-endian mode, so return to
> big-endian before
On Tue, 2015-07-07 at 21:54 -0500, Zhao Qiang-B45475 wrote:
> I need to ensure one thing,
> In your point, you want me to use lib/genalloc.c instead of rheap.c.
> Or just think rheap.c is not proper to put into lib?
>
> Best Regards
> Zhao Qiang
I want you to use lib/genalloc.c.
-Scott
___
On Tue, 2015-07-07 at 22:26 -0500, Zhao Qiang-B45475 wrote:
> Now the point is, genalloc is not so proper to qe muram while rheap is
> written to manage muram,
rheap is not specific to muram.
> if use genalloc instead of rheap, there will be amounts of work to do.
Not much. I think I've spent
On Wed, 2015-07-08 at 13:29 +1000, Samuel Mendoza-Jonas wrote:
> Older big-endian ppc64 kernels don't include the FIXUP_ENDIAN check,
> meaning if we kexec from a little-endian kernel the target kernel will
> fail to boot.
> Returning to big-endian before we enter the target kernel ensures that
> t
On Wed, 2015-07-08 at 14:04 +1000, Paul Mackerras wrote:
> On Tue, Jul 07, 2015 at 09:35:38PM -0500, Scott Wood wrote:
> >
> > Also, it would be better to use label subtraction rather than hardcoding
> > "28", and the bcl instruction would be more readable as
On Wed, 2015-07-08 at 02:25 -0500, Zhao Qiang-B45475 wrote:
> So I will add two func for my use, do you think it is ok?
> I need to align the address of allocated muram.
> And I will set algo = gen_pool_first_fit_align.
>
> +unsigned long gen_pool_alloc_align(struct gen_pool *pool, size_t size,
>
On Wed, 2015-07-08 at 14:37 +1000, Samuel Mendoza-Jonas wrote:
> If the target kernel does not inlcude the FIXUP_ENDIAN check, coming
> from a different-endian kernel will cause the target kernel to panic.
> All ppc64 kernels can handle starting in big-endian mode, so return to
> big-endian before
On Wed, 2015-07-08 at 22:18 -0500, Zhao Qiang-B45475 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Thursday, July 09, 2015 2:59 AM
> > To: Zhao Qiang-B45475
> > Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> > Subject: Re: [PATCH 2/2] rheap: move rheap.c from a
On Thu, 2015-07-09 at 01:05 -0500, Zhao Qiang-B45475 wrote:
> On Wed, 2015-07-09 at 11:51 -0500, Wood Scott wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Thursday, July 09, 2015 11:51 AM
> > To: Zhao Qiang-B45475
> > Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63
On Thu, 2015-07-09 at 01:14 -0500, Zhao Qiang-B45475 wrote:
> On Wed, 2015-07-09 at 02:09PM -0500, Wood Scott wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Thursday, July 09, 2015 2:09 PM
> > To: Zhao Qiang-B45475
> > Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R6
On Thu, 2015-07-09 at 10:42 -0500, Segher Boessenkool wrote:
> On Tue, Jul 07, 2015 at 11:22:08PM -0500, Scott Wood wrote:
> > > I agree about using labels, but "bcl 20,31,foo" is not the same thing
> > > as "bl foo". The former is a form of bl that do
r arch/powerpc
> > directory,
> > using arch/powerpc/lib/rheap.c to manage muram.
> > Now it support both arm(ls1021,ls1043,ls2085 and such on) and powerpc,
> > the code need to move from arch/powerpc to public direcory,
> > Scott wood hopes to use genalloc to ma
On Thu, 2015-07-09 at 15:47 +0800, Zhao Qiang wrote:
> @@ -541,13 +562,14 @@ EXPORT_SYMBOL(gen_pool_first_fit_order_align);
> * which we can allocate the memory.
> */
> unsigned long gen_pool_best_fit(unsigned long *map, unsigned long size,
> - unsigned long start, unsigned int nr,
On Thu, 2015-07-09 at 03:00 -0500, Jia Hongtao-B38951 wrote:
> Hi Scott,
>
> Patch updated to V3, please help to review.
> Thanks.
>
> ---
> Best Regards,
> Hongtao
It looks OK.
-Scott
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
http
On Fri, 2015-07-10 at 10:38 +0200, Paul Bolle wrote:
> On do, 2015-07-09 at 16:21 -0400, Roy Pledge wrote:
> > --- /dev/null
> > +++ b/drivers/soc/fsl/qbman/Kconfig
> > @@ -0,0 +1,33 @@
> > +menuconfig FSL_DPA
> > + bool "Freescale DPAA support"
> > + depends on FSL_SOC || COMPILE_TEST
>
> Are
On Fri, 2015-07-10 at 13:36 +0200, Paul Bolle wrote:
> On do, 2015-07-09 at 16:21 -0400, Roy Pledge wrote:
> > +#ifdef CONFIG_FSL_DPA_CHECKING
> > +#define DPA_ASSERT(x) \
> > + do { \
> > + if (!(x)) { \
> > + pr_crit("ASSERT: (%s:%d) %s\n", __FILE__, __LINE__, \
> >
On Fri, 2015-07-10 at 13:29 -0500, Pledge Roy-R01356 wrote:
> > return in_be32((void *)bm + offset);
> > > ^
> > > [...]/drivers/soc/fsl/qbman/bman.c: In function ‘__bm_out’:
> > > [...]/drivers/soc/fsl/qbman/bman.c:172:2: error: implicit declaration
> > > of function ‘out_be32’ [-Werror
On Fri, 2015-07-10 at 15:57 -0500, Pledge Roy-R01356 wrote:
> >
> > On Fri, 2015-07-10 at 13:36 +0200, Paul Bolle wrote:
> > > On do, 2015-07-09 at 16:21 -0400, Roy Pledge wrote:
> > > > +#ifdef CONFIG_FSL_DPA_CHECKING
> > > > +#define DPA_ASSERT(x) \
> > > > + do { \
> > > > + if (!(x
On Sun, 2015-07-12 at 00:47 -0500, Priyanka Jain wrote:
> +/ {
> + model = "fsl,T1040D4RDB";
> + compatible = "fsl,T1040D4RDB";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + interrupt-parent = <&mpic>;
> +
> + ifc: localbus@ffe124000{
> + cpld@3,0 {
> +
On Wed, 2015-07-15 at 15:00 +0530, Priyanka Jain wrote:
> T1040D4RDB/T1042D4RDB are Freescale Reference Design Board
> which can support T1040/T1042 QorIQ Power
> Architecture™ processor respectively
>
> T1040D4RDB/T1042D4RDB board Overview
> -
> - SERDES Connec
On Thu, 2015-07-16 at 04:34 -0500, Jain Priyanka-B32167 wrote:
>
> -Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, July 15, 2015 11:17 PM
> To: Jain Priyanka-B32167
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH][v2] powerpc/fsl-booke: Add T1040D4RDB/T1042D4RDB
On Thu, 2015-07-16 at 21:18 +0530, Hemant Kumar wrote:
> To analyze the exit events with perf, we need kvm_perf.h to be added in
> the arch/powerpc directory, where the kvm tracepoints needed to trace
> the KVM exit events are defined.
>
> This patch adds "kvm_perf_book3s.h" to indicate that the t
OK, thanks. Assuming no similar issues when testing, I'll apply this patch
the next time I do a batch of patch application.
Any thoughts regarding better error handling?
-Scott
On Wed, 2015-07-15 at 21:37 -0500, Lu Yangbo-B47093 wrote:
> Hi Scott,
>
> Now the patch below has been merged on
>
On Wed, 2015-07-15 at 21:37 -0500, Lu Yangbo-B47093 wrote:
> Any comments?
> Thanks.
Sorry, I must have missed this on my last time through the patch queue. I
see you've decimalized the fiper and max-adj properties, which is good... but
does it really make sense for tmr-add? I'm not familiar w
es it anyway (which is not something you want to
only find out once the main kernel has crashed in the field, especially
if whether it works or not depends on which cpu crashed).
Signed-off-by: Scott Wood
Cc: Tang Yuantian
---
I'm sending this before the rest of the kexec patches, since Yuan
On Fri, 2015-07-17 at 01:17 -0500, Jain Priyanka-B32167 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, July 17, 2015 1:06 AM
> > To: Jain Priyanka-B32167
> > Cc: linuxppc-dev@lists.ozlabs.org
> > Subject: Re: [PATCH][v2] powerpc/fsl-booke: Add T1040D4RDB/T104
map_kernel() doesn't catch all places that create kernel PTEs. In
particular, vmalloc() calls set_pte_at() directly. This causes a
crash when booting a non-SMP kernel on e6500.
Move the sync to __set_pte(), to be executed only for kernel addresses.
Signed-off-by: Scott Wood
---
arch/po
real address table)
which allows KVM guests to control the WIMGE bits. This means that
KVM cannot force the M bit on the way it usually does, so the guest had
better set it itself.
Signed-off-by: Scott Wood
---
arch/powerpc/include/asm/pte-common.h | 3 ++-
arch/powerpc/kernel/exceptions
long arguments to be passed as int.
Signed-off-by: Scott Wood
---
kexec/arch/ppc64/crashdump-ppc64.c | 3 ++-
kexec/arch/ppc64/kexec-elf-ppc64.c | 9 +
2 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/kexec/arch/ppc64/crashdump-ppc64.c
b/kexec/arch/ppc64/crashdump-ppc64.c
more communication between the kernel and kexec to set that up.
Since there's already a similar flag being set (for kdump only), this
seemed like a reasonable approach.
Signed-off-by: Scott Wood
---
kexec/arch/ppc64/kexec-elf-ppc64.c | 11 ++-
kexec/arch/ppc64/kexec-ppc64.h | 2 ++
mail/kexec/2015-July/014048.html ("ppc64:
Add a flag to tell the kernel it's booting from kexec").
Scott Wood (11):
powerpc/85xx: Load all early TLB entries at once
powerpc/85xx: Don't use generic timebase sync on 64-bit
crypto: caam: Blacklist CAAM when kexec is enabled
x27;t want another thread to be running when we
create a temporary trampoline TLB1 entry.
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/setup_64.c | 8 +
arch/powerpc/mm/fsl_booke_mmu.c | 15 --
arch/powerpc/mm/mmu_decl.h | 1 +
arch/powerpc/mm/tlb_nohash.c
like the fact that the hard reset is done on 32-bit
kexec, and I especially don't like the timebase sync being triggered
only on the presence of CONFIG_KEXEC rather than actually booting in
that environment, but that's beyond the scope of this patch...
Signed-off-by: Scott Wood
--
This driver hangs the kernel on boot when loaded via kexec.
To make this driver kexec-safe, add a suspend or freeze hook, and when
probing, don't make any assumptions about the existing hardware state
(e.g. don't request_irq before quiescing the device).
Signed-off-by: Scott Wood
Cc
-off-by: Scott Wood
---
Supposedly there are similar problems with certain low power states --
the SDK disables coreint when CPU hotplug is enabled -- so disabling it
for kexec as well doesn't seem like a big deal.
---
arch/powerpc/platforms/85xx/corenet_generic.c | 4
1 file chang
anism that does. Thus, more TLB entries are needed than
would normally be used, as the total memory to be mapped might not be a
power of two.
Signed-off-by: Scott Wood
---
arch/powerpc/mm/fsl_booke_mmu.c | 22 +++---
arch/powerpc/mm/mmu_decl.h | 3 ++-
arch/powerpc/mm/tlb_noh
From: Tiejun Chen
Unlike 32-bit 85xx kexec, we don't do a core reset.
Signed-off-by: Tiejun Chen
[scottwood: edit changelog, and cleanup]
Signed-off-by: Scott Wood
---
arch/powerpc/platforms/85xx/smp.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/powerpc/plat
The new kernel will be expecting secondary threads to be disabled,
not spinning.
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/head_64.S | 16 +
arch/powerpc/platforms/85xx/smp.c | 48 +++
2 files changed, 64 insertions(+)
diff --git a
From: Tiejun Chen
Rename 'interrupt_end_book3e' to '__end_interrupts' so that the symbol
can be used by both book3s and book3e.
Signed-off-by: Tiejun Chen
[scottwood: edit changelog]
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/exceptions-64e.S | 8
1 file c
skip copy_to_flush -- but it will be
needed for kexec support.
Signed-off-by: Tiejun Chen
[scottwood: split patch and rewrote changelog]
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/head_64.S | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/k
ipvr properly again
after .relocate.
Signed-off-by: Tiejun Chen
[scottwood: cleanup and ifdef removal]
Signed-off-by: Scott Wood
---
arch/powerpc/include/asm/exception-64e.h | 4 ++--
arch/powerpc/kernel/exceptions-64e.S | 9 +++--
arch/powerpc/kernel/head_64.S| 22
While book3e doesn't have "real mode", we still want to wait for
all the non-crash cpus to complete their shutdown.
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/crash.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/crash.c
This limit only makes sense on book3s, and on book3e it can cause
problems with kdump if we don't have any memory under 256 MiB.
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/paca.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/paca.c b
From: Tiejun Chen
book3e has no real MMU mode so we have to create an identity TLB
mapping to make sure we can access the real physical address.
Signed-off-by: Tiejun Chen
[scottwood: cleanup, and split off some changes]
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/misc_64.S | 52
ozlabs.org/patch/257657/
("book3e/kexec/kdump: introduce a kexec kernel flag"), this flag is at
a fixed address for ABI stability, and actually gets set properly in
the kdump case (i.e. on the crash kernel, not on the crashing kernel).
Signed-off-by: Scott Wood
---
This depends on the kexe
booke-32 will use VIRT_PHYS_OFFSET, so given the
issues with its calculation, restrict its definition to booke-32.
Signed-off-by: Scott Wood
---
arch/powerpc/include/asm/page.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc
book3e_secondary_core_init will only create a TLB entry if r4 = 0,
so do so.
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/misc_64.S | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index c5915f0..fb955d9 100644
--- a/arch
From: Tiejun Chen
Allow KEXEC for book3e, and bypass or convert non-book3e stuff
in kexec code.
Signed-off-by: Tiejun Chen
[scottw...@freescale.com: move code to minimize diff, and cleanup]
Signed-off-by: Scott Wood
---
arch/powerpc/Kconfig | 2 +-
arch/powerpc/kernel
On Mon, 2015-07-20 at 01:33 -0500, Lu Yangbo-B47093 wrote:
> > On Wed, 2015-07-15 at 21:37 -0500, Lu Yangbo-B47093 wrote:
> > > Any comments?
> > > Thanks.
> >
> > Sorry, I must have missed this on my last time through the patch queue.
> > I see you've decimalized the fiper and max-adj properties,
On Mon, 2015-07-20 at 01:43 -0500, Lu Yangbo-B47093 wrote:
> > OK, thanks. Assuming no similar issues when testing, I'll apply this
> > patch the next time I do a batch of patch application.
> >
> > Any thoughts regarding better error handling?
> >
> > -Scott
>
> Do you mean SD test?
I just me
On Wed, 2015-07-22 at 05:49 -0500, Jain Priyanka-B32167 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, July 17, 2015 10:37 PM
> > To: Jain Priyanka-B32167
> > Cc: linuxppc-dev@lists.ozlabs.org
> > Subject: Re: [PATCH][v2] powerpc/fsl-booke: Add T1040D4RDB/T10
On Mon, 2015-07-20 at 15:32 +0800, Zhao Qiang wrote:
> From: Zhao Qiang
>
> p1010rdb-pb use the irq[4:5] for inta and intb to pcie,
> it is active-high, so set it.
What about revisions of p1010rdb other than pb?
> Signed-off-by: Zhao Qiang
> Change-Id: I29db41b4a8b5a67c18151099884edda6de4d9d1a
On Tue, 2015-07-21 at 17:45 +0800, Yangbo Lu wrote:
> Add 'cpu-rev' property for cpus node to support getting cpu revision
> from dts, since it's not good to get cpu revision using powerpc specific
> function(like SVR_REV()) in common drivers.
No. Don't modify the device tree within Linux without
On Tue, 2015-07-21 at 15:02 +0200, Ulf Hansson wrote:
> On 21 July 2015 at 11:45, Yangbo Lu wrote:
> > For T4240-R1.0-R2.0, the HOSTVER register has incorrcet vender
> > version value and sdhc spec version value. This will break down
> > the ADMA data transfer. So add workaround to get right value
On Wed, 2015-07-22 at 18:08 +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
You CCed this to
b21...@freescale.com. Who is that? It would be nice to use "friendly"
e-mail addresses, but at least include the name along with the e-mail address.
I suggest CCing the people who added these device
On Fri, 2015-07-24 at 10:45 -0500, Bucur Madalin-Cristian-B32716 wrote:
> > -Original Message-
> > From: Joe Perches [mailto:j...@perches.com]
> > On Wed, 2015-07-22 at 19:16 +0300, Madalin Bucur wrote:
> > > +static int __init dpa_load(void)
> > > +{
> > []
> > > + err = platform_driver_re
On Mon, 2015-07-27 at 09:58 +0200, Ulf Hansson wrote:
> On 25 July 2015 at 04:27, Scott Wood wrote:
> > On Tue, 2015-07-21 at 15:02 +0200, Ulf Hansson wrote:
> > > On 21 July 2015 at 11:45, Yangbo Lu wrote:
> > > > For T4240-R1.0-R2.0, the HOSTVER register has in
On Mon, 2015-07-27 at 17:57 +0800, Zhao Qiang wrote:
> diff --git a/lib/genalloc.c b/lib/genalloc.c
> index d214866..e6608cd 100644
> --- a/lib/genalloc.c
> +++ b/lib/genalloc.c
> @@ -509,6 +509,31 @@ unsigned long gen_pool_first_fit(unsigned long *map,
> unsigned long size,
> EXPORT_SYMBOL(gen_p
On Mon, 2015-07-27 at 14:26 +0800, liulijun wrote:
> I've been struggling with a kernel panic during enumeration of a Rapid IO
> system.
> I am using the AM4140 with Freescale P4080 processor. The Linux
> kernel'version is 2.6.34.6.
That is a very old kernel. If you're using that old kernel be
On Tue, 2015-07-28 at 21:34 -0500, Hou Zhiqiang-B48286 wrote:
> Hi Scott and all,
>
> Please ignore this patch!
Did you figure out what was actually causing you to see CPU stalls?
-Scott
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t the rfbptr code has deeper
issues. It uses the virtual address as the DMA address, which again,
happens to work in the environments where this driver is currently
used, but is not the right thing to do.
Signed-off-by: Scott Wood
---
Alternatively, if there's a desire to not mess with this cod
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