On Tue, 2014-12-09 at 12:54 -0800, Linus Torvalds wrote:
> On Mon, Dec 8, 2014 at 3:58 PM, Anton Blanchard wrote:
> > Hi Ingo,
> >
> >> At that point I thought the previous task_cpu() was somewhat ingrained
> >> in the scheduler and came up with the patch. If not, we could go on a
> >> hunt to see
From: Benjamin Herrenschmidt
Newer versions of OPAL will provide this, so let's expose it to user
space so tools like perf can use it to properly decode samples in
firmware space.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Michael Ellerman
---
arch/powerpc/platforms/powernv/o
On Wed, 2014-10-12 at 22:29:13 UTC, suka...@linux.vnet.ibm.com wrote:
> Michael Ellerman [m...@ellerman.id.au] wrote:
> | On Tue, 2014-12-09 at 23:06 -0800, Sukadev Bhattiprolu wrote:
> | > From 470c16c8955672103a9529c78dffbb239e9e27b8 Mon Sep 17 00:00:00 2001
> | > From: S
27;s buf_lock
Mahesh Salgaonkar (2):
powerpc/powernv: Cleanup unused MCE definitions/declarations.
powerpc/book3s: Fix partial invalidation of TLBs in MCE code.
Martijn de Gouw (1):
powerpc/fsl-rio: add support for mapping inbound windows
Michael Ellerman (11):
Merge branch &
On Thu, 2014-11-12 at 16:44:54 UTC, Hari Bathini wrote:
> In LE kernel, we currently have a hack for kexec that resets the exception
> endian
> before starting a new kernel as the kernel that is loaded could be a big
> endian
> or a little endian kernel. In kdump case, resetting exception endian
On Wed, 2014-12-10 at 17:50 -0600, Scott Wood wrote:
> On Wed, 2014-12-10 at 13:14 +1100, Michael Ellerman wrote:
> > On Tue, 2014-12-09 at 18:14 -0600, Scott Wood wrote:
> > > What benefit is there to ignoring "scripture" here? Going from an easy
> > > to
On Fri, 2014-12-05 at 16:13 +0100, Greg Kurz wrote:
> As requested by mpe, this series now covers both the smt-enabled
> kernel parameter and the ibm,smt-enabled property. The cleanup was
> split into 3 separate patches to ease review, but I guess they
> could be folded into a single patch as well.
On Tue, 2014-12-09 at 21:21 +1100, Benjamin Herrenschmidt wrote:
> On Tue, 2014-12-09 at 20:45 +1100, Michael Ellerman wrote:
> > On Mon, 2014-08-12 at 06:36:16 UTC, Neelesh Gupta wrote:
> > > The patch exposes the available i2c busses on the PowerNV platform
> > > to th
On Thu, 2014-04-12 at 07:28:21 UTC, "Shreyas B. Prabhu" wrote:
> From: "Preeti U. Murthy"
>
> The secondary threads should enter deep idle states so as to gain maximum
> powersavings when the entire core is offline. To do so the offline path
> must be made aware of the available deepest idle stat
struction.
>
> [ shre...@linux.vnet.ibm.com: Edited to handle LE ]
> Signed-off-by: Paul Mackerras
> Signed-off-by: Shreyas B. Prabhu
> Cc: Benjamin Herrenschmidt
> Cc: Michael Ellerman
> Cc: linuxppc-dev@lists.ozlabs.org
I'm going to CC this to stable unless anyo
On Tue, 2014-09-12 at 18:56:53 UTC, "Shreyas B. Prabhu" wrote:
> Winkle is a deep idle state supported in power8 chips. A core enters
> winkle when all the threads of the core enter winkle. In this state
> power supply to the entire chiplet i.e core, private L2 and private L3
> is turned off. As a
On Sun, 2014-12-14 at 17:19 +0530, Shreyas B Prabhu wrote:
>
> On Sunday 14 December 2014 03:35 PM, Michael Ellerman wrote:
> > On Thu, 2014-04-12 at 07:28:21 UTC, "Shreyas B. Prabhu" wrote:
> >> From: "Preeti U. Murthy"
> >>
> >> The se
On Sun, 2014-12-14 at 17:22 +0530, Shreyas B Prabhu wrote:
> On Sunday 14 December 2014 03:35 PM, Michael Ellerman wrote:
> >> diff --git a/arch/powerpc/platforms/powernv/subcore.h
> >> b/arch/powerpc/platforms/powernv/subcore.h
> >> index 148abc9..604eb40 100644
>
On Fri, 2014-12-05 at 10:27 +, David Laight wrote:
> From: Michael Ellerman
> > diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
> > index 0905c8da90f1..d8828e50dbef 100644
> > --- a/arch/powerpc/kernel/entry_64.S
> > +++ b/arc
On Mon, 2014-12-15 at 14:32 +1100, Ian Munsie wrote:
> Excerpts from Ian Munsie's message of 2014-12-08 19:18:01 +1100:
> > From: Ian Munsie
> >
> > If we need to force detach a context (e.g. due to EEH or simply force
> > unbinding the driver) we should prevent the userspace contexts from
> > be
On Tue, 2014-12-16 at 18:47 +0200, Michael S. Tsirkin wrote:
> On Sun, Dec 14, 2014 at 06:52:51PM +0200, Michael S. Tsirkin wrote:
> > virtio wants to read bitwise types from userspace using get_user. At the
> > moment this triggers sparse errors, since the value is passed through an
> > integer.
On Tue, 2014-12-16 at 23:35 +0530, Hari Bathini wrote:
> With minor checks, we can move most of the code for nvram
> under pseries to a common place to be re-used by other
> powerpc platforms like powernv. This patch moves such
> common code to arch/powerpc/kernel/nvram_64.c file.
Sharing the code
On Wed, 2014-12-17 at 02:16 +0100, Alexander Graf wrote:
> On 31.10.14 04:47, Anton Blanchard wrote:
> > LLVM doesn't support local named register variables and is unlikely
> > to. current_thread_info is using one, fix it by moving it out and
> > calling it __current_r1().
> >
> > I gave it a bit
Hi Linus,
Please pull the second batch of powerpc updates for 3.19:
The following changes since commit 56548fc0e86cb9156af7a7e1f15ba78f251dafaf:
powerpc/powernv: Return to cpu offline loop when finished in KVM guest
(2014-12-08 13:16:31 +1100)
are available in the git repository at:
git:/
back of the I2C subsystem.
> > > > >
> > > > > Signed-off-by: Wolfram Sang
> > > >
> > > > Acked-by: Benjamin Herrenschmidt
> > >
> > > Thanks! I can take it via my I2C tree, but I'd think it makes more sense
> > > if you take
On Sun, 2014-12-21 at 23:56 +0100, Alexander Graf wrote:
> On 21.12.14 15:13, Andreas Schwab wrote:
> > arch/powerpc/kvm/built-in.o: In function `kvm_no_guest':
> > arch/powerpc/kvm/book3s_hv_rmhandlers.o:(.text+0x724): undefined reference
> > to `power7_wakeup_loss'
>
> Ugh. We just removed supp
On Sat, 2014-20-12 at 22:42:32 UTC, Rickard Strandqvist wrote:
> Removes some functions that are not used anywhere:
> mpc7448_hpc2_halt() mpc7448_hpc2_power_off()
The other option would be to wire it up.
But the default implementations do more or less the same thing.
As far as I can see these we
On Sun, 2014-12-21 at 13:46 +0100, Rickard Strandqvist wrote:
> 2014-12-21 5:05 GMT+01:00 Michael Neuling :
> >> Remove the function mmio_size_show() that is not used anywhere.
> >
> > Did you compile check this patch?
> >
> > drivers/misc/cxl/sysfs.c:291:74: error: ‘mmio_size_show’ undeclared he
On Sat, 2014-20-12 at 15:00:01 UTC, Rickard Strandqvist wrote:
> Remove the function ps3_repository_write_highmem_info() that is not used
> anywhere.
>
> This was partially found by using a static code analysis program called
> cppcheck.
Actually it looks like everything under CONFIG_PS3_REPOSI
On Wed, 2014-12-17 at 10:27 +0100, Alexander Graf wrote:
>
> On 17.12.14 04:44, Anton Blanchard wrote:
> > Hi Alex,
> >
> >> Git bisect managed to point me to this commit as the offender for
> >> OOPSes on e5500 and e6500 (and maybe the G4 as well, not sure).
> >>
> >> Doing a git revert of this
On Mon, 2014-12-22 at 09:26 -0800, Geoff Levand wrote:
> On Sat, 2014-12-20 at 16:00 +0100, Rickard Strandqvist wrote:
> > Remove the function ps3_repository_write_highmem_info() that is not used
> > anywhere.
>
> NAK
>
> ps3_repository_write_highmem_info() is needed by otheros++. What we
> nee
On Tue, 2014-12-23 at 09:48 +1100, Alistair Popple wrote:
> Hi Paul,
>
> These days I've been made maintainer of the PPC4XX tree so maybe adding Acked-
> by: Alistair Popple might help?
>
> Jiri, if you would rather this go via the main PPC tree please let us know
> a
On Mon, 2014-12-22 at 14:38 +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Kernel cannot bring up Non-boot cpus always get "Processor xx is stuck".
> this issue bring by http://patchwork.ozlabs.org/patch/418912/ (powerpc:
> Secondary CPUs must set cpu_callin_map after setting active and
On Tue, 2014-12-23 at 02:41 +, dongsheng.w...@freescale.com wrote:
> > -Original Message-
> > From: Michael Ellerman [mailto:m...@ellerman.id.au]
> > Sent: Tuesday, December 23, 2014 9:01 AM
> > To: Wang Dongsheng-B40534
> > Cc: b...@kernel.crash
On Mon, 2014-12-22 at 18:44 -0800, Geoff Levand wrote:
> Hi Michael,
>
> On Tue, 2014-12-23 at 11:26 +1100, Michael Ellerman wrote:
> > On Mon, 2014-12-22 at 09:26 -0800, Geoff Levand wrote:
> > > ps3_repository_write_highmem_info() is needed by otheros++. What we
> &g
, particularly for the MMCRx/SIxR/SDAR fields, and
might have helped us notice the recent double restore bug we had in this
code.
Signed-off-by: Michael Ellerman
Acked-by: Alexander Graf
---
arch/powerpc/kernel/asm-offsets.c | 15 +--
arch/powerpc/kvm/book3s_hv_interrupts.S | 26
On Sat, 2014-12-27 at 12:17 -0500, Pranith Kumar wrote:
> In an allnoconfig we get the following build failure:
An allnoconfig doesn't include CONFIG_PPC_POWERNV? But I think I know what you
mean.
> arch/powerpc/platforms/built-in.o: In function
> `.__machine_initcall_powernv_opal_init':
> opal
On Mon, 2014-12-22 at 14:38 +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Kernel cannot bring up Non-boot cpus always get "Processor xx is stuck".
> this issue bring by http://patchwork.ozlabs.org/patch/418912/ (powerpc:
> Secondary CPUs must set cpu_callin_map after setting active and
On Tue, 2014-12-30 at 13:54 -0500, Pranith Kumar wrote:
> On Tue, Dec 30, 2014 at 1:50 PM, Peter Zijlstra wrote:
> > On Tue, Dec 30, 2014 at 12:46:22AM -0500, Pranith Kumar wrote:
> >> Isolate the SRCU functions and data structures within CONFIG_SRCU so that
> >> there
> >> is a compile time fail
--
Hari Bathini (1):
powerpc/kdump: Ignore failure in enabling big endian exception during
crash
Michael Ellerman (1):
Revert "powerpc: Secondary CPUs must set cpu_callin_map after setting
active and online"
Pranith Kumar (1):
powerpc: Wire up sys_execveat(
On Wed, 2015-01-07 at 09:08 +0100, Alessio Igor Bogani wrote:
> Hi Michael,
>
> On 5 December 2014 at 10:42, Michael Ellerman wrote:
> > On Fri, 2014-05-12 at 08:17:42 UTC, Alessio Igor Bogani wrote:
> >> Signed-off-by: Alessio Igor Bogani
> >> ---
> >&g
The cleanest solution is to just use the existing CURRENT_THREAD_INFO()
asm macro, and call it using inline asm.
Fixes: a3e5b356b3ab ("powerpc: Don't use local named register variable in
current_thread_info")
Reported-by: Alexander Graf
Signed-off-by: Michael Ellerman
---
arc
n Firmware, booting Linux via __start() ...
Which hopefully makes it clear that prom_init() is not the problem, and
although __start() probably isn't either, it's at least the right place
to begin looking.
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/prom_init.c | 2 +-
1 fi
On Mon, 2015-01-12 at 11:27 -0600, Paul Clarke wrote:
> On 01/12/2015 03:48 AM, Michael Ellerman wrote:
> > We get way too many bug reports that say "the kernel is hung in
> > prom_init", which stems from the fact that the last piece of output
> > people s
On Tue, 2015-01-13 at 01:00 +, Geoff Levand wrote:
> Add calls to the ps3_mm_set_repository_highmem() routine when the ps3
> r1 highmem region is either created or destroyed.
What does this actually do? ie. from a user perspective.
cheers
___
Linu
Either one or a combination of commits 81e5d86
"Register i2c devices from device-tree" and 3a3dd01
"Improve detection of devices from device-tree" broke sound on
PowerBook6,5 machines.
Fix it by adding an entry to the new driver to match PowerBook6,5
machines.
Signed-off-
On Mon, 2013-05-06 at 13:34 +0530, Anshuman Khandual wrote:
> The 'to' field inside branch entries might contain stale values from previous
> PMU interrupt instances which had indirect branches. So clear all the values
> before reading a fresh set of BHRB entries after a PMU interrupt.
>
> Signed-
0)
Prior to the above commit:
((from) == (to) ? LOCAL_DISTANCE : REMOTE_DISTANCE)
Restoring compatible behavior with this patch for old powerpc systems
with device tree where numa distance are encoded as form0.
Signed-off-by: Vaidyanathan Srinivasan
Signed-off-by: Michael Ellerman
---
arch/
On Mon, May 06, 2013 at 09:06:15PM -0700, Greg KH wrote:
> On Tue, May 07, 2013 at 01:49:34PM +1000, Michael Ellerman wrote:
> > From: Vaidyanathan Srinivasan
> >
> > Commit 7122b7bc1757682049780179d7c216dd1c83 upstream.
> >
> > The following commit b
a /proc interface to the RTAS flash routines.
CONFIG_RTAS_FLASH already depends on CONFIG_RTAS_PROC, to indicate that
it depends on the RTAS proc support, but CONFIG_RTAS_PROC does not
depend on CONFIG_PROC_FS. So fix that.
Signed-off-by: Michael Ellerman
---
arch/powerpc/platforms/Kconfig |2 +
On Thu, 2013-05-09 at 08:45 +1000, Michael Neuling wrote:
> Stephane Eranian wrote:
>
> > On Wed, May 8, 2013 at 5:59 PM, Peter Zijlstra wrote:
> > > On Tue, May 07, 2013 at 11:35:28AM +1000, Michael Neuling wrote:
> > >> Peter & Stephane,
> > >>
> > >> We are plumbing the POWER8 Branch History
On Wed, 2013-05-08 at 11:29 +0100, Luis Henriques wrote:
> On Tue, May 07, 2013 at 01:49:34PM +1000, Michael Ellerman wrote:
> > From: Vaidyanathan Srinivasan
> >
> > Commit 7122b7bc1757682049780179d7c216dd1c83 upstream.
>
> Thanks, I'm queuing it for the 3.
This is a revert and then some of commit 860aad7 "Add regs_no_sipr()".
This workaround was only needed on early chip versions.
As before NO_SIPR becomes a static flag of the PMU struct.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c | 30 ++-
Commit 8f61aa3 "Add support for SIER" missed updates to siar_valid()
and perf_get_data_addr().
In both cases we need to check the SIER instead of mmcra.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c | 37 +
1 file c
t
switched.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/processor.h |6 ++
arch/powerpc/kernel/asm-offsets.c|6 ++
arch/powerpc/kernel/entry_64.S | 28
3 files changed, 40 insertions(+)
diff --git a/arch/powerpc/i
On Fri, May 17, 2013 at 05:46:52PM +0200, Dennis Schridde wrote:
> Hello!
>
> Am Dienstag, 23. April 2013, 19:12:47 schrieb Michael Ellerman:
> > For me it is fixed by applying the following patch, it should be in v3.10:
> >
> > http://patchwork.ozlabs.org/patch/
On Tue, May 21, 2013 at 04:54:04PM -0500, Brian King wrote:
>
> Recent commit e61133dda480062d221f09e4fc18f66763f8ecd0 added support
> for a new firmware feature to force an adapter to use 32 bit MSIs.
> However, this firmware is not available for all systems. The hack below
> allows devices needi
On Fri, May 17, 2013 at 05:45:05PM +0200, Dennis Schridde wrote:
> Hello!
>
> Just wanted to remind you: The patchto fix cbe_init_pm_irq() that Michael and
> Grant sent me is still not included in Linux 3.8.12.
I didn't push that one to stable because it just fixes a warning. If you
want it you'
On Wed, 2013-05-22 at 11:17 +0530, Anshuman Khandual wrote:
> Completely ignore BHRB privilege state filter request as we are
> already configuring MMCRA register with privilege state filtering
> attribute for the accompanying PMU event. This would help achieve
> cleaner user space interaction for
On Fri, May 31, 2013 at 04:33:24PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> If a hash bucket gets full, we "evict" a more/less random entry from it.
> When we do that we don't invalidate the TLB (hpte_remove) because we assume
> the old translation is still technically "valid
On Thu, May 30, 2013 at 03:34:27PM +1000, Michael Neuling wrote:
> On context switch, we should have no prefetch streams leak from one
> userspace process to another. This frees up prefetch resources for the
> next process.
>
> Based on patch from Milton Miller.
>
> Signed-off-by: Michael Neulin
d4de10) is in userspace
The fix is to not call printk() from the PMU exception handler. Instead
add a counter to track spurious PMU interrupts and display them in
/proc/interrupts.
Signed-off-by: Michael Ellerman
Cc: # 3.9
---
arch/powerpc/include/asm/hardirq.h |1 +
arch/powerpc/ke
e counter interrupt'", the
x86 guys renamed theirs from "CNT" to "PMI".
Arguably changing the name could break someone's script, but I think the
chance of that is minimal, and it's preferable to have a name that 1) is
somewhat meaningful, and 2) matches x86.
On Tue, 2013-06-04 at 14:35 +0530, Anshuman Khandual wrote:
> > + seq_printf(p, "%*s: ", prec, "PMS");
>
> Lets make this PMIS or PMI_S instead of PMS.
Everything else is aligned using a three character prefix, so that would
stuff the alignment up.
>
> > + for_each_online_cpu(j)
> > +
bf6f7c
SP (36d4de10) is in userspace
Fix it by making sure we only call printk() when we are not in NMI
context.
Signed-off-by: Michael Ellerman
Cc: # 3.9
---
arch/powerpc/perf/core-book3s.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/core-
to do something more complicated, but that will have to
wait for 3.11.
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/entry_64.S | 28
1 file changed, 28 deletions(-)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 246b11c..87
On Power8 we can freeze PMC5 and 6 if we're not using them. Normally they
run all the time.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/reg.h |1 +
arch/powerpc/perf/power8-pmu.c |4
2 files changed, 5 insertions(+)
diff --git a/arch/powerpc/include/asm/re
called very early in the
exception entry and we are asking for trouble tracing them. They are
also fairly uninteresting and tracing them just adds unnecessary
overhead.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/exception-64s.h |2 +-
arch/powerpc/kernel/process.c|
On Thu, 2013-06-13 at 08:45 -0400, Steven Rostedt wrote:
> On Thu, 2013-06-13 at 21:04 +1000, Michael Ellerman wrote:
>
> > Although that should be sufficient to fix the bug, we also mark the
> > runlatch routines as notrace. They are called very early in the
> > exception
On Sat, Jun 15, 2013 at 12:02:21PM +1000, Benjamin Herrenschmidt wrote:
> On Fri, 2013-06-14 at 17:06 -0400, Steven Rostedt wrote:
> > I was pretty much able to reproduce this on my PA Semi PPC box. Funny
> > thing is, when I type on the console, it makes progress. Anyway, it
> > seems that powerpc
On Mon, Jun 17, 2013 at 09:19:51PM +0200, Geert Uytterhoeven wrote:
> On Mon, 17 Jun 2013, Geert Uytterhoeven wrote:
>
> powerpc-randconfig
> + arch/powerpc/include/asm/mmu-hash64.h: error: control reaches end of
> non-void function [-Werror=return-type]: => 180:1
This is running past a BUG(
On Wed, 2013-06-19 at 17:15 +0800, Runzhen Wang wrote:
> In the Power7 PMU guide:
> https://www.power.org/documentation/commonly-used-metrics-for-performance-analysis/
> PM_BRU_MPRED is referred to as PM_BR_MPRED.
>
> This patch fix the typo by changing the name of the event in kernel and
> docume
On Wed, 2013-06-19 at 17:15 +0800, Runzhen Wang wrote:
> Power7 supports over 530 different perf events but only a small
> subset of these can be specified by name, for the remaining
> events, we must specify them by their raw code:
>
> perf stat -e r2003c
>
> This patch makes all the PO
t is still
early days for Power8 so I think we can still slip this in and get away
with it.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/power8-pmu.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
ind
_regs().
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c | 31 +++
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 29c6482..1ab3068 100644
--- a/arch/powerpc
On Power8 we can freeze PMC5 and 6 if we're not using them. Normally they
run all the time.
As noticed by Anshuman, we should unfreeze them when we disable the PMU
as there are legacy tools which expect them to run all the time.
Signed-off-by: Michael Ellerman
---
arch/powerpc/includ
In power_pmu_enable() we can use the existing out label to reduce the
number of return paths.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c |9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf
In power_pmu_enable() we still enable the PMU even if we have zero
events. This should have no effect but doesn't make much sense. Instead
just return after telling the hypervisor that we are not using the PMCs.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c |
In commit 59affcd "Context switch more PMU related SPRs" I added more
PMU SPRs to thread_struct, later modified in commit b11ae95. To add
insult to injury it turns out we don't need to switch MMCRA as it's
only user readable, and the value is recomputed by the PMU code.
Si
configured.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/power8-pmu.c | 44 +---
1 file changed, 32 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index d59f5b2..c7f8ccc 100644
--- a/arch
kernel involvement in the
inner loop.
Most of the logic is in the generic book3s code, primarily to avoid a
proliferation of PMU callbacks.
Signed-off-by: Michael Ellerman
---
Documentation/powerpc/00-INDEX |2 +
Documentation/powerpc/pmu-ebb.txt| 122
On Thu, Jun 13, 2013 at 12:09:47PM +0530, Anshuman Khandual wrote:
> On 06/13/2013 06:46 AM, Michael Ellerman wrote:
> > On Power8 we can freeze PMC5 and 6 if we're not using them. Normally they
> > run all the time.
> >
> > index f7d1c4f..e791c68 100644
> >
On Mon, Jun 24, 2013 at 02:25:59PM -0500, Nathan Fontenot wrote:
> On 06/24/2013 02:16 PM, Seth Jennings wrote:
> > On Mon, Jun 24, 2013 at 12:18:04PM -0500, Seth Jennings wrote:
> >> On Mon, Jun 24, 2013 at 09:14:23AM -0500, Nathan Fontenot wrote:
> >>> The topology update code that updates the cp
On Mon, Jun 24, 2013 at 09:14:23AM -0500, Nathan Fontenot wrote:
> The topology update code that updates the cpu node registration in sysfs
> should not be called while in stop_machine(). The register/unregister
> calls take a lock and may sleep.
>
> This patch moves these calls outside of the cal
On Sun, Jun 23, 2013 at 07:17:00PM +0530, Srivatsa S. Bhat wrote:
> The function migrate_irqs() is called with interrupts disabled
> and hence its not safe to do GFP_KERNEL allocations inside it,
> because they can sleep. So change the gfp mask to GFP_ATOMIC.
OK so it gets there via:
__stop_mach
On Tue, Jun 25, 2013 at 12:13:04PM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2013-06-25 at 12:08 +1000, Michael Ellerman wrote:
> > We're not checking for allocation failure, which we should be.
> >
> > But this code is only used on powermac and 85xx, so it should p
On Tue, Jun 18, 2013 at 09:09:06PM -0700, Paul E. McKenney wrote:
> On Mon, Jun 17, 2013 at 05:42:13PM +1000, Michael Ellerman wrote:
> > On Sat, Jun 15, 2013 at 12:02:21PM +1000, Benjamin Herrenschmidt wrote:
> > > On Fri, 2013-06-14 at 17:06 -0400, Steven Rostedt wrote:
> &g
On Tue, Jun 25, 2013 at 05:19:14PM +1000, Michael Ellerman wrote:
>
> Here's another trace from 3.10-rc7 plus a few local patches.
And here's another with CONFIG_RCU_CPU_STALL_INFO=y in case that's useful:
PASS running test_pmc5_6_overuse()
INFO: rcu_sched self-detected s
for hmi_exception (Hypervisor Maintenance) which
is defined in the architecture to never be delivered with relocation on,
see see v2.07 Book III-S section 6.5.
So remove the handlers, leaving a branch to self just to be double extra
paranoid.
Signed-off-by: Michael Ellerman
---
arch/powerpc
ns we have for 0xe40 and 0xe80.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/exception-64s.h |8
arch/powerpc/kernel/exceptions-64s.S |2 --
2 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/exception-64s.h
b/arch/power
From: Michael Ellerman
The exception at 0xf60 is not the TM (Transactional Memory) unavailable
exception, it is the "Facility Unavailable Exception", rename it as
such.
Flesh out the handler to acknowledge the fact that it can be called for
many reasons, one of which is TM being u
Similar to the facility unavailble exception, except the facilities are
controlled by HFSCR.
Adapt the facility_unavailable_exception() so it can be called for
either the regular or Hypervisor facility unavailable exceptions.
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/exceptions
On Tue, Jun 25, 2013 at 04:52:39PM +0530, Anshuman Khandual wrote:
> On 06/24/2013 04:58 PM, Michael Ellerman wrote:
> > In pmu_disable() we disable the PMU by setting the FC (Freeze Counters)
> > bit in MMCR0. In order to do this we have to read/modify/write MMCR0.
> >
>
On Tue, Jun 25, 2013 at 09:03:32AM -0700, Paul E. McKenney wrote:
> On Tue, Jun 25, 2013 at 05:44:23PM +1000, Michael Ellerman wrote:
> > On Tue, Jun 25, 2013 at 05:19:14PM +1000, Michael Ellerman wrote:
> > >
> > > Here's another trace from 3.10-rc7 plus a few lo
On Wed, 2013-06-26 at 15:28 +0530, Anshuman Khandual wrote:
> > @@ -117,6 +117,7 @@
> > (EVENT_UNIT_MASK << EVENT_UNIT_SHIFT) | \
> > (EVENT_COMBINE_MASK << EVENT_COMBINE_SHIFT) | \
> > (EVENT_MARKED_MASK<< EVENT_MARKED_SHIFT) |
On Wed, 2013-06-26 at 14:08 +0530, Anshuman Khandual wrote:
> On 06/24/2013 04:58 PM, Michael Ellerman wrote:
> > Add support for EBB (Event Based Branches) on 64-bit book3s. See the
> > included documentation for more details.
..
> > +
&
On Thu, Jun 27, 2013 at 02:05:39PM +1000, Stephen Rothwell wrote:
> Hi Michael,
>
> On Tue, 25 Jun 2013 17:47:56 +1000 Michael Ellerman
> wrote:
> >
> > -void tm_unavailable_exception(struct pt_regs *regs)
> > +void facility_unavailable_exception(struct pt_regs *re
On Tue, Jun 25, 2013 at 10:35:33PM +0800, Runzhen Wang wrote:
> Power7 supports over 530 different perf events but only a small
> subset of these can be specified by name, for the remaining
> events, we must specify them by their raw code:
Hi Runzhen,
This is looking good. Sorry one last request
/stable,
> so hoping we have some wiggle room.
>
> Signed-off-by: Runzhen Wang
Acked-by: Michael Ellerman
cheers
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t is still
early days for Power8 so I think we can still slip this in and get away
with it.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/power8-pmu.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
ind
_regs().
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c | 31 +++
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 29c6482..1ab3068 100644
--- a/arch/powerpc
On Power8 we can freeze PMC5 and 6 if we're not using them. Normally they
run all the time.
As noticed by Anshuman, we should unfreeze them when we disable the PMU
as there are legacy tools which expect them to run all the time.
Signed-off-by: Michael Ellerman
---
arch/powerpc/includ
In power_pmu_enable() we can use the existing out label to reduce the
number of return paths.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c |9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf
In power_pmu_enable() we still enable the PMU even if we have zero
events. This should have no effect but doesn't make much sense. Instead
just return after telling the hypervisor that we are not using the PMCs.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c |
In commit 59affcd "Context switch more PMU related SPRs" I added more
PMU SPRs to thread_struct, later modified in commit b11ae95. To add
insult to injury it turns out we don't need to switch MMCRA as it's
only user readable, and the value is recomputed by the PMU code.
Si
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