On Oct 1, 2010, at 7:14 AM, Benjamin Herrenschmidt wrote:
> On Fri, 2010-10-01 at 07:30 -0400, Josh Boyer wrote:
>>
>>> From a community aspect is anyone actually going to use this? Is
>> this going to be the equivalent of voyager on x86? I've got nothing
>> against some of the endian clean up
On Sep 9, 2010, at 1:39 PM, Timur Tabi wrote:
> +static void p1022ds_set_monitor_port(int monitor_port)
> +{
> + struct device_node *pixis_node;
> + u8 __iomem *brdcfg1;
> +
> + pixis_node = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis");
> + if (!pixis_node) {
> +
On Sep 7, 2010, at 8:59 PM, Paul Mackerras wrote:
> On Tue, Sep 07, 2010 at 01:56:55PM -0500, Matthew McClintock wrote:
>
>> In lieu of having multiple similiar lines, we can just have one
>> generic cpu-as line for CONFIG_ALTIVEC
>>
>> ---
>> Was hoping to get comments about this change and if
On Sep 9, 2010, at 1:39 PM, Timur Tabi wrote:
> The device tree for Freescale's P1022DS reference board is missing the node
> for the ngPIXIS FPGA.
>
> Signed-off-by: Timur Tabi
> ---
> arch/powerpc/boot/dts/p1022ds.dts |9 +
> 1 files changed, 9 insertions(+), 0 deletions(-)
>
> di
On Sep 20, 2010, at 11:23 AM, Timur Tabi wrote:
> Export the global variable 'ppc_tb_freq', so that modules (like the Book-E
> watchdog driver) can use it. To maintain consistency, ppc_proc_freq is
> changed
> to a GPL-only export. This is okay, because any module that needs this symbol
> shou
On Sep 16, 2010, at 5:58 PM, Matthew McClintock wrote:
> Right now just the kexec crash pathway turns turns off the
> interrupts. Pull that out and make a generic version for
> use elsewhere
>
> Signed-off-by: Matthew McClintock
> ---
> arch/powerpc/include/asm/kexec.h |1 +
> arch/pow
On Sep 16, 2010, at 5:58 PM, Matthew McClintock wrote:
> Make kexec_down_cpus atmoic since it will be incremented by all
> cores as they are coming down
>
> Remove duplicate calls to mpc85xx_smp_kexec_down, now it's called
> by the crash and normal kexec pathway only once
>
> Increase the timeo
On Sep 8, 2010, at 6:55 PM, Ilya Yanok wrote:
> This patch adds support for MPC8308 P1M board.
> Supported devices:
> DUART
> Dual Ethernet
> NOR flash
> Both I2C controllers
> USB in peripheral mode
> PCI Express
>
> Signed-off-by: Ilya Yanok
> ---
>
> Changed 'compatible' entry for 'cpld' no
On Aug 5, 2010, at 3:02 AM, Kumar Gala wrote:
> The following commit broke 83xx because it assumed the 83xx platforms
> exposed the "IMMR" address in BAR0 like the 85xx/86xx/QoriQ devices do:
>
> commit 3da34aae03d498ee62f75aa7467de93cce3030fd
> Author: Kumar Gala
>
On Sep 16, 2010, at 5:58 PM, Matthew McClintock wrote:
> We no longer need to call this explicitly as a generic version is
> called by default
>
> Signed-off-by: Matthew McClintock
> ---
> arch/powerpc/platforms/85xx/smp.c |2 --
> 1 files changed, 0 insertions(+), 2 deletions(-)
applied to
On Sep 20, 2010, at 11:23 AM, Timur Tabi wrote:
> Register the __init and __exit functions in the PowerPC e500 watchdog driver
> as module entry/exit functions, and modify the Kconfig entry.
>
> Add a .release method for the PowerPC e500 watchdog driver, so that the
> watchdog is disabled when t
On Sep 24, 2010, at 11:44 AM, Paul Gortmaker wrote:
>>
>> From d48ebb58b8214f9faec775a5e06902f638f165cf Mon Sep 17 00:00:00 2001
> From: Tiejun Chen
> Date: Tue, 21 Sep 2010 19:31:31 +0800
> Subject: [PATCH] powerpc: Fix invalid page flags in create TLB CAM path for
> PTE_64BIT
>
> There exis
On Sep 16, 2010, at 5:58 PM, Matthew McClintock wrote:
> When we do an mpic_reset_core we need to make sure the dcache
> is flushed
>
> Signed-off-by: Matthew McClintock
> ---
> arch/powerpc/platforms/85xx/smp.c | 50 +
> 1 files changed, 50 insertions(+), 0
On Aug 31, 2010, at 5:44 PM, Matthew McClintock wrote:
> The first global-utilities node might not contain the rstcr
> property, so we should search all the nodes
>
> Signed-off-by: Matthew McClintock
> ---
> -Changed KERN_EMERG to KERN_ERR
> -Break if we do not find rstcr mapped
> -Restore of_
On Aug 1, 2010, at 5:54 AM, Anton Vorontsov wrote:
> On Wed, Jul 21, 2010 at 06:21:08PM -0500, Scott Wood wrote:
> [...]
> + { .compatible = "fsl,p4080-l2-cache-controller", },
L2 on the p4080 is quite different from those other chips. It's part
of the core, controlled by SPR
On Aug 31, 2010, at 6:24 PM, Matthew McClintock wrote:
> First we check to see if we are the first core booting up. This
> is accomplished by comparing the boot_cpuid with -1, if it is we
> assume this is the first core coming up.
>
> Secondly, we need to update the initial thread info structure
On Aug 19, 2010, at 4:28 PM, Timur Tabi wrote:
> Like the MPC8610 HPCD, the P1022DS ASoC DMA driver probes on individual DMA
> channel nodes, so the DMA controller nodes' compatible string must be listed
> in
> p1022_ds_ids[] to work.
>
> Signed-off-by: Timur Tabi
> ---
>
> This is for -next.
>
> It's already in Linus' tree.
Yeah, the problem is what's merged in linus's tree has p4080 listed and it
shouldn't
>
> Thanks,
>
> - - - -
> commit cd1542c8197fc3c2eb3a8301505d5d9738fab1e4
> Author: Anton Vorontsov
> Date: Tue Aug 10 18:03:21 2010 -0700
>
>edac: mpc85xx: add suppor
On Oct 7, 2010, at 1:37 AM, Kumar Gala wrote:
>> @ -1125,7 +1128,10 @@ static struct of_device_id mpc85xx_mc_err_of_match[] =
>> {
>> { .compatible = "fsl,mpc8569-memory-controller", },
>> { .compatible = "fsl,mpc8572-memory-controller", },
On Oct 7, 2010, at 2:12 AM, Anton Vorontsov wrote:
> On Thu, Oct 07, 2010 at 02:00:50AM -0500, Kumar Gala wrote:
>>
>> On Oct 7, 2010, at 1:37 AM, Kumar Gala wrote:
>>
>>>> @ -1125,7 +1128,10 @@ static struct of_device_id mpc85xx_mc_err_of_match[]
>>>
On Oct 7, 2010, at 7:30 AM, Eran Liberty wrote:
> Dear Penguins,
>
> SHORT:
> There is a BUG in the current code design / Freescale P2020/85xx PCIe design
> that prevent it from registering to the PCIe AER... or that I have missed
> something :) ..
>
> LESS SHORT:
> I am in the process of a F
On Aug 31, 2010, at 6:24 PM, Matthew McClintock wrote:
> First we check to see if we are the first core booting up. This
> is accomplished by comparing the boot_cpuid with -1, if it is we
> assume this is the first core coming up.
>
> Secondly, we need to update the initial thread info structure
On Oct 7, 2010, at 9:15 PM, Hu Mingkai-B21284 wrote:
Yes, I agree with David on this. If large transfers don't work,
then it is the SPI master driver that is buggy.
>>>
>>> By the way, does this fix your problem?
>>>
>>> https://patchwork.kernel.org/patch/184752/
>>
>> It shouldn't.
ppc32.
Signed-off-by: Kumar Gala
---
arch/powerpc/platforms/85xx/smp.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index a6b1065..bd38b6a 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b
13:59:32 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git merge
Kumar Gala (1):
powerpc/ppc64e: Fix link problem when building ppc64e_defconfig
arch/powerpc/platforms/85xx/smp.c |7 +++
1 files changed, 7 insertions(
Add 'fsl,qoriq-gpio' compatiable to the list we search for to bind
against for mpc8xxx_gpio. This compatiable will be used on P1-P5xxx
QorIQ devices like P4080.
Signed-off-by: Kumar Gala
---
arch/powerpc/sysdev/mpc8xxx_gpio.c |3 +++
1 files changed, 3 insertions(+), 0 deletion
Signed-off-by: Kumar Gala
---
arch/powerpc/sysdev/fsl_pci.c |8
include/linux/pci_ids.h |8
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 32012a2..4d0b249 100644
--- a/arch
[PMMP], before setting MSR[PMM]. The
counters wil not actually run until PMGC0[FAC] is cleared in
pmc_start_ctrs(), so this will not reduce the effectiveness of PMM.
Signed-off-by: Scott Wood
Signed-off-by: Kumar Gala
---
arch/powerpc/oprofile/op_model_fsl_emb.c | 15 ---
1 files
The P3041DS is in the same family of boards as the P4080DS and thus
shares the corenet_ds code.
Signed-off-by: Kumar Gala
---
arch/powerpc/platforms/85xx/Kconfig| 12 ++
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/p3041_ds.c | 64
arch/powerpc/kernel/paca.c: In function 'allocate_lppacas':
arch/powerpc/kernel/paca.c:111:1: error: parameter name omitted
arch/powerpc/kernel/paca.c:111:1: error: parameter name omitted
Signed-off-by: Kumar Gala
---
arch/powerpc/kernel/paca.c |2 +-
1 files changed, 1 insert
ppc32.
Signed-off-by: Kumar Gala
---
arch/powerpc/platforms/85xx/smp.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index c89a370..5c91a99 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b
The new e5500 core is similar to the e500mc core but adds 64-bit
support. We support running it in 32-bit mode as it is identical to the
e500mc.
Signed-off-by: Kumar Gala
---
arch/powerpc/include/asm/cache.h |2 +-
arch/powerpc/include/asm/reg_booke.h |3 ++-
arch/powerpc
ce we are an FSL implementation that we have 2 TLB arrays and
the second array contains the variable size pages.
Signed-off-by: Kumar Gala
---
arch/powerpc/include/asm/mmu-book3e.h | 15 +++
arch/powerpc/mm/tlb_nohash.c | 42 ++--
2 files change
purpose.
Additionally, we limit the amount of memory to what we can cover via
bolted entries so we don't get secondary faults in the TLB miss
handlers. We should fix this limitation in the future.
Signed-off-by: Kumar Gala
---
arch/powerpc/kernel/asm-offsets.c |4 ++--
arch/power
The P5020DS is in the same family of boards as the P4080 DS and thus
shares the corenet_ds code.
Signed-off-by: Kumar Gala
---
arch/powerpc/platforms/85xx/Kconfig| 12 ++
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/p5020_ds.c | 69
The p5020 SoC from Freescale is the first 64-bit Book-E processor and
utilizes the two e5500 cores. Adding a defconfig that enables basic kernel
for e5500 based processors.
Also added the p5020 / e5500 support to the ppc64e defconfig.
Signed-off-by: Kumar Gala
---
arch/powerpc/configs
On Oct 8, 2010, at 2:06 PM, Kumar Gala wrote:
> Add 'fsl,qoriq-gpio' compatiable to the list we search for to bind
> against for mpc8xxx_gpio. This compatiable will be used on P1-P5xxx
> QorIQ devices like P4080.
>
> Signed-off-by: Kumar Gala
> ---
> arch/power
On Oct 8, 2010, at 2:06 PM, Kumar Gala wrote:
> Signed-off-by: Kumar Gala
> ---
> arch/powerpc/sysdev/fsl_pci.c |8
> include/linux/pci_ids.h |8
> 2 files changed, 16 insertions(+), 0 deletions(-)
appli
On Oct 8, 2010, at 2:28 PM, Timur Tabi wrote:
> On Fri, Oct 8, 2010 at 2:06 PM, Kumar Gala wrote:
>
>> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
>> index 32012a2..4d0b249 100644
>> --- a/arch/powerpc/sysdev/fsl_pci.c
>> +++ b
On Oct 12, 2010, at 5:25 AM,
wrote:
>
> +static int __devinit mpc85xx_l2ctlr_of_probe(struct platform_device *dev,
> + const struct of_device_id *match)
> +{
> + long rval;
> + unsigned int rem;
> + unsigned char ways;
> + const unsigned i
The new e5500 core is similar to the e500mc core but adds 64-bit
support. We support running it in 32-bit mode as it is identical to the
e500mc.
Signed-off-by: Kumar Gala
---
* Updated to remove CONFIG_PPC_E5500 and use E500MC
arch/powerpc/include/asm/reg_booke.h |3 ++-
arch/powerpc
The P5020DS is in the same family of boards as the P4080 DS and thus
shares the corenet_ds code.
Signed-off-by: Kumar Gala
---
* Updated based on removal of CONFIG_PPC_E5500
arch/powerpc/platforms/85xx/Kconfig| 12 ++
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc
On Oct 12, 2010, at 12:33 PM, Scott Wood wrote:
> On Tue, 12 Oct 2010 10:50:52 -0500
> Kumar Gala wrote:
>
>> The new e5500 core is similar to the e500mc core but adds 64-bit
>> support. We support running it in 32-bit mode as it is identical to the
>> e500mc.
>&
On Oct 12, 2010, at 3:11 PM, Scott Wood wrote:
> On Tue, 12 Oct 2010 14:55:42 -0500
> Kumar Gala wrote:
>
>>
>> On Oct 12, 2010, at 12:33 PM, Scott Wood wrote:
>>
>>> On Tue, 12 Oct 2010 10:50:52 -0500
>>> Kumar Gala wrote:
>>>
>>
The new e5500 core is similar to the e500mc core but adds 64-bit
support. We support running it in 32-bit mode as it is identical to the
e500mc.
Signed-off-by: Kumar Gala
---
* clean up kconfig further to reduce use of E500MC
arch/powerpc/include/asm/reg_booke.h |2 +-
arch/powerpc
The P5020DS is in the same family of boards as the P4080 DS and thus
shares the corenet_ds code.
Signed-off-by: Kumar Gala
---
* Updated based on e5500 support patch
arch/powerpc/platforms/85xx/Kconfig| 13 ++
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms
On Oct 12, 2010, at 12:19 PM, Hollis Blanchard wrote:
> On Tue, Oct 12, 2010 at 10:02 AM, Rai Harninder-B01044
> wrote:
>> Currently the design is that we divide the sram portion into 2 equal
>> parts for AMP
>> That was the part of initial requirement
>> Do we want to remove that?
>
> Why woul
On Oct 7, 2010, at 2:36 PM, Timur Tabi wrote:
> The device tree for Freescale's P1022DS reference board is missing the node
> for the ngPIXIS FPGA.
>
> Signed-off-by: Timur Tabi
> ---
> arch/powerpc/boot/dts/p1022ds.dts | 11 +++
> 1 files changed, 11 insertions(+), 0 deletions(-)
app
On Oct 7, 2010, at 2:36 PM, Timur Tabi wrote:
> The Freescale P1022DS has an on-chip video controller called the DIU, and a
> driver for this device already exists. Update the platform file for the
> P1022DS reference board to enable the driver, and update the defconfig for
> Freescale MPC85xx b
On Oct 13, 2010, at 7:00 AM,
wrote:
> From: Harninder Rai
>
> It adds cache-sram support in P1/P2 QorIQ platforms as under:
>
>* A small abstraction over powerpc's remote heap allocator
>* Exports mpc85xx_cache_sram_alloc()/free() APIs
>* Supports only one contiguous SRAM window
On Oct 13, 2010, at 10:58 AM, Scott Wood wrote:
> On Wed, 13 Oct 2010 08:17:11 -0500
> Kumar Gala wrote:
>
>> The new e5500 core is similar to the e500mc core but adds 64-bit
>> support. We support running it in 32-bit mode as it is identical to the
>> e500mc.
>&
The P5020DS is in the same family of boards as the P4080 DS and thus
shares the corenet_ds code.
Signed-off-by: Kumar Gala
---
* minor kconfig mods because of e5500 patch changes
arch/powerpc/platforms/85xx/Kconfig| 12 ++
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc
The new e5500 core is similar to the e500mc core but adds 64-bit
support. We support running it in 32-bit mode as it is identical to the
e500mc.
Signed-off-by: Kumar Gala
---
* Further kconfig cleanup
arch/powerpc/kernel/Makefile |4 +++-
arch/powerpc/kernel
On Oct 13, 2010, at 5:02 PM, Kumar Gala wrote:
> The new e5500 core is similar to the e500mc core but adds 64-bit
> support. We support running it in 32-bit mode as it is identical to the
> e500mc.
>
> Signed-off-by: Kumar Gala
> ---
> * Further kconfig cleanup
>
On Oct 7, 2010, at 2:36 PM, Timur Tabi wrote:
> The Freescale P1022DS has an on-chip video controller called the DIU, and a
> driver for this device already exists. Update the platform file for the
> P1022DS reference board to enable the driver, and update the defconfig for
> Freescale MPC85xx b
):
powerpc/fsl: 85xx: add cache-sram support
Ilya Yanok (1):
powerpc/mpc83xx: Support for MPC8308 P1M board
Kumar Gala (10):
powerpc/fsl-pci: Fix MSI support on 83xx platforms
powerpc/mpc8xxx_gpio: Add support for 'qoriq-gpio' controllers
powerpc/fsl-booke: Add PCI devi
The following commit broke 83xx because it assumed the 83xx platforms
exposed the "IMMR" address in BAR0 like the 85xx/86xx/QoriQ devices do:
commit 3da34aae03d498ee62f75aa7467de93cce3030fd
Author: Kumar Gala
Date: Tue May 12 15:51:56 2009 -0500
powerpc/fsl: Support unique MSI
On Oct 13, 2010, at 2:19 PM, Timur Tabi wrote:
> The PowerPC Book-E watchdog driver (booke_wdt.c) defines a default timeout
> value in the code based on whether it's a Freescale Book-E part of not.
> Instead of having hard-coded values in the driver, make it a Kconfig option.
>
> As newer chips
On Oct 13, 2010, at 9:04 PM, Shaohui Xie wrote:
> Add some comments to make sRIO registers map better readable.
>
> Signed-off-by: Shaohui Xie
> ---
> arch/powerpc/sysdev/fsl_rio.c | 65 +
> 1 files changed, 40 insertions(+), 25 deletions(-)
applied to
On Oct 13, 2010, at 9:04 PM, Shaohui Xie wrote:
> From: Li Yang
>
> The access to HID1 register is only legitimate for e500 v1/v2 cores.
> Also fixes magic number.
>
> Signed-off-by: Li Yang
> Signed-off-by: Shaohui Xie
> ---
> arch/powerpc/sysdev/fsl_rio.c |9 ++---
> 1 files changed
On Oct 14, 2010, at 1:14 AM, Kumar Gala wrote:
>
> On Oct 13, 2010, at 9:04 PM, Shaohui Xie wrote:
>
>> From: Li Yang
>>
>> The access to HID1 register is only legitimate for e500 v1/v2 cores.
>> Also fixes magic number.
>>
>> Signed-o
/linux/kernel/git/galak/powerpc.git next
Harninder Rai (1):
powerpc/85xx: add cache-sram support
Ilya Yanok (1):
powerpc/mpc83xx: Support for MPC8308 P1M board
Kumar Gala (10):
powerpc/fsl-pci: Fix MSI support on 83xx platforms
powerpc/mpc8xxx_gpio: Add support for '
On Oct 14, 2010, at 2:10 AM, Li Yang-R58472 wrote:
>> Subject: Re: [PATCH 2/3] fsl_rio: fix non-standard HID1 register access
>>
>>
>> On Oct 13, 2010, at 9:04 PM, Shaohui Xie wrote:
>>
>>> From: Li Yang
>>>
>>> The access to HID1 register is only legitimate for e500 v1/v2 cores.
>>> Also fi
time.
Signed-off-by: Kumar Gala
---
arch/powerpc/configs/e500mc_smp_defconfig | 178 +
1 files changed, 178 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/configs/e500mc_smp_defconfig
diff --git a/arch/powerpc/configs/e500mc_smp_defconfig
b/arch
function
'iounmap'
drivers/spi/spi_fsl_espi.c: In function 'fsl_espi_probe':
drivers/spi/spi_fsl_espi.c:602:2: error: implicit declaration of function
'ioremap'
drivers/spi/spi_fsl_espi.c:602:24: warning: assignment makes pointer from
integer without a cast
Signed-
On Oct 14, 2010, at 9:12 AM, Grant Likely wrote:
> On Thu, Oct 14, 2010 at 08:55:47AM -0500, Kumar Gala wrote:
>> We get the following when building on ppc64 due to lack of include of
>> :
>
> Is this an immediate problem (merge for .36), or is it a linux-next thing?
>
On Oct 13, 2010, at 8:39 PM, Tabi Timur-B04825 wrote:
> Kumar Gala wrote:
>>>> arch/powerpc/configs/mpc85xx_defconfig |3 +
>>>> arch/powerpc/configs/mpc85xx_smp_defconfig |3 +
>>>> arch/powerpc/platforms/85xx/p1022_ds.c | 213
>>
On Oct 18, 2010, at 5:32 PM, Scott Wood wrote:
> If mem= is used on the kernel command line to create reserved regions
> for userspace to map using /dev/mem, let it be mapped cacheable as long
> as it is within the memory region described in the device tree.
>
> Signed-off-by: Scott Wood
> ---
On Oct 18, 2010, at 2:22 AM, Roy Zang wrote:
> Move Freescale elbc interrupt from nand dirver to elbc driver.
> Then all elbc devices can use the interrupt instead of ONLY nand.
>
> For former nand driver, it had the two functions:
>
> 1. detecting nand flash partitions;
> 2. registering elbc i
On Oct 20, 2010, at 12:12 AM, Zang Roy-R61911 wrote:
>
>
>> -Original Message-----
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Tuesday, October 19, 2010 21:19 PM
>> To: Zang Roy-R61911
>> Cc: linux-...@lists.infradead.org; Wood Scot
On Oct 17, 2010, at 2:44 AM, Artem Bityutskiy wrote:
> On Sat, 2010-10-16 at 19:05 -0600, Grant Likely wrote:
>> On Sat, Oct 16, 2010 at 1:17 PM, Artem Bityutskiy
>> wrote:
>>> On Tue, 2010-10-12 at 18:18 +0800, Mingkai Hu wrote:
Signed-off-by: Mingkai Hu
Acked-by: Grant Likely
On Oct 25, 2010, at 3:08 AM, Priyanka Jain wrote:
> PT7C4338 chip is manufactured by Pericom Technology Inc.
> It is a serial real-time clock which provides:
> 1)Low-power clock/calendar.
> 2)Programmable square-wave output.
> It has 56 bytes of nonvolatile RAM.
>
> Freescale P1010RDB uses PT7C4
longs
Signed-off-by: Kumar Gala
---
Ben,
I think this is correct, but haven't really looked at all the code.
- k
arch/powerpc/mm/tlb_nohash.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 36c0
rpc/kernel/head_fsl_booke.S
> b/arch/powerpc/kernel/head_fsl_booke.S
> index 529b817..9962d09 100644
> --- a/arch/powerpc/kernel/head_fsl_booke.S
> +++ b/arch/powerpc/kernel/head_fsl_booke.S
> @@ -21,7 +21,7 @@
> *debbie_...@mvista.com
> *Copyright 2002-2004
On Nov 11, 2010, at 6:16 AM, Li Yang wrote:
> Expand the dma_mask of fsldma device to 36-bit, indicating that the
> DMA engine can deal with 36-bit physical address and does not need
> the SWIOTLB to create bounce buffer for it when doing dma_map_*().
>
> Signed-off-by: Li Yang
> ---
> Add more
On Nov 5, 2010, at 12:28 AM, Lan Chunhe wrote:
> We need to get the pci controller created as an of platform device to
> allow the EDAC driver to bind to it on P4080DS.
>
> Signed-off-by: Kai.Jiang
> Signed-off-by: Kumar Gala
> Signed-off-by: Lan Chunhe
> ---
> arc
On Nov 11, 2010, at 5:59 AM, Kumar Gala wrote:
>
> On Nov 5, 2010, at 12:28 AM, Lan Chunhe wrote:
>
>> We need to get the pci controller created as an of platform device to
>> allow the EDAC driver to bind to it on P4080DS.
>>
>> Signed-off-by: Kai.Ji
into one, it is easier to use ccsr_pci
> structure than the hardcoded define. So remove the hardcoded define and
> add pci/pcie error management register in ccsr_pci structure.
>
> Signed-off-by: Kai.Jiang
> Signed-off-by: Kumar Gala
> Signed-off-by: Lan Chunhe
> ---
&g
On Nov 3, 2010, at 4:35 AM, Shaohui Xie wrote:
> From: Li Yang
>
> Also make 74xx HID1 definition conditional.
>
> Signed-off-by: Li Yang
> Signed-off-by: Shaohui Xie
> Cc: Li Yang
> Cc: Kumar Gala
> Cc: Roy Zang
> Cc: Alexandre Bounine
> ---
> The
On Nov 11, 2010, at 4:19 AM, Xie Shaohui-B21989 wrote:
>
>
>
> Best Regards,
> Shaohui Xie
>
>
>> -Original Message-
>> From: Bounine, Alexandre [mailto:alexandre.boun...@idt.com]
>> Sent: Thursday, November 11, 2010 6:55 AM
>> To: Xie Shaohui-B21989; a...@linux-foundation.org
>> C
On Nov 3, 2010, at 4:36 AM, Shaohui Xie wrote:
> Signed-off-by: Shaohui Xie
> Cc: Li Yang
> Cc: Kumar Gala
> Cc: Roy Zang
> Cc: Alexandre Bounine
> ---
> arch/powerpc/kernel/traps.c | 14 +-
> arch/powerpc/sysdev/fsl_rio.c | 15 +++--
On Oct 26, 2010, at 7:02 PM, Ilya Yanok wrote:
> MPC8308 has ULPI pin muxing settings in SICRH register, bits 17-18
> which is different from both MPC8313 and MPC8315.
> Also MPC8308 doesn't have REFSEL, UTMI_PHY_EN and OTG_PORT fields
> in the USB DR controller CONTROL register.
>
> Signed-off-
On Nov 3, 2010, at 4:36 AM, Shaohui Xie wrote:
> Signed-off-by: Shaohui Xie
> Cc: Li Yang
> Cc: Kumar Gala
> Cc: Roy Zang
> Cc: Alexandre Bounine
> ---
> arch/powerpc/kernel/cpu_setup_fsl_booke.S |6 ++
> arch/powerpc/sysdev/fsl_rio.c |2
On Nov 13, 2010, at 4:43 PM, Timur Tabi wrote:
> On Thu, Nov 11, 2010 at 5:56 AM, Kumar Gala wrote:
>
>> Is there any reason we shouldn't set DMA_BIT_MASK(64) since the DMA block
>> programming model allows the address to be 64-bits?
>
> Can you explain that?
ng
> ---
> Add more detailed commit message
>
> drivers/dma/fsldma.c |4 +++-
> 1 files changed, 3 insertions(+), 1 deletions(-)
Acked-by: Kumar Gala
- k
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On Nov 15, 2010, at 10:13 AM, Timur Tabi wrote:
> On Mon, Nov 15, 2010 at 9:16 AM, Kumar Gala wrote:
>
>> The programming model (if you look at the free-space in the registers and
>> data structures) supports a 64-bit address. I'm trying to avoid changing
>> t
On Nov 16, 2010, at 6:31 PM, Anton Blanchard wrote:
> In order to add per process control of the DSCR, the following patch emulates
> read/write of the DSCR from userspace and saves and restores it on context
> switch. We add emulated stats to track how many times we do this.
>
> While writing t
On Nov 16, 2010, at 4:02 PM, Jason Wessel wrote:
> On 11/16/2010 06:58 AM, Dongdong Deng wrote:
>> Passing the address of current->thread.evr register to memcpy function.
>>
>>
>
> It turns out that out of all of my test configs and targets I did not
> have any that defined both CONFIG_FSL_BOO
the address that faulted was in vmalloc
space. We need to look at the supervisor execute (_PAGE_BAP_SX) bit and
not the user bit (_PAGE_BAP_UX/_PAGE_EXEC).
Also removed a branch level since it did not appear to be used.
Reported-by: Jeffrey Ladouceur
Signed-off-by: Kumar Gala
---
arch/powerpc/
On Nov 17, 2010, at 11:21 AM, Jason Wessel wrote:
> On 11/17/2010 11:16 AM, Kumar Gala wrote:
>
>>> Thanks,
>>> Jason.
>>
>> Repost a version with the casts and I'll pick it up.
>>
>> - k
>
> I have the final version ready for a pull
32 && regno < 64) {
> /* FP registers 32 -> 63 */
> #if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_SPE)
> - memcpy(current->thread.evr[regno-32], mem,
> + memcpy(¤t->thread.evr[regno-32], mem,
>
;
> diff --git a/arch/powerpc/platforms/85xx/smp.c
> b/arch/powerpc/platforms/85xx/smp.c
> index 5c91a99..1e8aec8 100644
> --- a/arch/powerpc/platforms/85xx/smp.c
> +++ b/arch/powerpc/platforms/85xx/smp.c
> @@ -2,7 +2,7 @@
> * Author: Andy Fleming
> * Kumar Gala
e USB IP on them.
>
> Signed-off-by: Xulei
> Signed-off-by: Kumar Gala
> ---
> drivers/usb/Kconfig |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
> index 6a58cb1..d513d3a 100644
> --- a/drivers/usb/
[ I know I'm way way way way late, but combo of holidays and getting sick.
Please push as these are pretty minor changes ]
The following changes since commit 0c21e3aaf6ae85bee804a325aa29c325209180fd:
Merge branch 'for-next' of
git://git.kernel.org/pub/scm/linux/kernel/git/hch/hfsplus (2011-0
On Oct 14, 2010, at 3:15 PM, Timur Tabi wrote:
> Fix the warnings genereted by arch/powerpc/include/asm/immap_qe.h when
> CONFIG_PHYS_ADDR_T_64BIT is defined:
>
> immap_qe.h: In function 'immrbar_virt_to_phys':
> immap_qe.h:472:8: warning: cast from pointer to integer of different size
> immap_q
On Dec 3, 2010, at 10:52 AM, Timur Tabi wrote:
> In order to prevent the fsl_dma driver from claiming the DMA channels that the
> P1022DS audio driver needs, the compatible properties for those nodes must say
> "fsl,ssi-dma-channel" instead of "fsl,eloplus-dma-channel".
>
> Signed-off-by: Timur
On Jan 17, 2011, at 5:58 AM, Aggrwal Poonam-B10812 wrote:
>
>
>> -Original Message-
>> From: linuxppc-dev-bounces+poonam.aggrwal=freescale@lists.ozlabs.org
>> [mailto:linuxppc-dev-
>> bounces+poonam.aggrwal=freescale@lists.ozlabs.org] On Behalf Of
>> Sergei Shtylyov
>> Sent: Mon
On Jan 18, 2011, at 7:10 PM, Jeff Garzik wrote:
> On 01/17/2011 06:47 AM, Sergei Shtylyov wrote:
>> Hello.
>>
>> On 17-01-2011 10:10, Xulei wrote:
>>
>>> In FSL sata v2 block, the snoop bit of PRDT Word3 description
>>> information is at bit28 instead of bit22.
>>
>>> This patch adds FSL sata
On Jan 25, 2011, at 12:02 AM, Liu Yu wrote:
> This errata can occur if a single-precision floating-point, double-precision
> floating-point or vector floating-point instruction on a mispredicted branch
> path signals one of the floating-point data interrupts which are enabled by
> the
> SPEFSCR
On Feb 1, 2011, at 12:48 PM, Dave Kleikamp wrote:
> Signed-off-by: Dave Kleikamp
> Cc: Benjamin Herrenschmidt
> Cc: Josh Boyer
> Cc: linuxppc-dev@lists.ozlabs.org
> ---
> arch/powerpc/Kconfig |2 +-
> arch/powerpc/configs/44x/iss476-smp_defconfig |6 ++--
> arch/
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