On Sep 17, 2014, at 1:56 AM, Ganapatrao Kulkarni
wrote:
> From: Ganapatrao Kulkarni
>
> This patch adds property "nid" to memory node to provide the memory range to
> numa node id mapping.
>
> Signed-off-by: Ganapatrao Kulkarni
>
> —
Adding the PPC guys as they’ve been doing NUMA on IBM P
On Sep 25, 2014, at 4:47 AM, Zhao Qiang wrote:
> qe need to use the rheap, so move it to public directory.
>
> Signed-off-by: Zhao Qiang
> ---
> arch/powerpc/Kconfig| 3 ---
> arch/powerpc/include/asm/fsl_85xx_cache_sram.h | 2 +-
> arch/powerpc/lib/M
On Oct 17, 2014, at 5:13 AM, b29...@freescale.com wrote:
> From: Tang Yuantian
>
> Freescale introduced new ARM core-based SoCs which support dynamic
> frequency switch feature. DFS on new SoCs are compatible with current
> PowerPC CoreNet platforms. In order to support those new platforms,
> t
On Oct 22, 2014, at 9:09 AM, Emil Medve wrote:
> The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA).
> BMan supports hardware allocation and deallocation of buffers belonging to
> pools originally created by software with configurable depletion thresholds.
> This bindin
On Oct 28, 2014, at 4:15 AM, Emil Medve wrote:
> The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA).
> BMan supports hardware allocation and deallocation of buffers belonging to
> pools originally created by software with configurable depletion thresholds.
> This bindin
On Oct 28, 2014, at 4:15 AM, Emil Medve wrote:
> Portals are memory mapped interfaces to BMan that allow low-latency,
> lock-less interaction by software running on processor cores, accelerators
> and network interfaces with the BMan
>
> Signed-off-by: Emil Medve
> Change-Id: I6d245ffc14ba3d0e
On Oct 30, 2014, at 2:31 AM, Zhao Qiang wrote:
> qe need to use the rheap, so move it to public directory.
>
> Signed-off-by: Zhao Qiang
> ---
> arch/powerpc/Kconfig| 3 ---
> arch/powerpc/include/asm/fsl_85xx_cache_sram.h | 2 +-
> arch/powerpc/lib/M
On Oct 30, 2014, at 2:31 AM, Zhao Qiang wrote:
> LS1 is arm cpu and it has qe ip block.
> move qe code from platform directory to public directory.
>
> QE is an IP block integrates several comunications peripheral
> controllers. It can implement a variety of applications, such
> as uart, usb an
On Oct 31, 2014, at 2:24 AM, qiang.z...@freescale.com wrote:
> On Oct 30, 2014, at 9:37 AM, Kumar Gala wrote:
>
>
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Thursday, October 30, 2014 9:37 PM
>> To: Zhao
On Apr 13, 2013, at 2:14 AM, Kevin Hao wrote:
> In patch 34642bbb (powerpc/fsl-pci: Keep PCI SoC controller registers in
> pci_controller) we choose to keep the map of the PCI SoC controller
> registers. But we missed to delete the unmap in setup_pci_atmu
> function. This will cause the following
On Apr 14, 2013, at 12:40 AM, Kevin Hao wrote:
> The reg property in the pci bridge device node is used to bind this
> device node to the pci bridge device. Then all the pci devices under
> this bridge could use the interrupt maps defined in this device node
> to do the irq translation. So if thi
On Mar 24, 2013, at 8:23 PM, Zhicheng Fan wrote:
> fix the following errors:
> Error: arch/powerpc/boot/dts/p1025rdb.dtsi:326.2-3 label or path, 'qe',
> not found
> Error: arch/powerpc/boot/dts/fsl/p1021si-post.dtsi:242.2-3 label or
> path, 'qe', not found
> FATAL ERROR: Synta
Jiucheng Xu (1):
powerpc/85xx: Reserve a partition of NOR flash for QE ucode firmware
Kevin Hao (2):
powerpc/fsl-pci: don't unmap the PCI SoC controller registers in
setup_pci_atmu
powerpc/fsl-booke: add the reg prop for pci bridge device node for T4/B4
Kumar Gal
On May 28, 2013, at 5:45 PM, Scott Wood wrote:
> On 05/16/2013 01:29:45 AM, Kevin Hao wrote:
>> All these boards use the same configuration file p1_p2_rdb_pc.h in
>> u-boot. So they have the same pci bus address set by the u-boot.
>> But in some of these boards the bus address set in dtb don't ma
On May 30, 2013, at 2:21 PM, Mike Turquette wrote:
> Quoting Mike Turquette (2013-05-30 11:57:32)
>> Quoting yuantian.t...@freescale.com (2013-05-22 01:22:19)
>>> From: Tang Yuantian
>>>
>>> The compatible string of clock is changed from *-2 to *-2.0
>>> on chassis 2. So updated it accordingly.
On Jun 7, 2013, at 7:14 AM, Benjamin Herrenschmidt wrote:
> On Fri, 2013-06-07 at 11:48 +0100, David Laight wrote:
>>> For those interested, this is the Quake3 sqrt from Carmack ...
>> there's
>>> plenty of literature about it one or two google clicks away :-)
>>
>> I guess that is a rough enoug
On Jun 18, 2013, at 3:14 PM, Scott Wood wrote:
> This fixes a regression that causes 83xx to oops on boot if a
> non-express PCI bus is present.
>
> The following changes since commit 17858ca65eef148d335ffd4cfc09228a1c1cbfb5:
>
> Merge tag 'please-pull-fixia64' of
> git://git.kernel.org/pub/s
On Jul 5, 2013, at 1:27 AM,
wrote:
> From: Hongbo Zhang
>
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
> the device tree nodes for them.
>
> Signed-off-by: Hongbo Zhang
> ---
> arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 90 +++
On Jul 5, 2013, at 1:27 AM,
wrote:
> From: Hongbo Zhang
>
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
> the device tree nodes for them.
>
> Signed-off-by: Hongbo Zhang
> ---
> arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 90 +++
On Jul 17, 2013, at 5:11 AM, Haijun Zhang wrote:
> Vender version and sdhc spec version of T4240-R1.0 is incorrect.
> The right value should be VVN=0x13, SVN = 0x1. The wrong version
> number will break down the ADMA data transfer.
> This defect only exist in T4240-R1.0. Will be fixed in T4240-R2
On Jul 16, 2013, at 6:57 AM, Kevin Hao wrote:
> For some SoC (such as the FSL BookE) even though there does have
> a hardware FPU, but not all floating point instructions are
> implemented. Unfortunately some versions of gcc do use these
> unimplemented instructions. Then we have to enable the ma
On Jul 22, 2013, at 4:47 AM, Wrobel Heinz-R39252 wrote:
>> Subject: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
>>
>> Special voltages that can be support by eSDHC of T4 in esdhc node.
>>
>> Signed-off-by: Haijun Zhang
>> Signed-off-by: Anton Vorontsov
>
>> --- a/Documentation/dev
On Jul 25, 2013, at 6:54 AM, Catalin Udma wrote:
> If CONFIG_E500 is enabled, the compilation flags are updated
> specifying the target core -mcpu=e5500/e500mc/8540
> Also remove -Wa,-me500, being incompatible with -mcpu=e5500/e6500
> The assembler option is redundant if the -mcpu= flag is set.
>
On Jul 25, 2013, at 5:02 PM, Andy Fleming wrote:
> T4, Cell, powernv, and pseries had the same implementation, so switch
> them to use a generic version. A2 apparently had a version, but
> removed it at some point, so we remove the declaration, too.
>
> Signed-off-by: Andy Fleming
>
> Conflict
On Aug 1, 2013, at 6:02 AM, Shaveta Leekha wrote:
> Signed-off-by: Shaveta Leekha
> ---
> .../devicetree/bindings/powerpc/fsl/maple.txt | 30
> 1 files changed, 30 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/maple.tx
On Aug 5, 2013, at 4:11 PM, Scott Wood wrote:
> On Thu, 2013-08-01 at 11:05 -0500, Kumar Gala wrote:
>> On Aug 1, 2013, at 6:02 AM, Shaveta Leekha wrote:
>>
>>> Signed-off-by: Shaveta Leekha
>>> ---
>>> .../devicetree/bindings/powerpc/fsl/maple.txt
On Aug 6, 2013, at 3:43 PM, Gerhard Sittig wrote:
> this series
> - fixes several drivers that are used in the MPC512x platform (UART,
> SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
> handle clocks (appropriately acquire and setup them, hold references
> during use, releas
On Aug 7, 2013, at 7:03 PM, Stephen N Chivers wrote:
> Add support for the Motorola/Emerson MVME5100 Single Board Computer.
>
> The MVME5100 is a 6U form factor VME64 computer with:
>
>- A single MPC7410 or MPC750 CPU
>- A HAWK Processor Host Bridge (CPU to PCI) and
> M
On Aug 9, 2013, at 1:24 AM, Stephen Rothwell wrote:
> We cannot put the unsetting of config options in the Kconfig file, nor
> the integer or string options.
>
> I checked that after this we get the same .config files generated (except
> for the addition of the new PPC64_DEFCONFIG* config option
On Aug 9, 2013, at 1:03 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2013-08-08 at 17:45 -0500, Scott Wood wrote:
>> The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
>>
>> Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)
>>
>> are available in the git repository at:
>
> N
On Jul 31, 2013, at 1:25 AM, Haijun Zhang wrote:
> Add function to support get voltage from device-tree.
> If there are voltage-range specified in device-tree node, this function
> will parse it and return the avail voltage mask.
>
> Signed-off-by: Haijun Zhang
> ---
> changes for v2:
> -
On Aug 9, 2013, at 1:24 PM, Sukadev Bhattiprolu wrote:
>
> I am tryng to compile clean mainline kernel with a few different config files
> and running into errors with some configs.
>
> I am building on RHEL6.3 with following binaries:
>
> gcc (GCC) 4.4.6 20120305 (Red Hat 4.4.6-4)
>
On Aug 16, 2013, at 2:23 AM, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Each core's AltiVec unit may be placed into a power savings mode
> by turning off power to the unit. Core hardware will automatically
> power down the AltiVec unit after no AltiVec instructions have
> executed in N cy
On Aug 15, 2013, at 11:57 PM, Henry Bausley wrote:
>
> Is there any reason that a Critical Input Interrupt will not work reliably on
> a 44x powerpc?
>
> I am using an AMCC now Applied Micro AMCC460EX
>
> and changed
>
> CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
> to
> CR
> arch/powerpc/kernel/eeh.c |3 +--
> arch/powerpc/sysdev/fsl_pci.c |2 +-
> 2 files changed, 2 insertions(+), 3 deletions(-)
Acked-by: Kumar Gala
(for the fsl_pci.c) change
- k
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.o
On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:
> The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It causes
> that neither MSI nor MSI-X can work fine. This is a workaround to allow
> MSI-X to function properly.
>
> Signed-off-by: Liu Shuo
> Signed-off-by: Li Yang
> Signed-off-b
On Sep 4, 2013, at 9:41 PM, Jia Hongtao wrote:
> In both B4 and T4240QDS platform PCA9547 I2C bus multiplexer is used.
> The sub-nodes are also reorganized according to right I2C topology.
>
> Signed-off-by: Jia Hongtao
> ---
> V2 change log:
> Reorganized the sub-nodes under I2C multiplexer to
On Sep 5, 2013, at 1:37 PM, Scott Wood wrote:
> On Thu, 2013-09-05 at 13:34 -0500, Kumar Gala wrote:
>> On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:
>>> + msi->feature |= MSI_HW_ERRATA_ENDIAN;
>>> + }
>>> +
>>> /*
>&
On Sep 5, 2013, at 10:33 PM, Jia Hongtao-B38951 wrote:
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Friday, September 06, 2013 2:41 AM
>> To: Jia Hongtao-B38951
>> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07
On Sep 6, 2013, at 10:36 AM, Scott Wood wrote:
> On Fri, 2013-09-06 at 10:01 -0500, Kumar Gala wrote:
>> On Sep 5, 2013, at 1:37 PM, Scott Wood wrote:
>>
>>> On Thu, 2013-09-05 at 13:34 -0500, Kumar Gala wrote:
>>>> On Apr 2, 2013, at 9:03 PM, Jia Hongta
On Sep 10, 2013, at 12:50 AM, Zhao Qiang wrote:
> Update phy node according to new P1010RDB-PB board.
>
> Signed-off-by: Shengzhou Liu
> Signed-off-by: Zhao Qiang
> ---
> arch/powerpc/boot/dts/p1010rdb.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
What about the old boards?
On Sep 10, 2013, at 10:49 PM, Zhao Qiang wrote:
> Since P1010RDB-PA and P1010RDB-PB boards use different external PHY
> interrupt signals.
> And actually the PHY interrupt is not used effectively with
> corresponding interrupt handler.
> So we can remove the interrupts node without side-effect to
On Sep 12, 2013, at 1:54 AM, Liu Shengzhou-B36685 wrote:
>
>
>> -Original Message-----
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Wednesday, September 11, 2013 11:13 PM
>> To: Zhao Qiang-B45475
>> Cc: linuxppc-dev@lists.ozlabs.org;
On Sep 13, 2013, at 4:14 AM, Valentin Longchamp wrote:
> On 09/11/2013 08:58 AM, Prabhakar Kushwaha wrote:
>> The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
>> processor cores with high-performance data path acceleration architecture
>> and network peripheral interfaces r
On Sep 12, 2013, at 8:11 PM, Kevin Hao wrote:
> On Thu, Sep 12, 2013 at 01:44:46PM -0500, Scott Wood wrote:
>> On Thu, 2013-09-12 at 15:13 +0800, Kevin Hao wrote:
Just a nit, but subject is missing 'e' in 'cornet' :)
- k
___
Linuxppc-dev mailing lis
On Sep 24, 2013, at 6:21 AM, Bhushan Bharat-R65777 wrote:
>
>
>> -Original Message-
>> From: Linuxppc-dev [mailto:linuxppc-dev-
>> bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Dongsheng
>> Wang
>> Sent: Tuesday, September 24, 2013 2:58 PM
>> To: Wood Scott-B07421
On Sep 25, 2013, at 2:24 AM, Aida Mynzhasova wrote:
> Currently IEEE 1588 timer reference clock source is determined through
> hard-coded value in gianfar_ptp driver. This patch allows to select ptp
> clock source by means of device tree file node.
>
> For instance:
>
> fsl,cksel = <0>;
>
; When this attribute isn't used, eTSEC system clock will serve as
> IEEE 1588 timer reference clock.
>
> Signed-off-by: Aida Mynzhasova
> ---
> Documentation/devicetree/bindings/net/fsl-tsec-phy.txt | 18 +-
> drivers/net/ethernet/freescale/gianfar_ptp.
On Sep 26, 2013, at 7:18 PM, Scott Wood wrote:
> Otherwise, we get a debug traceback due to the use of
> smp_processor_id() (or get_paca()) inside hard_smp_processor_id().
> mpic_host_map() is just looking for a default CPU, so it doesn't matter
> if we migrate after getting the CPU ID.
>
> Sign
On Sep 27, 2013, at 11:15 AM, Scott Wood wrote:
> On Fri, 2013-09-27 at 10:52 -0500, Kumar Gala wrote:
>> On Sep 26, 2013, at 7:18 PM, Scott Wood wrote:
>>
>>> Otherwise, we get a debug traceback due to the use of
>>> smp_processor_id() (or get_pac
On Oct 14, 2013, at 6:37 AM, Xie Xiaobo wrote:
> The QUICC Engine (QE) is a communications coprocessors on Freescale
> embedded processors. The QE had been applied in PowerPC architecture
> previously, and it will be applied in ARM architecture too.
> So move the qe_lib from arch/powerpc to drive
On Oct 14, 2013, at 2:26 PM, Kumar Gala wrote:
>
> On Oct 14, 2013, at 6:37 AM, Xie Xiaobo wrote:
>
>> The QUICC Engine (QE) is a communications coprocessors on Freescale
>> embedded processors. The QE had been applied in PowerPC architecture
>> previously, an
On Oct 14, 2013, at 2:26 PM, Kumar Gala wrote:
>
> On Oct 14, 2013, at 6:37 AM, Xie Xiaobo wrote:
>
>> The QUICC Engine (QE) is a communications coprocessors on Freescale
>> embedded processors. The QE had been applied in PowerPC architecture
>> previously, an
On Oct 15, 2013, at 8:16 AM, Gerhard Sittig wrote:
> On Mon, Oct 14, 2013 at 13:09 -0700, Greg Kroah-Hartman wrote:
>>
>> On Mon, Oct 14, 2013 at 02:40:44PM -0500, Kumar Gala wrote:
>>>
>>> Greg,
>>>
>>> Wondering your thoughts on driver
On Oct 18, 2013, at 2:38 AM, Wolfgang Denk wrote:
> Default Debian PowerPC doesn't work on e500 because the code contains
> "lwsync" instructions, which are unsupported on this core. As a
> result, applications using this will crash with an "unhandled signal 4"
> "Illegal instruction" error.
>
On Oct 19, 2013, at 5:24 PM, Ben Hutchings wrote:
> When building lib/raid6/altivec8.o with gcc 4.8 on Debian, the compiler
> is generating references to two new runtime subroutines which are
> apparently not included in the kernel:
>
> ERROR: "_restvr_20" [lib/raid6/raid6_pq.ko] undefined!
> ER
On Oct 23, 2013, at 5:15 AM, Scott Wood wrote:
> On Wed, 2013-10-23 at 00:07 -0500, Kumar Gala wrote:
>> On Oct 18, 2013, at 2:38 AM, Wolfgang Denk wrote:
>>> diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
>>> index f783c93..f330374 100644
&g
On Oct 23, 2013, at 5:41 AM, Minghuan Lian wrote:
> PowerPC uses structure pci_controller to describe PCI controller,
> but ARM uses structure pci_sys_data. In order to support PowerPC
> and ARM simultaneously, the patch adds a structure fsl_pci that
> contains most of the members of the pci_cont
On Oct 24, 2013, at 4:45 AM, Benjamin Herrenschmidt wrote:
> On Wed, 2013-10-23 at 23:06 -0500, Kumar Gala wrote:
>> On Oct 23, 2013, at 5:15 AM, Scott Wood wrote:
>>
>>> On Wed, 2013-10-23 at 00:07 -0500, Kumar Gala wrote:
>>>> On Oct 18, 2013, at 2:38 AM, W
On Oct 24, 2013, at 4:05 PM, James Yang wrote:
> On Thu, 24 Oct 2013, Kumar Gala wrote:
>
>> On Oct 24, 2013, at 4:45 AM, Benjamin Herrenschmidt wrote:
>>
>>> On Wed, 2013-10-23 at 23:06 -0500, Kumar Gala wrote:
>>>> On Oct 23, 2013, at 5:15 AM, Scott Woo
On Oct 25, 2013, at 8:02 AM, Benjamin Herrenschmidt wrote:
> On Fri, 2013-10-25 at 10:58 +0100, David Laight wrote:
>>> This is not a distro issue. It's a libstdc++ portability issue. libstdc++
>>> hardcodes lwsync unless __NO_LWSYNC__ is explicitly defined,
>>> which you only get with -mcpu=8540
SSI Dual FIFO
>
> The third cell specifies the transfer priority as below.
For the DT-Binding portion:
Acked-by: Kumar Gala
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
The Linux Foundation
___
On Nov 11, 2013, at 1:25 PM, Lijun Pan wrote:
> mpc85xx_smp_defconfig and mpc85xx_defconfig already have CONFIG_P1023RDS=y.
> Merge CONFIG_P1023RDB=y and other relevant configurations into
> mpc85xx_smp_defconfig and mpc85_defconfig.
>
> Signed-off-by: Lijun Pan
> ---
> arch/powerpc/configs/8
On Dec 7, 2012, at 2:57 AM, Vakul Garg wrote:
> This reverts commit a2c0911c09190125f52c9941b9d187f601c2f7be.
>
> Signed-off-by: Vakul Garg
> ---
> Instead of adding SEC era information in crypto node's compatible, a new
> property 'fsl,sec-era' is being introduced into crypto node.
>
> .../de
On Dec 19, 2012, at 12:03 AM, Ian Munsie wrote:
> From: Ian Munsie
>
> This patch adds support for enabling and context switching the Target
> Address Register in Power8. The TAR is a new special purpose register
> that can be used for computed branches with the bctar[l] (branch
> conditional t
On Dec 20, 2012, at 3:08 AM, Tiejun Chen wrote:
> gdb always need to generate a single step properly to invoke
> a kgdb state. But with lazy interrupt, book3e can't always
> trigger a debug exception with a single step since the current
> is blocked for handling those pending exception, then we m
On Jan 4, 2013, at 12:06 PM, Cody P Schafer wrote:
> The only persistent change made by this loop is calling
> memblock_set_node() once for each memblock, which is not useful (and has
> no effect) as memblock_set_node() is not called with any
> memblock-specific parameters.
>
> Subsistute a sing
On Jan 21, 2013, at 7:56 PM, Scott Wood wrote:
> This will be used by the qemu-e500 platform, as the MPIC version (and
> thus whether we have coreint) depends on how QEMU is configured.
>
> Signed-off-by: Scott Wood
> ---
> arch/powerpc/sysdev/mpic.c | 26 +++---
> 1 file c
On Jan 18, 2013, at 2:40 PM, Kim Phillips wrote:
> On Fri, 18 Jan 2013 17:16:13 +0800
> Po Liu wrote:
>
>> This facilitates getting the physical address of the SEC node.
>>
>> Signed-off-by: Liu po
>> ---
> Reviewed-by: Kim Phillips
>
> Kim
This was missing a trailing ';', so wondering if
On Dec 7, 2012, at 9:09 AM, Holger Brunck wrote:
> Signed-off-by: Holger Brunck
> cc: Kumar Gala
> ---
> arch/powerpc/platforms/82xx/km82xx.c |6 +++---
> 1 files changed, 3 insertions(+), 3 deletions(-)
applied 1-5 to next
- k
_
On Jan 23, 2013, at 2:13 PM, Paul Gortmaker wrote:
> Updates to u-boot allow this board to boot off of either
> the 8MB soldered on flash, or the 64MB SODIMM flash.
>
> This is achieved by changing JP12 and SW2.8 which in turn
> swaps which flash device appears on /CS0 and /CS6 respectively.
>
On Nov 30, 2012, at 5:34 PM, Kim Phillips wrote:
> arch/powerpc/sysdev/fsl_msi.c:31:1: warning: symbol 'msi_head' was not
> declared. Should it be static?
> arch/powerpc/sysdev/fsl_msi.c:138:40: warning: incorrect type in argument 1
> (different base types)
> arch/powerpc/sysdev/fsl_msi.c:138:4
On Dec 3, 2012, at 7:36 AM, Wei Yongjun wrote:
> From: Wei Yongjun
>
> Use for_each_compatible_node() macro instead of open coding it.
>
> Signed-off-by: Wei Yongjun
> ---
> arch/powerpc/platforms/85xx/mpc85xx_mds.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
applied to next
-
On Jan 23, 2013, at 1:21 AM, Vakul Garg wrote:
> This new property defines the era of the particular SEC version.
> The compatible property in device tree "crypto" node has been updated
> not to contain SEC era numbers.
>
> Signed-off-by: Vakul Garg
> ---
> Changelog:
> 1. Marked fsl,sec-
On Nov 30, 2012, at 5:34 PM, Kim Phillips wrote:
> arch/powerpc/sysdev/fsl_msi.c:31:1: warning: symbol 'msi_head' was not
> declared. Should it be static?
> arch/powerpc/sysdev/fsl_msi.c:138:40: warning: incorrect type in argument 1
> (different base types)
> arch/powerpc/sysdev/fsl_msi.c:138:4
On Feb 4, 2013, at 9:30 AM, Timur Tabi wrote:
> On 02/03/2013 01:39 PM, Stef van Os wrote:
>
>> +pci0: pci@fe0008000 {
>> +status = "disabled";
>> +};
>> +
>> +pci1: pci@fe0009000 {
>> +status = "disabled";
>> +};
>> +
>> +pci2: pcie@fe000a000 {
>> +
On Feb 12, 2013, at 10:31 PM, Michael Neuling wrote:
> Add transactional memory paca scratch register to show_regs. This is useful
> for debugging.
>
> Signed-off-by: Matt Evans
> Signed-off-by: Michael Neuling
> ---
> arch/powerpc/include/asm/paca.h |1 +
> arch/powerpc/kernel/asm-offse
On Feb 12, 2013, at 10:31 PM, Michael Neuling wrote:
> This adds functions to restore the state of the FP/VSX registers from
> what's stored in the thread_struct. Two version for FP/VSX are required
> since one restores them from transactional/checkpoint side of the
> thread_struct and the other
On Feb 12, 2013, at 10:31 PM, Michael Neuling wrote:
> Kconfig option for transactional memory on powerpc.
>
> Signed-off-by: Matt Evans
> Signed-off-by: Michael Neuling
> ---
> arch/powerpc/Kconfig |8
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/powerpc/Kconfig b/arch
On Jan 21, 2013, at 7:02 AM, Julia Lawall wrote:
> From: Julia Lawall
>
> Delete successive tests to the same location. The code tested the result
> of a previous call, that itself was already tested. It is changed to test
> the result of the most recent call.
>
> A simplified version of the
On Feb 13, 2013, at 8:09 AM, Stef van Os wrote:
> Initial board support for the Prodrive PPA8548 AMC module. Board
> is an MPC8548 AMC platform used in RapidIO systems. This module is
> also used to test/work on mainline linux RapidIO software.
>
> PPA8548 overview:
> - 1.3 GHz Freescale PowerQU
On Jan 14, 2013, at 5:28 AM, Varun Sethi wrote:
> The pci controller structure has a provision to store the device strcuture
> pointer of the corresponding platform device. Currently this information is
> not stored during fsl pci controller initialization. This information is
> required while de
On Jan 21, 2013, at 7:56 PM, Scott Wood wrote:
> This will be used by the qemu-e500 platform, as the MPIC version (and
> thus whether we have coreint) depends on how QEMU is configured.
>
> Signed-off-by: Scott Wood
> ---
> arch/powerpc/sysdev/mpic.c | 26 +++---
> 1 file c
On Jan 21, 2013, at 7:56 PM, Scott Wood wrote:
> The MPIC code will disable coreint if it detects an insufficient
> MPIC version.
>
> Signed-off-by: Scott Wood
> ---
> arch/powerpc/platforms/85xx/qemu_e500.c |7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
applied to next
- k
On Jan 30, 2013, at 9:10 PM, Wang Dongsheng wrote:
> Add irq_set_wake support. Just add IRQF_NO_SUSPEND to desc->action->flag.
> So the wake up interrupt will not be disable in suspend_device_irqs.
>
> Signed-off-by: Wang Dongsheng
> ---
> arch/powerpc/sysdev/mpic.c | 15 +++
> 1 f
Mostly misc code cleanups in various board ports and adding support for a
new MPC85xx board - ppa8548.
- k
The following changes since commit 2468dcf641e4f3e1b0153e3e11ca20740b2f4ce8:
Ian Munsie (1):
powerpc: Add support for context switching the TAR register
are available in the git r
On Feb 27, 2013, at 4:56 AM, Sethi Varun-B16395 wrote:
> This patch is present in the "next branch" of linux ppc tree maintained by
> Kumar Gala.
> Following is the commit id:
> 52c5affc545053d37c0b05224bbf70f5336caa20
>
> I am not sure if this would be part of 3
On Feb 27, 2013, at 5:33 AM, Joerg Roedel wrote:
> On Mon, Feb 18, 2013 at 06:22:16PM +0530, Varun Sethi wrote:
>> Macros for checking FSL PCI controller version.
>>
>> Signed-off-by: Varun Sethi
>> ---
>> arch/powerpc/include/asm/pci-bridge.h |4
>> 1 files changed, 4 insertions(+), 0
On Feb 27, 2013, at 6:04 AM, Sethi Varun-B16395 wrote:
> Hi Kumar,Ben,
> I am implementing the Freescale PAMU (IOMMU) driver using the Linux IOMMU
> API. In this particular patch, I have added a new field to dev_archdata
> structure to store the dma domain information.
> This field is updated w
expanded for more page sizes supported on
e6500 as well as other MMU features.
This patch is based on code from Scott Wood.
Signed-off-by: Kumar Gala
---
arch/powerpc/mm/tlb_nohash.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/mm/tlb_nohash.c
config register that reports the link state.
Signed-off-by: Roy Zang
Signed-off-by: Andy Fleming
Signed-off-by: Kumar Gala
---
arch/powerpc/sysdev/fsl_pci.c | 29 ++---
arch/powerpc/sysdev/fsl_pci.h | 11 +++
2 files changed, 37 insertions(+), 3 deletions
The e6500 core adds support for AltiVec on a Book-E class processor.
Connect up all the various exception handling code and build config
mechanisms to allow user spaces apps to utilize AltiVec.
Signed-off-by: Kumar Gala
---
arch/powerpc/include/asm/cputable.h |2 +-
arch/powerpc
From: Vakul Garg
Add device tree for SEC (crypto engine) version 5.0 used on T4240.
Signed-off-by: Vakul Garg
Signed-off-by: Andy Fleming
Signed-off-by: Kumar Gala
---
arch/powerpc/boot/dts/fsl/qoriq-sec5.0-0.dtsi | 109 +
1 file changed, 109 insertions(+)
create
-by: Haiying Wang
Signed-off-by: Laurentiu Tudor
Signed-off-by: Kumar Gala
---
arch/powerpc/boot/dts/fsl/qoriq-gpio-1.dtsi | 41
arch/powerpc/boot/dts/fsl/qoriq-gpio-2.dtsi | 41
arch/powerpc/boot/dts/fsl/qoriq-gpio-3.dtsi | 41
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
Signed-off-by: Minghuan Lian
Signed-off-by: Roy Zang
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Andy Fleming
Signed-off-by: Shaohui Xie
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Scott Wood
Signed-off-by: Kumar Gala
---
arch/powerpc/boot/dts/t4240qds.dts | 220
Some minor changes to the common corenet_ds.c code are needed to support
the T4240QDS:
* Add support for "fsl,qoriq-pcie-v3.0" controller
* Bump max # of IRQs to 512 (T4240 supports more interrupts than
previous SoCs).
Signed-off-by: Kumar Gala
---
arch/powerpc/platforms/85
* Add support for up to 24 cores on T4240 (includes threads)
* Enable AltiVec support (on T4240)
* Add T4240QDS board into build
* Other changes are due to general kernel update of defconfig
Signed-off-by: Kumar Gala
---
arch/powerpc/configs/corenet64_smp_defconfig |9 -
1 file
On Mar 6, 2013, at 3:16 AM,
wrote:
> From: Tang Yuantian
>
> config FSL_SOC and CPM do not really depend on PPC_CLOCK. So remove it.
> PPC_CLOCK also keeps powerpc archtecture from supporting COMMON_CLK.
>
> Signed-off-by: Tang Yuantian
> ---
> v2: correct the title
>
> arch/powerpc/Kconf
On Mar 5, 2013, at 6:15 PM, Scott Wood wrote:
> On 03/05/2013 05:15:57 PM, Kumar Gala wrote:
>> Enable a baseline T4240 SoC to boot. There are several things missing
>> from the device trees for T4240:
>> * Thread support on e6500
>
> Why did threads get removed
On Mar 7, 2013, at 11:47 AM, Scott Wood wrote:
> On 03/07/2013 11:09:50 AM, Kumar Gala wrote:
>> On Mar 5, 2013, at 6:15 PM, Scott Wood wrote:
>> > On 03/05/2013 05:15:57 PM, Kumar Gala wrote:
>> >> Enable a baseline T4240 SoC to boot. There are several things
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