On Aug 16, 2013, at 2:23 AM, Dongsheng Wang wrote:

> From: Wang Dongsheng <[email protected]>
> 
> Each core's AltiVec unit may be placed into a power savings mode
> by turning off power to the unit. Core hardware will automatically
> power down the AltiVec unit after no AltiVec instructions have
> executed in N cycles. The AltiVec power-control is triggered by hardware.
> 
> Signed-off-by: Wang Dongsheng <[email protected]>

Why treat this as a idle HW governor vs just some one time setup at boot of the 
time delay?

- k
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